Message ID | 20240222094006.1030709-14-apatel@ventanamicro.com |
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State | New |
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Thu, 22 Feb 2024 01:42:00 -0800 (PST) From: Anup Patel <apatel@ventanamicro.com> To: Palmer Dabbelt <palmer@dabbelt.com>, Paul Walmsley <paul.walmsley@sifive.com>, Thomas Gleixner <tglx@linutronix.de>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Frank Rowand <frowand.list@gmail.com>, Conor Dooley <conor+dt@kernel.org> Cc: Marc Zyngier <maz@kernel.org>, =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= <bjorn@kernel.org>, Atish Patra <atishp@atishpatra.org>, Andrew Jones <ajones@ventanamicro.com>, Sunil V L <sunilvl@ventanamicro.com>, Saravana Kannan <saravanak@google.com>, Anup Patel <anup@brainfault.org>, linux-riscv@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Anup Patel <apatel@ventanamicro.com> Subject: [PATCH v14 13/18] irqchip/riscv-imsic: Add device MSI domain support for PCI devices Date: Thu, 22 Feb 2024 15:10:01 +0530 Message-Id: <20240222094006.1030709-14-apatel@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240222094006.1030709-1-apatel@ventanamicro.com> References: <20240222094006.1030709-1-apatel@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: <linux-kernel.vger.kernel.org> List-Subscribe: <mailto:linux-kernel+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-kernel+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1791591804167743303 X-GMAIL-MSGID: 1791591804167743303 |
Series |
Linux RISC-V AIA Support
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Commit Message
Anup Patel
Feb. 22, 2024, 9:40 a.m. UTC
The Linux PCI framework supports per-device MSI domains for PCI devices
so extend the IMSIC driver to allow PCI per-device MSI domains.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
drivers/irqchip/Kconfig | 7 +++++
drivers/irqchip/irq-riscv-imsic-platform.c | 35 ++++++++++++++++++++--
2 files changed, 40 insertions(+), 2 deletions(-)
Comments
Anup Patel <apatel@ventanamicro.com> writes: > The Linux PCI framework supports per-device MSI domains for PCI devices > so extend the IMSIC driver to allow PCI per-device MSI domains. > > Signed-off-by: Anup Patel <apatel@ventanamicro.com> > --- > drivers/irqchip/Kconfig | 7 +++++ > drivers/irqchip/irq-riscv-imsic-platform.c | 35 ++++++++++++++++++++-- > 2 files changed, 40 insertions(+), 2 deletions(-) > > diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig > index 85f86e31c996..2fc0cb32341a 100644 > --- a/drivers/irqchip/Kconfig > +++ b/drivers/irqchip/Kconfig > @@ -553,6 +553,13 @@ config RISCV_IMSIC > select GENERIC_IRQ_MATRIX_ALLOCATOR > select GENERIC_MSI_IRQ > > +config RISCV_IMSIC_PCI > + bool > + depends on RISCV_IMSIC > + depends on PCI > + depends on PCI_MSI > + default RISCV_IMSIC > + > config EXYNOS_IRQ_COMBINER > bool "Samsung Exynos IRQ combiner support" if COMPILE_TEST > depends on (ARCH_EXYNOS && ARM) || COMPILE_TEST > diff --git a/drivers/irqchip/irq-riscv-imsic-platform.c b/drivers/irqchip/irq-riscv-imsic-platform.c > index e2344fc08dca..90ddcdd0bba5 100644 > --- a/drivers/irqchip/irq-riscv-imsic-platform.c > +++ b/drivers/irqchip/irq-riscv-imsic-platform.c > @@ -14,6 +14,7 @@ > #include <linux/irqdomain.h> > #include <linux/module.h> > #include <linux/msi.h> > +#include <linux/pci.h> > #include <linux/platform_device.h> > #include <linux/spinlock.h> > #include <linux/smp.h> > @@ -208,6 +209,28 @@ static const struct irq_domain_ops imsic_base_domain_ops = { > #endif > }; > > +#ifdef CONFIG_RISCV_IMSIC_PCI > + > +static void imsic_pci_mask_irq(struct irq_data *d) > +{ > + pci_msi_mask_irq(d); > + irq_chip_mask_parent(d); > +} > + > +static void imsic_pci_unmask_irq(struct irq_data *d) > +{ > + irq_chip_unmask_parent(d); > + pci_msi_unmask_irq(d); > +} > + > +#define MATCH_PCI_MSI BIT(DOMAIN_BUS_PCI_MSI) > + > +#else > + > +#define MATCH_PCI_MSI 0 > + > +#endif > + > static bool imsic_init_dev_msi_info(struct device *dev, > struct irq_domain *domain, > struct irq_domain *real_parent, > @@ -231,6 +254,13 @@ static bool imsic_init_dev_msi_info(struct device *dev, > > /* Is the target supported? */ > switch (info->bus_token) { > +#ifdef CONFIG_RISCV_IMSIC_PCI > + case DOMAIN_BUS_PCI_DEVICE_MSI: > + case DOMAIN_BUS_PCI_DEVICE_MSIX: > + info->chip->irq_mask = imsic_pci_mask_irq; > + info->chip->irq_unmask = imsic_pci_unmask_irq; irq_set_affinity()? Björn
On Thu, Feb 22, 2024 at 6:44 PM Björn Töpel <bjorn@kernelorg> wrote: > > Anup Patel <apatel@ventanamicro.com> writes: > > > The Linux PCI framework supports per-device MSI domains for PCI devices > > so extend the IMSIC driver to allow PCI per-device MSI domains. > > > > Signed-off-by: Anup Patel <apatel@ventanamicro.com> > > --- > > drivers/irqchip/Kconfig | 7 +++++ > > drivers/irqchip/irq-riscv-imsic-platform.c | 35 ++++++++++++++++++++-- > > 2 files changed, 40 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig > > index 85f86e31c996..2fc0cb32341a 100644 > > --- a/drivers/irqchip/Kconfig > > +++ b/drivers/irqchip/Kconfig > > @@ -553,6 +553,13 @@ config RISCV_IMSIC > > select GENERIC_IRQ_MATRIX_ALLOCATOR > > select GENERIC_MSI_IRQ > > > > +config RISCV_IMSIC_PCI > > + bool > > + depends on RISCV_IMSIC > > + depends on PCI > > + depends on PCI_MSI > > + default RISCV_IMSIC > > + > > config EXYNOS_IRQ_COMBINER > > bool "Samsung Exynos IRQ combiner support" if COMPILE_TEST > > depends on (ARCH_EXYNOS && ARM) || COMPILE_TEST > > diff --git a/drivers/irqchip/irq-riscv-imsic-platform.c b/drivers/irqchip/irq-riscv-imsic-platform.c > > index e2344fc08dca..90ddcdd0bba5 100644 > > --- a/drivers/irqchip/irq-riscv-imsic-platform.c > > +++ b/drivers/irqchip/irq-riscv-imsic-platform.c > > @@ -14,6 +14,7 @@ > > #include <linux/irqdomain.h> > > #include <linux/module.h> > > #include <linux/msi.h> > > +#include <linux/pci.h> > > #include <linux/platform_device.h> > > #include <linux/spinlock.h> > > #include <linux/smp.h> > > @@ -208,6 +209,28 @@ static const struct irq_domain_ops imsic_base_domain_ops = { > > #endif > > }; > > > > +#ifdef CONFIG_RISCV_IMSIC_PCI > > + > > +static void imsic_pci_mask_irq(struct irq_data *d) > > +{ > > + pci_msi_mask_irq(d); > > + irq_chip_mask_parent(d); > > +} > > + > > +static void imsic_pci_unmask_irq(struct irq_data *d) > > +{ > > + irq_chip_unmask_parent(d); > > + pci_msi_unmask_irq(d); > > +} > > + > > +#define MATCH_PCI_MSI BIT(DOMAIN_BUS_PCI_MSI) > > + > > +#else > > + > > +#define MATCH_PCI_MSI 0 > > + > > +#endif > > + > > static bool imsic_init_dev_msi_info(struct device *dev, > > struct irq_domain *domain, > > struct irq_domain *real_parent, > > @@ -231,6 +254,13 @@ static bool imsic_init_dev_msi_info(struct device *dev, > > > > /* Is the target supported? */ > > switch (info->bus_token) { > > +#ifdef CONFIG_RISCV_IMSIC_PCI > > + case DOMAIN_BUS_PCI_DEVICE_MSI: > > + case DOMAIN_BUS_PCI_DEVICE_MSIX: > > + info->chip->irq_mask = imsic_pci_mask_irq; > > + info->chip->irq_unmask = imsic_pci_unmask_irq; > > irq_set_affinity()? It's already set by the switch-case above. Regards, Anup
Anup Patel <anup@brainfault.org> writes: > On Thu, Feb 22, 2024 at 6:44 PM Björn Töpel <bjorn@kernel.org> wrote: >> >> Anup Patel <apatel@ventanamicro.com> writes: >> >> > The Linux PCI framework supports per-device MSI domains for PCI devices >> > so extend the IMSIC driver to allow PCI per-device MSI domains. >> > >> > Signed-off-by: Anup Patel <apatel@ventanamicro.com> >> > --- >> > drivers/irqchip/Kconfig | 7 +++++ >> > drivers/irqchip/irq-riscv-imsic-platform.c | 35 ++++++++++++++++++++-- >> > 2 files changed, 40 insertions(+), 2 deletions(-) >> > >> > diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig >> > index 85f86e31c996..2fc0cb32341a 100644 >> > --- a/drivers/irqchip/Kconfig >> > +++ b/drivers/irqchip/Kconfig >> > @@ -553,6 +553,13 @@ config RISCV_IMSIC >> > select GENERIC_IRQ_MATRIX_ALLOCATOR >> > select GENERIC_MSI_IRQ >> > >> > +config RISCV_IMSIC_PCI >> > + bool >> > + depends on RISCV_IMSIC >> > + depends on PCI >> > + depends on PCI_MSI >> > + default RISCV_IMSIC >> > + >> > config EXYNOS_IRQ_COMBINER >> > bool "Samsung Exynos IRQ combiner support" if COMPILE_TEST >> > depends on (ARCH_EXYNOS && ARM) || COMPILE_TEST >> > diff --git a/drivers/irqchip/irq-riscv-imsic-platform.c b/drivers/irqchip/irq-riscv-imsic-platform.c >> > index e2344fc08dca..90ddcdd0bba5 100644 >> > --- a/drivers/irqchip/irq-riscv-imsic-platform.c >> > +++ b/drivers/irqchip/irq-riscv-imsic-platform.c >> > @@ -14,6 +14,7 @@ >> > #include <linux/irqdomain.h> >> > #include <linux/module.h> >> > #include <linux/msi.h> >> > +#include <linux/pci.h> >> > #include <linux/platform_device.h> >> > #include <linux/spinlock.h> >> > #include <linux/smp.h> >> > @@ -208,6 +209,28 @@ static const struct irq_domain_ops imsic_base_domain_ops = { >> > #endif >> > }; >> > >> > +#ifdef CONFIG_RISCV_IMSIC_PCI >> > + >> > +static void imsic_pci_mask_irq(struct irq_data *d) >> > +{ >> > + pci_msi_mask_irq(d); >> > + irq_chip_mask_parent(d); >> > +} >> > + >> > +static void imsic_pci_unmask_irq(struct irq_data *d) >> > +{ >> > + irq_chip_unmask_parent(d); >> > + pci_msi_unmask_irq(d); >> > +} >> > + >> > +#define MATCH_PCI_MSI BIT(DOMAIN_BUS_PCI_MSI) >> > + >> > +#else >> > + >> > +#define MATCH_PCI_MSI 0 >> > + >> > +#endif >> > + >> > static bool imsic_init_dev_msi_info(struct device *dev, >> > struct irq_domain *domain, >> > struct irq_domain *real_parent, >> > @@ -231,6 +254,13 @@ static bool imsic_init_dev_msi_info(struct device *dev, >> > >> > /* Is the target supported? */ >> > switch (info->bus_token) { >> > +#ifdef CONFIG_RISCV_IMSIC_PCI >> > + case DOMAIN_BUS_PCI_DEVICE_MSI: >> > + case DOMAIN_BUS_PCI_DEVICE_MSIX: >> > + info->chip->irq_mask = imsic_pci_mask_irq; >> > + info->chip->irq_unmask = imsic_pci_unmask_irq; >> >> irq_set_affinity()? > > It's already set by the switch-case above. Ah, right -- the new .bus_select_token! Thank you!
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index 85f86e31c996..2fc0cb32341a 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -553,6 +553,13 @@ config RISCV_IMSIC select GENERIC_IRQ_MATRIX_ALLOCATOR select GENERIC_MSI_IRQ +config RISCV_IMSIC_PCI + bool + depends on RISCV_IMSIC + depends on PCI + depends on PCI_MSI + default RISCV_IMSIC + config EXYNOS_IRQ_COMBINER bool "Samsung Exynos IRQ combiner support" if COMPILE_TEST depends on (ARCH_EXYNOS && ARM) || COMPILE_TEST diff --git a/drivers/irqchip/irq-riscv-imsic-platform.c b/drivers/irqchip/irq-riscv-imsic-platform.c index e2344fc08dca..90ddcdd0bba5 100644 --- a/drivers/irqchip/irq-riscv-imsic-platform.c +++ b/drivers/irqchip/irq-riscv-imsic-platform.c @@ -14,6 +14,7 @@ #include <linux/irqdomain.h> #include <linux/module.h> #include <linux/msi.h> +#include <linux/pci.h> #include <linux/platform_device.h> #include <linux/spinlock.h> #include <linux/smp.h> @@ -208,6 +209,28 @@ static const struct irq_domain_ops imsic_base_domain_ops = { #endif }; +#ifdef CONFIG_RISCV_IMSIC_PCI + +static void imsic_pci_mask_irq(struct irq_data *d) +{ + pci_msi_mask_irq(d); + irq_chip_mask_parent(d); +} + +static void imsic_pci_unmask_irq(struct irq_data *d) +{ + irq_chip_unmask_parent(d); + pci_msi_unmask_irq(d); +} + +#define MATCH_PCI_MSI BIT(DOMAIN_BUS_PCI_MSI) + +#else + +#define MATCH_PCI_MSI 0 + +#endif + static bool imsic_init_dev_msi_info(struct device *dev, struct irq_domain *domain, struct irq_domain *real_parent, @@ -231,6 +254,13 @@ static bool imsic_init_dev_msi_info(struct device *dev, /* Is the target supported? */ switch (info->bus_token) { +#ifdef CONFIG_RISCV_IMSIC_PCI + case DOMAIN_BUS_PCI_DEVICE_MSI: + case DOMAIN_BUS_PCI_DEVICE_MSIX: + info->chip->irq_mask = imsic_pci_mask_irq; + info->chip->irq_unmask = imsic_pci_unmask_irq; + break; +#endif case DOMAIN_BUS_DEVICE_MSI: /* * Per-device MSI should never have any MSI feature bits @@ -270,11 +300,12 @@ static bool imsic_init_dev_msi_info(struct device *dev, #define MATCH_PLATFORM_MSI BIT(DOMAIN_BUS_PLATFORM_MSI) static const struct msi_parent_ops imsic_msi_parent_ops = { - .supported_flags = MSI_GENERIC_FLAGS_MASK, + .supported_flags = MSI_GENERIC_FLAGS_MASK | + MSI_FLAG_PCI_MSIX, .required_flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS, .bus_select_token = DOMAIN_BUS_NEXUS, - .bus_select_mask = MATCH_PLATFORM_MSI, + .bus_select_mask = MATCH_PCI_MSI | MATCH_PLATFORM_MSI, .init_dev_msi_info = imsic_init_dev_msi_info, };