[v2,04/17] x86/resctrl: Detect Assignable Bandwidth Monitoring feature details
Commit Message
ABMC feature details are reported via CPUID Fn8000_0020_EBX_x5.
Bits Description
15:0 MAX_ABMC Maximum Supported Assignable Bandwidth
Monitoring Counter ID + 1
Detect the feature details and update
/sys/fs/resctrl/info/L3_MON/mon_features.
If the system supports Assignable Bandwidth Monitoring Counters (ABMC),
the output will have additional text.
$ cat /sys/fs/resctrl/info/L3_MON/mon_features
mbm_assign_capable
The feature details are documented in APM listed below [1].
[1] AMD64 Architecture Programmer's Manual Volume 2: System Programming
Publication # 24593 Revision 3.41 section 19.3.3.3 Assignable Bandwidth
Monitoring (ABMC).
Signed-off-by: Babu Moger <babu.moger@amd.com>
Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537
---
v2: Changed the field name to mbm_assign_capable from abmc_capable.
---
Documentation/arch/x86/resctrl.rst | 7 +++++++
arch/x86/kernel/cpu/resctrl/core.c | 17 +++++++++++++++++
arch/x86/kernel/cpu/resctrl/internal.h | 3 +++
arch/x86/kernel/cpu/resctrl/rdtgroup.c | 3 +++
include/linux/resctrl.h | 2 ++
5 files changed, 32 insertions(+)
Comments
Hi Babu,
On 19/01/2024 18:22, Babu Moger wrote:
> ABMC feature details are reported via CPUID Fn8000_0020_EBX_x5.
> Bits Description
> 15:0 MAX_ABMC Maximum Supported Assignable Bandwidth
> Monitoring Counter ID + 1
>
> Detect the feature details and update
> /sys/fs/resctrl/info/L3_MON/mon_features.
>
> If the system supports Assignable Bandwidth Monitoring Counters (ABMC),
> the output will have additional text.
> $ cat /sys/fs/resctrl/info/L3_MON/mon_features
> mbm_assign_capable
>
> The feature details are documented in APM listed below [1].
> [1] AMD64 Architecture Programmer's Manual Volume 2: System Programming
> Publication # 24593 Revision 3.41 section 19.3.3.3 Assignable Bandwidth
> Monitoring (ABMC).
> diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c
> index 4efe2d6a9eb7..f40ee271a5c7 100644
> --- a/arch/x86/kernel/cpu/resctrl/core.c
> +++ b/arch/x86/kernel/cpu/resctrl/core.c
> @@ -303,6 +303,17 @@ static void rdt_get_cdp_l2_config(void)
> rdt_get_cdp_config(RDT_RESOURCE_L2);
> }
>
> +static void rdt_get_abmc_cfg(struct rdt_resource *r)
> +{
> + struct rdt_hw_resource *hw_res = resctrl_to_arch_res(r);
> + u32 eax, ebx, ecx, edx;
> +
> + r->mbm_assign_capable = true;
> + /* Query CPUID_Fn80000020_EBX_x05 for number of ABMC counters */
> + cpuid_count(0x80000020, 5, &eax, &ebx, &ecx, &edx);
> + hw_res->mbm_assignable_counters = (ebx & 0xFFFF) + 1;
Please put the mbm_assignable_counters field in struct rdt_resource. The filesystem code
needs to access this to allocate/free counters and report how many are available.
After all this gets split and the filesystem code moves to /fs/, the rdt_hw_resrouce
structure is inaccessible to the filesystem code.
> +}
> +
> static void
> mba_wrmsr_amd(struct rdt_domain *d, struct msr_param *m, struct rdt_resource *r)
> {
> @@ -815,6 +826,12 @@ static __init bool get_rdt_alloc_resources(void)
> if (get_slow_mem_config())
> ret = true;
>
> + if (rdt_cpu_has(X86_FEATURE_ABMC)) {
> + r = &rdt_resources_all[RDT_RESOURCE_L3].r_resctrl;
> + rdt_get_abmc_cfg(r);
> + ret = true;
Does it make sense to report rdt_alloc_capable if the SoC has ABMC, but nothing that can
be configured?
This code would probably make more sense in the get_rdt_mon_resources().
> + }
> +
> return ret;
> }
>
> diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/resctrl/internal.h
> index a4f1aa15f0a2..01eb0522b42b 100644
> --- a/arch/x86/kernel/cpu/resctrl/internal.h
> +++ b/arch/x86/kernel/cpu/resctrl/internal.h
> @@ -391,6 +391,8 @@ struct rdt_parse_data {
> * resctrl_arch_get_num_closid() to avoid confusion
> * with struct resctrl_schema's property of the same name,
> * which has been corrected for features like CDP.
> + * @mbm_assignable_counters:
> + * Maximum number of assignable ABMC counters
As above, please move this to struct rdt_resource. The 'hw' version becomes private to the
arch code after the move to /fs//
> * @msr_base: Base MSR address for CBMs
> * @msr_update: Function pointer to update QOS MSRs
> * @mon_scale: cqm counter * mon_scale = occupancy in bytes
Thanks,
James
Hi James,
On 2/20/24 11:56, James Morse wrote:
> Hi Babu,
>
> On 19/01/2024 18:22, Babu Moger wrote:
>> ABMC feature details are reported via CPUID Fn8000_0020_EBX_x5.
>> Bits Description
>> 15:0 MAX_ABMC Maximum Supported Assignable Bandwidth
>> Monitoring Counter ID + 1
>>
>> Detect the feature details and update
>> /sys/fs/resctrl/info/L3_MON/mon_features.
>>
>> If the system supports Assignable Bandwidth Monitoring Counters (ABMC),
>> the output will have additional text.
>> $ cat /sys/fs/resctrl/info/L3_MON/mon_features
>> mbm_assign_capable
>>
>> The feature details are documented in APM listed below [1].
>> [1] AMD64 Architecture Programmer's Manual Volume 2: System Programming
>> Publication # 24593 Revision 3.41 section 19.3.3.3 Assignable Bandwidth
>> Monitoring (ABMC).
>
>> diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c
>> index 4efe2d6a9eb7..f40ee271a5c7 100644
>> --- a/arch/x86/kernel/cpu/resctrl/core.c
>> +++ b/arch/x86/kernel/cpu/resctrl/core.c
>> @@ -303,6 +303,17 @@ static void rdt_get_cdp_l2_config(void)
>> rdt_get_cdp_config(RDT_RESOURCE_L2);
>> }
>>
>> +static void rdt_get_abmc_cfg(struct rdt_resource *r)
>> +{
>> + struct rdt_hw_resource *hw_res = resctrl_to_arch_res(r);
>> + u32 eax, ebx, ecx, edx;
>> +
>> + r->mbm_assign_capable = true;
>> + /* Query CPUID_Fn80000020_EBX_x05 for number of ABMC counters */
>> + cpuid_count(0x80000020, 5, &eax, &ebx, &ecx, &edx);
>
>> + hw_res->mbm_assignable_counters = (ebx & 0xFFFF) + 1;
>
> Please put the mbm_assignable_counters field in struct rdt_resource. The filesystem code
> needs to access this to allocate/free counters and report how many are available.
> After all this gets split and the filesystem code moves to /fs/, the rdt_hw_resrouce
> structure is inaccessible to the filesystem code.
Ok. Sure.
>
>
>> +}
>> +
>> static void
>> mba_wrmsr_amd(struct rdt_domain *d, struct msr_param *m, struct rdt_resource *r)
>> {
>> @@ -815,6 +826,12 @@ static __init bool get_rdt_alloc_resources(void)
>> if (get_slow_mem_config())
>> ret = true;
>>
>> + if (rdt_cpu_has(X86_FEATURE_ABMC)) {
>> + r = &rdt_resources_all[RDT_RESOURCE_L3].r_resctrl;
>> + rdt_get_abmc_cfg(r);
>
>> + ret = true;
>
> Does it make sense to report rdt_alloc_capable if the SoC has ABMC, but nothing that can
> be configured?
Good catch. Will move it to get_rdt_mon_resources().
>
> This code would probably make more sense in the get_rdt_mon_resources().
Sure.
>
>
>> + }
>> +
>> return ret;
>> }
>>
>> diff --git a/arch/x86/kernel/cpu/resctrl/internal.h b/arch/x86/kernel/cpu/resctrl/internal.h
>> index a4f1aa15f0a2..01eb0522b42b 100644
>> --- a/arch/x86/kernel/cpu/resctrl/internal.h
>> +++ b/arch/x86/kernel/cpu/resctrl/internal.h
>> @@ -391,6 +391,8 @@ struct rdt_parse_data {
>> * resctrl_arch_get_num_closid() to avoid confusion
>> * with struct resctrl_schema's property of the same name,
>> * which has been corrected for features like CDP.
>
>> + * @mbm_assignable_counters:
>> + * Maximum number of assignable ABMC counters
>
> As above, please move this to struct rdt_resource. The 'hw' version becomes private to the
> arch code after the move to /fs//
>
>
>> * @msr_base: Base MSR address for CBMs
>> * @msr_update: Function pointer to update QOS MSRs
>> * @mon_scale: cqm counter * mon_scale = occupancy in bytes
>
>
> Thanks,
>
> James
>
@@ -197,6 +197,13 @@ with the following files:
mbm_local_bytes
mbm_local_bytes_config
+ If the system supports Assignable Bandwidth Monitoring
+ Counters (ABMC), the output will have additional text.
+ Example::
+
+ # cat /sys/fs/resctrl/info/L3_MON/mon_features
+ mbm_assign_capable
+
"mbm_total_bytes_config", "mbm_local_bytes_config":
Read/write files containing the configuration for the mbm_total_bytes
and mbm_local_bytes events, respectively, when the Bandwidth
@@ -303,6 +303,17 @@ static void rdt_get_cdp_l2_config(void)
rdt_get_cdp_config(RDT_RESOURCE_L2);
}
+static void rdt_get_abmc_cfg(struct rdt_resource *r)
+{
+ struct rdt_hw_resource *hw_res = resctrl_to_arch_res(r);
+ u32 eax, ebx, ecx, edx;
+
+ r->mbm_assign_capable = true;
+ /* Query CPUID_Fn80000020_EBX_x05 for number of ABMC counters */
+ cpuid_count(0x80000020, 5, &eax, &ebx, &ecx, &edx);
+ hw_res->mbm_assignable_counters = (ebx & 0xFFFF) + 1;
+}
+
static void
mba_wrmsr_amd(struct rdt_domain *d, struct msr_param *m, struct rdt_resource *r)
{
@@ -815,6 +826,12 @@ static __init bool get_rdt_alloc_resources(void)
if (get_slow_mem_config())
ret = true;
+ if (rdt_cpu_has(X86_FEATURE_ABMC)) {
+ r = &rdt_resources_all[RDT_RESOURCE_L3].r_resctrl;
+ rdt_get_abmc_cfg(r);
+ ret = true;
+ }
+
return ret;
}
@@ -391,6 +391,8 @@ struct rdt_parse_data {
* resctrl_arch_get_num_closid() to avoid confusion
* with struct resctrl_schema's property of the same name,
* which has been corrected for features like CDP.
+ * @mbm_assignable_counters:
+ * Maximum number of assignable ABMC counters
* @msr_base: Base MSR address for CBMs
* @msr_update: Function pointer to update QOS MSRs
* @mon_scale: cqm counter * mon_scale = occupancy in bytes
@@ -404,6 +406,7 @@ struct rdt_parse_data {
struct rdt_hw_resource {
struct rdt_resource r_resctrl;
u32 num_closid;
+ u32 mbm_assignable_counters;
unsigned int msr_base;
void (*msr_update) (struct rdt_domain *d, struct msr_param *m,
struct rdt_resource *r);
@@ -1077,6 +1077,9 @@ static int rdt_mon_features_show(struct kernfs_open_file *of,
seq_printf(seq, "%s_config\n", mevt->name);
}
+ if (r->mbm_assign_capable)
+ seq_printf(seq, "mbm_assign_capable\n");
+
return 0;
}
@@ -162,6 +162,7 @@ struct resctrl_schema;
* @evt_list: List of monitoring events
* @fflags: flags to choose base and info files
* @cdp_capable: Is the CDP feature available on this resource
+ * @assign_capable: Does system capable of supporting monitor assignment?
*/
struct rdt_resource {
int rid;
@@ -182,6 +183,7 @@ struct rdt_resource {
struct list_head evt_list;
unsigned long fflags;
bool cdp_capable;
+ bool mbm_assign_capable;
};
/**