diff mbox series

[2/3] spi: dw: Add a number of native CS auto-detection

Message ID 20240215180102.13887-3-fancer.lancer@gmail.com
State New
Headers
Series spi: dw: Auto-detect number of native CS |

Commit Message

Serge Semin Feb. 15, 2024, 6 p.m. UTC 
  Aside with the FIFO depth and DFS field size it's possible to auto-detect
a number of native chip-select synthesized in the DW APB/AHB SSI IP-core.
It can be done just by writing ones to the SER register. The number of
writable flags in the register is limited by the SSI_NUM_SLAVES IP-core
synthesize parameter. All the upper flags are read-only and wired to zero.
Based on that let's add the number of native CS auto-detection procedure
so the low-level platform drivers wouldn't need to manually set it up
unless it's required to set a constraint due to platform-specific reasons
(for instance, due to a hardware bug).

Signed-off-by: Serge Semin <fancer.lancer@gmail.com>
---
 drivers/spi/spi-dw-core.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

Comments

Andy Shevchenko Feb. 15, 2024, 7:31 p.m. UTC | #1 
On Thu, Feb 15, 2024 at 09:00:47PM +0300, Serge Semin wrote:
> Aside with the FIFO depth and DFS field size it's possible to auto-detect
> a number of native chip-select synthesized in the DW APB/AHB SSI IP-core.
> It can be done just by writing ones to the SER register. The number of
> writable flags in the register is limited by the SSI_NUM_SLAVES IP-core
> synthesize parameter. All the upper flags are read-only and wired to zero.
> Based on that let's add the number of native CS auto-detection procedure
> so the low-level platform drivers wouldn't need to manually set it up
> unless it's required to set a constraint due to platform-specific reasons
> (for instance, due to a hardware bug).

..

> +	/*
> +	 * Try to detect the number of native chip-selects if the platform
> +	 * driver didn't set it up. There can be up to 16 lines configured.
> +	 */
> +	if (!dws->num_cs) {
> +		u32 ser;
> +
> +		dw_writel(dws, DW_SPI_SER, 0xffff);

GENMASK() ?

> +		ser = dw_readl(dws, DW_SPI_SER);
> +		dw_writel(dws, DW_SPI_SER, 0);

Would it actually change the physical line state? If so, we may not do this.

> +		dws->num_cs = hweight16(ser);

Why 16 and not u16 & dw_writew()/readw()?

> +	}

I'm wondering why this can't be the default

	num_cs = ...autodetected...
	device_property_read(..., &num_cs);
diff mbox series

Patch

diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c
index 722b5eb1f709..ddfdb903047a 100644
--- a/drivers/spi/spi-dw-core.c
+++ b/drivers/spi/spi-dw-core.c
@@ -834,6 +834,20 @@  static void dw_spi_hw_init(struct device *dev, struct dw_spi *dws)
 			DW_SPI_GET_BYTE(dws->ver, 1));
 	}
 
+	/*
+	 * Try to detect the number of native chip-selects if the platform
+	 * driver didn't set it up. There can be up to 16 lines configured.
+	 */
+	if (!dws->num_cs) {
+		u32 ser;
+
+		dw_writel(dws, DW_SPI_SER, 0xffff);
+		ser = dw_readl(dws, DW_SPI_SER);
+		dw_writel(dws, DW_SPI_SER, 0);
+
+		dws->num_cs = hweight16(ser);
+	}
+
 	/*
 	 * Try to detect the FIFO depth if not set by interface driver,
 	 * the depth could be from 2 to 256 from HW spec