diff mbox series

[v2] ARM: ptrace: Use bitfield helpers

Message ID f73e6deb1bef9696661a62498ee5a56ac9a389ce.1708005130.git.geert+renesas@glider.be
State New
Headers
Series [v2] ARM: ptrace: Use bitfield helpers |

Commit Message

Geert Uytterhoeven Feb. 15, 2024, 1:54 p.m. UTC 
  The isa_mode() macro extracts two fields, and recombines them into a
single value.

Make this more obvious by using the FIELD_GET() helper, and shifting the
result into its final resting place.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
No changes in generated assembler code.

v2:
  - Drop irrelevant comment about non-existing off-by-one error,
  - Remove unnecessary parens.
---
 arch/arm/include/asm/ptrace.h | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

Comments

Oleg Nesterov Feb. 15, 2024, 5:50 p.m. UTC | #1 
Sorry for the noise, can't resist...

I am replying only because I wasn't aware of bitfield.h and useful
helpers there.

Thank you ;)

On 02/15, Geert Uytterhoeven wrote:
>
>  #ifndef __ASSEMBLY__
> +#include <linux/bitfield.h>
>  #include <linux/types.h>
>
>  struct pt_regs {
> @@ -35,8 +36,8 @@ struct svc_pt_regs {
>
>  #ifndef CONFIG_CPU_V7M
>  #define isa_mode(regs) \
> -	((((regs)->ARM_cpsr & PSR_J_BIT) >> (__ffs(PSR_J_BIT) - 1)) | \
> -	 (((regs)->ARM_cpsr & PSR_T_BIT) >> (__ffs(PSR_T_BIT))))
> +	(FIELD_GET(PSR_J_BIT, (regs)->ARM_cpsr) << 1 | \
> +	 FIELD_GET(PSR_T_BIT, (regs)->ARM_cpsr))

Reviewed-by: Oleg Nesterov <oleg@redhat.com>
diff mbox series

Patch

diff --git a/arch/arm/include/asm/ptrace.h b/arch/arm/include/asm/ptrace.h
index 7f44e88d1f25bcc5..14a38cc67e0bc966 100644
--- a/arch/arm/include/asm/ptrace.h
+++ b/arch/arm/include/asm/ptrace.h
@@ -10,6 +10,7 @@ 
 #include <uapi/asm/ptrace.h>
 
 #ifndef __ASSEMBLY__
+#include <linux/bitfield.h>
 #include <linux/types.h>
 
 struct pt_regs {
@@ -35,8 +36,8 @@  struct svc_pt_regs {
 
 #ifndef CONFIG_CPU_V7M
 #define isa_mode(regs) \
-	((((regs)->ARM_cpsr & PSR_J_BIT) >> (__ffs(PSR_J_BIT) - 1)) | \
-	 (((regs)->ARM_cpsr & PSR_T_BIT) >> (__ffs(PSR_T_BIT))))
+	(FIELD_GET(PSR_J_BIT, (regs)->ARM_cpsr) << 1 | \
+	 FIELD_GET(PSR_T_BIT, (regs)->ARM_cpsr))
 #else
 #define isa_mode(regs) 1 /* Thumb */
 #endif