Message ID | 20240208215926.10085-2-zajec5@gmail.com |
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State | New |
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[31.11.218.106]) by smtp.gmail.com with ESMTPSA id rf19-20020a1709076a1300b00a3743142429sm108255ejc.39.2024.02.08.13.59.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Feb 2024 13:59:35 -0800 (PST) From: =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= <zajec5@gmail.com> To: Russell King <linux@armlinux.org.uk>, Daniel Lezcano <daniel.lezcano@linaro.org>, Thomas Gleixner <tglx@linutronix.de>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org> Cc: Matthias Brugger <matthias.bgg@gmail.com>, AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= <rafal@milecki.pl> Subject: [PATCH V2 1/3] dt-bindings: arm: mediatek: convert hifsys to the json-schema clock Date: Thu, 8 Feb 2024 22:59:24 +0100 Message-Id: <20240208215926.10085-2-zajec5@gmail.com> X-Mailer: git-send-email 2.35.3 In-Reply-To: <20240208215926.10085-1-zajec5@gmail.com> References: <20240208215926.10085-1-zajec5@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: <linux-kernel.vger.kernel.org> List-Subscribe: <mailto:linux-kernel+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-kernel+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790369859341694901 X-GMAIL-MSGID: 1790369859341694901 |
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[V2,1/3] dt-bindings: arm: mediatek: convert hifsys to the json-schema clock
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Commit Message
Rafał Miłecki
Feb. 8, 2024, 9:59 p.m. UTC
From: Rafał Miłecki <rafal@milecki.pl> This helps validating DTS files. Introduced changes: 1. Documented "reg" property 2. Documented "#reset-cells" property 3. Dropped "syscon" as it was incorrectly used 4. Adjusted "compatible" and "reg" in example Signed-off-by: Rafał Miłecki <rafal@milecki.pl> --- .../bindings/arm/mediatek/mediatek,hifsys.txt | 26 ---------- .../clock/mediatek,mt2701-hifsys.yaml | 51 +++++++++++++++++++ 2 files changed, 51 insertions(+), 26 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,hifsys.txt create mode 100644 Documentation/devicetree/bindings/clock/mediatek,mt2701-hifsys.yaml
Comments
On 08/02/2024 22:59, Rafał Miłecki wrote: > From: Rafał Miłecki <rafal@milecki.pl> > > This helps validating DTS files. Introduced changes: > 1. Documented "reg" property > 2. Documented "#reset-cells" property > 3. Dropped "syscon" as it was incorrectly used > 4. Adjusted "compatible" and "reg" in example > > Signed-off-by: Rafał Miłecki <rafal@milecki.pl> > --- > .../bindings/arm/mediatek/mediatek,hifsys.txt | 26 ---------- > .../clock/mediatek,mt2701-hifsys.yaml | 51 +++++++++++++++++++ > 2 files changed, 51 insertions(+), 26 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,hifsys.txt > create mode 100644 Documentation/devicetree/bindings/clock/mediatek,mt2701-hifsys.yaml > > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,hifsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,hifsys.txt > deleted file mode 100644 > index 323905af82c3..000000000000 > --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,hifsys.txt > +++ /dev/null > @@ -1,26 +0,0 @@ > -Mediatek hifsys controller > -============================ > - > -The Mediatek hifsys controller provides various clocks and reset > -outputs to the system. > - > -Required Properties: > - > -- compatible: Should be: > - - "mediatek,mt2701-hifsys", "syscon" > - - "mediatek,mt7622-hifsys", "syscon" > - - "mediatek,mt7623-hifsys", "mediatek,mt2701-hifsys", "syscon" > -- #clock-cells: Must be 1 > - > -The hifsys controller uses the common clk binding from > -Documentation/devicetree/bindings/clock/clock-bindings.txt > -The available clocks are defined in dt-bindings/clock/mt*-clk.h. > - > -Example: > - > -hifsys: clock-controller@1a000000 { > - compatible = "mediatek,mt2701-hifsys", "syscon"; > - reg = <0 0x1a000000 0 0x1000>; > - #clock-cells = <1>; > - #reset-cells = <1>; > -}; > diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt2701-hifsys.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt2701-hifsys.yaml > new file mode 100644 > index 000000000000..eb429337cdf4 > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/mediatek,mt2701-hifsys.yaml > @@ -0,0 +1,51 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/mediatek,mt2701-hifsys.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Mediatek hifsys controller > + > +description: > + The Mediatek hifsys controller provides various clocks and reset outputs to > + the system. > + > +maintainers: > + - Matthias Brugger <matthias.bgg@gmail.com> > + > +properties: > + compatible: > + oneOf: > + - items: If there is going to be resend, drop items here, it's just an enum. Anyway: Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
Il 08/02/24 22:59, Rafał Miłecki ha scritto: > From: Rafał Miłecki <rafal@milecki.pl> > > This helps validating DTS files. Introduced changes: > 1. Documented "reg" property > 2. Documented "#reset-cells" property > 3. Dropped "syscon" as it was incorrectly used > 4. Adjusted "compatible" and "reg" in example > > Signed-off-by: Rafał Miłecki <rafal@milecki.pl> > --- > .../bindings/arm/mediatek/mediatek,hifsys.txt | 26 ---------- > .../clock/mediatek,mt2701-hifsys.yaml | 51 +++++++++++++++++++ > 2 files changed, 51 insertions(+), 26 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,hifsys.txt > create mode 100644 Documentation/devicetree/bindings/clock/mediatek,mt2701-hifsys.yaml > > diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,hifsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,hifsys.txt > deleted file mode 100644 > index 323905af82c3..000000000000 > --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,hifsys.txt > +++ /dev/null > @@ -1,26 +0,0 @@ > -Mediatek hifsys controller > -============================ > - > -The Mediatek hifsys controller provides various clocks and reset > -outputs to the system. > - > -Required Properties: > - > -- compatible: Should be: > - - "mediatek,mt2701-hifsys", "syscon" > - - "mediatek,mt7622-hifsys", "syscon" > - - "mediatek,mt7623-hifsys", "mediatek,mt2701-hifsys", "syscon" > -- #clock-cells: Must be 1 > - > -The hifsys controller uses the common clk binding from > -Documentation/devicetree/bindings/clock/clock-bindings.txt > -The available clocks are defined in dt-bindings/clock/mt*-clk.h. > - > -Example: > - > -hifsys: clock-controller@1a000000 { > - compatible = "mediatek,mt2701-hifsys", "syscon"; > - reg = <0 0x1a000000 0 0x1000>; > - #clock-cells = <1>; > - #reset-cells = <1>; > -}; > diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt2701-hifsys.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt2701-hifsys.yaml > new file mode 100644 > index 000000000000..eb429337cdf4 > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/mediatek,mt2701-hifsys.yaml > @@ -0,0 +1,51 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/mediatek,mt2701-hifsys.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Mediatek hifsys controller Please, "MediaTek HIFSYS controller" > + > +description: > + The Mediatek hifsys controller provides various clocks and reset outputs to > + the system. Same here, "The MediaTek HIFSYS controller..." Anyway, apart from that Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Cheers!
On 09/02/2024 09:53, AngeloGioacchino Del Regno wrote: > Il 08/02/24 22:59, Rafał Miłecki ha scritto: >> From: Rafał Miłecki <rafal@milecki.pl> >> >> This helps validating DTS files. Introduced changes: >> 1. Documented "reg" property >> 2. Documented "#reset-cells" property >> 3. Dropped "syscon" as it was incorrectly used >> 4. Adjusted "compatible" and "reg" in example >> >> Signed-off-by: Rafał Miłecki <rafal@milecki.pl> >> --- >> .../bindings/arm/mediatek/mediatek,hifsys.txt | 26 ---------- >> .../clock/mediatek,mt2701-hifsys.yaml | 51 +++++++++++++++++++ >> 2 files changed, 51 insertions(+), 26 deletions(-) >> delete mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,hifsys.txt >> create mode 100644 Documentation/devicetree/bindings/clock/mediatek,mt2701-hifsys.yaml >> >> diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,hifsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,hifsys.txt >> deleted file mode 100644 >> index 323905af82c3..000000000000 >> --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,hifsys.txt >> +++ /dev/null >> @@ -1,26 +0,0 @@ >> -Mediatek hifsys controller >> -============================ >> - >> -The Mediatek hifsys controller provides various clocks and reset >> -outputs to the system. >> - >> -Required Properties: >> - >> -- compatible: Should be: >> - - "mediatek,mt2701-hifsys", "syscon" >> - - "mediatek,mt7622-hifsys", "syscon" >> - - "mediatek,mt7623-hifsys", "mediatek,mt2701-hifsys", "syscon" >> -- #clock-cells: Must be 1 >> - >> -The hifsys controller uses the common clk binding from >> -Documentation/devicetree/bindings/clock/clock-bindings.txt >> -The available clocks are defined in dt-bindings/clock/mt*-clk.h. >> - >> -Example: >> - >> -hifsys: clock-controller@1a000000 { >> - compatible = "mediatek,mt2701-hifsys", "syscon"; >> - reg = <0 0x1a000000 0 0x1000>; >> - #clock-cells = <1>; >> - #reset-cells = <1>; >> -}; >> diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt2701-hifsys.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt2701-hifsys.yaml >> new file mode 100644 >> index 000000000000..eb429337cdf4 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/clock/mediatek,mt2701-hifsys.yaml >> @@ -0,0 +1,51 @@ >> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/clock/mediatek,mt2701-hifsys.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Mediatek hifsys controller > > Please, "MediaTek HIFSYS controller" Them maybe "clock controller" or "clock and reset controller"? Best regards, Krzysztof
Il 09/02/24 10:17, Krzysztof Kozlowski ha scritto: > On 09/02/2024 09:53, AngeloGioacchino Del Regno wrote: >> Il 08/02/24 22:59, Rafał Miłecki ha scritto: >>> From: Rafał Miłecki <rafal@milecki.pl> >>> >>> This helps validating DTS files. Introduced changes: >>> 1. Documented "reg" property >>> 2. Documented "#reset-cells" property >>> 3. Dropped "syscon" as it was incorrectly used >>> 4. Adjusted "compatible" and "reg" in example >>> >>> Signed-off-by: Rafał Miłecki <rafal@milecki.pl> >>> --- >>> .../bindings/arm/mediatek/mediatek,hifsys.txt | 26 ---------- >>> .../clock/mediatek,mt2701-hifsys.yaml | 51 +++++++++++++++++++ >>> 2 files changed, 51 insertions(+), 26 deletions(-) >>> delete mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,hifsys.txt >>> create mode 100644 Documentation/devicetree/bindings/clock/mediatek,mt2701-hifsys.yaml >>> >>> diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,hifsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,hifsys.txt >>> deleted file mode 100644 >>> index 323905af82c3..000000000000 >>> --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,hifsys.txt >>> +++ /dev/null >>> @@ -1,26 +0,0 @@ >>> -Mediatek hifsys controller >>> -============================ >>> - >>> -The Mediatek hifsys controller provides various clocks and reset >>> -outputs to the system. >>> - >>> -Required Properties: >>> - >>> -- compatible: Should be: >>> - - "mediatek,mt2701-hifsys", "syscon" >>> - - "mediatek,mt7622-hifsys", "syscon" >>> - - "mediatek,mt7623-hifsys", "mediatek,mt2701-hifsys", "syscon" >>> -- #clock-cells: Must be 1 >>> - >>> -The hifsys controller uses the common clk binding from >>> -Documentation/devicetree/bindings/clock/clock-bindings.txt >>> -The available clocks are defined in dt-bindings/clock/mt*-clk.h. >>> - >>> -Example: >>> - >>> -hifsys: clock-controller@1a000000 { >>> - compatible = "mediatek,mt2701-hifsys", "syscon"; >>> - reg = <0 0x1a000000 0 0x1000>; >>> - #clock-cells = <1>; >>> - #reset-cells = <1>; >>> -}; >>> diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt2701-hifsys.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt2701-hifsys.yaml >>> new file mode 100644 >>> index 000000000000..eb429337cdf4 >>> --- /dev/null >>> +++ b/Documentation/devicetree/bindings/clock/mediatek,mt2701-hifsys.yaml >>> @@ -0,0 +1,51 @@ >>> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause >>> +%YAML 1.2 >>> +--- >>> +$id: http://devicetree.org/schemas/clock/mediatek,mt2701-hifsys.yaml# >>> +$schema: http://devicetree.org/meta-schemas/core.yaml# >>> + >>> +title: Mediatek hifsys controller >> >> Please, "MediaTek HIFSYS controller" > > Them maybe "clock controller" or "clock and reset controller"? Yeah, that's right, let's prefer "clock and reset controller", as this binding does describe exactly only those two functionalities of the whole HIFSYS block. Cheers, Angelo > > > Best regards, > Krzysztof >
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,hifsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,hifsys.txt deleted file mode 100644 index 323905af82c3..000000000000 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,hifsys.txt +++ /dev/null @@ -1,26 +0,0 @@ -Mediatek hifsys controller -============================ - -The Mediatek hifsys controller provides various clocks and reset -outputs to the system. - -Required Properties: - -- compatible: Should be: - - "mediatek,mt2701-hifsys", "syscon" - - "mediatek,mt7622-hifsys", "syscon" - - "mediatek,mt7623-hifsys", "mediatek,mt2701-hifsys", "syscon" -- #clock-cells: Must be 1 - -The hifsys controller uses the common clk binding from -Documentation/devicetree/bindings/clock/clock-bindings.txt -The available clocks are defined in dt-bindings/clock/mt*-clk.h. - -Example: - -hifsys: clock-controller@1a000000 { - compatible = "mediatek,mt2701-hifsys", "syscon"; - reg = <0 0x1a000000 0 0x1000>; - #clock-cells = <1>; - #reset-cells = <1>; -}; diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt2701-hifsys.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt2701-hifsys.yaml new file mode 100644 index 000000000000..eb429337cdf4 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/mediatek,mt2701-hifsys.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/mediatek,mt2701-hifsys.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek hifsys controller + +description: + The Mediatek hifsys controller provides various clocks and reset outputs to + the system. + +maintainers: + - Matthias Brugger <matthias.bgg@gmail.com> + +properties: + compatible: + oneOf: + - items: + - enum: + - mediatek,mt2701-hifsys + - mediatek,mt7622-hifsys + - items: + - enum: + - mediatek,mt7623-hifsys + - const: mediatek,mt2701-hifsys + + reg: + maxItems: 1 + + "#clock-cells": + const: 1 + description: The available clocks are defined in dt-bindings/clock/mt*-clk.h + + "#reset-cells": + const: 1 + +required: + - reg + - "#clock-cells" + +additionalProperties: false + +examples: + - | + clock-controller@1a000000 { + compatible = "mediatek,mt2701-hifsys"; + reg = <0x1a000000 0x1000>; + #clock-cells = <1>; + #reset-cells = <1>; + };