Message ID | 20240207055856.672184-2-qiujingbao.dlmu@gmail.com |
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State | New |
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Tue, 06 Feb 2024 21:59:02 -0800 (PST) From: Jingbao Qiu <qiujingbao.dlmu@gmail.com> To: u.kleine-koenig@pengutronix.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu Cc: linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, dlan@gentoo.org, inochiama@outlook.com, Jingbao Qiu <qiujingbao.dlmu@gmail.com> Subject: [PATCH v1 1/2] dt-bindings: pwm: sophgo: add pwm for Sophgo CV1800 series SoC. Date: Wed, 7 Feb 2024 13:58:55 +0800 Message-Id: <20240207055856.672184-2-qiujingbao.dlmu@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240207055856.672184-1-qiujingbao.dlmu@gmail.com> References: <20240207055856.672184-1-qiujingbao.dlmu@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: <linux-kernel.vger.kernel.org> List-Subscribe: <mailto:linux-kernel+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-kernel+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1790218687149287051 X-GMAIL-MSGID: 1790218687149287051 |
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[v1,1/2] dt-bindings: pwm: sophgo: add pwm for Sophgo CV1800 series SoC.
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Commit Message
Jingbao Qiu
Feb. 7, 2024, 5:58 a.m. UTC
Add devicetree binding to describe the PWM for Sophgo CV1800 SoC.
Signed-off-by: Jingbao Qiu <qiujingbao.dlmu@gmail.com>
---
.../bindings/pwm/sophgo,cv1800-pwm.yaml | 45 +++++++++++++++++++
1 file changed, 45 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pwm/sophgo,cv1800-pwm.yaml
Comments
On 07/02/2024 06:58, Jingbao Qiu wrote: > Add devicetree binding to describe the PWM for Sophgo CV1800 SoC. > > Signed-off-by: Jingbao Qiu <qiujingbao.dlmu@gmail.com> > --- > .../bindings/pwm/sophgo,cv1800-pwm.yaml | 45 +++++++++++++++++++ > 1 file changed, 45 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pwm/sophgo,cv1800-pwm.yaml > If there is going to be resend: drop full stop from subject and re-order maintainers and description to match convention (look at other schemas and example-schema). Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
On Wed, Feb 7, 2024 at 3:45 PM Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote: > > On 07/02/2024 06:58, Jingbao Qiu wrote: > > Add devicetree binding to describe the PWM for Sophgo CV1800 SoC. > > > > Signed-off-by: Jingbao Qiu <qiujingbao.dlmu@gmail.com> > > --- > > .../bindings/pwm/sophgo,cv1800-pwm.yaml | 45 +++++++++++++++++++ > > 1 file changed, 45 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/pwm/sophgo,cv1800-pwm.yaml > > > > If there is going to be resend: drop full stop from subject and re-order > maintainers and description to match convention (look at other schemas > and example-schema). Thank you for your suggestion. I will fix it. Best regards, Jingbao Qiu
diff --git a/Documentation/devicetree/bindings/pwm/sophgo,cv1800-pwm.yaml b/Documentation/devicetree/bindings/pwm/sophgo,cv1800-pwm.yaml new file mode 100644 index 000000000000..7fcdf98b27fd --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/sophgo,cv1800-pwm.yaml @@ -0,0 +1,45 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/sophgo,cv1800-pwm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sophgo CV1800 PWM controller + +description: + The chip provides a set of four independent PWM channel outputs. + +maintainers: + - Jingbao Qiu <qiujingbao.dlmu@gmail.com> + +allOf: + - $ref: pwm.yaml# + +properties: + compatible: + const: sophgo,cv1800-pwm + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + "#pwm-cells": + const: 3 + +required: + - compatible + - reg + - clocks + +unevaluatedProperties: false + +examples: + - | + pwm0: pwm@3060000 { + compatible = "sophgo,cv1800-pwm"; + reg = <0x3060000 0x1000>; + clocks = <&clk 60>; + #pwm-cells = <3>; + };