diff mbox series

arm64: Add the arm64.no32bit_el0 command line option

Message ID 20240206185459.32465-1-andrea.porta@suse.com
State New
Headers
Series arm64: Add the arm64.no32bit_el0 command line option |

Commit Message

Andrea della Porta Feb. 6, 2024, 6:54 p.m. UTC 
  Introducing the field 'el0' to the idreg-override for register
ID_AA64PFR0_EL1. This field is also aliased to the new kernel
command line option 'arm64.no32bit_el0' as a more recognizable
and mnemonic name to disable the execution of 32 bit userspace
applications (i.e. avoid Aarch32 execution state in EL0) from
kernel command line.

Link: https://lore.kernel.org/r/ZVTleETzfFUchs77@apocalypse
Signed-off-by: Andrea della Porta <andrea.porta@suse.com>
---
 Documentation/admin-guide/kernel-parameters.txt | 3 +++
 arch/arm64/kernel/idreg-override.c              | 2 ++
 2 files changed, 5 insertions(+)

Comments

Randy Dunlap Feb. 6, 2024, 8:23 p.m. UTC | #1 
Hi--

On 2/6/24 10:54, Andrea della Porta wrote:
> Introducing the field 'el0' to the idreg-override for register
> ID_AA64PFR0_EL1. This field is also aliased to the new kernel
> command line option 'arm64.no32bit_el0' as a more recognizable
> and mnemonic name to disable the execution of 32 bit userspace
> applications (i.e. avoid Aarch32 execution state in EL0) from
> kernel command line.
> 
> Link: https://lore.kernel.org/r/ZVTleETzfFUchs77@apocalypse
> Signed-off-by: Andrea della Porta <andrea.porta@suse.com>
> ---
>  Documentation/admin-guide/kernel-parameters.txt | 3 +++
>  arch/arm64/kernel/idreg-override.c              | 2 ++
>  2 files changed, 5 insertions(+)
> 
> diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
> index 65731b060e3f..9f962deeef5a 100644
> --- a/Documentation/admin-guide/kernel-parameters.txt
> +++ b/Documentation/admin-guide/kernel-parameters.txt
> @@ -433,6 +433,9 @@
>  	arm64.nosve	[ARM64] Unconditionally disable Scalable Vector
>  			Extension support
>  
> +	arm64.no32bit_el0 [ARM64] Unconditionally disable the execution of
> +			32 bit applications
> +

That new entry is not in alphabetical order like it should be.

>  	ataflop=	[HW,M68k]
>  
>  	atarimouse=	[HW,MOUSE] Atari Mouse
diff mbox series

Patch

diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt
index 65731b060e3f..9f962deeef5a 100644
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -433,6 +433,9 @@ 
 	arm64.nosve	[ARM64] Unconditionally disable Scalable Vector
 			Extension support
 
+	arm64.no32bit_el0 [ARM64] Unconditionally disable the execution of
+			32 bit applications
+
 	ataflop=	[HW,M68k]
 
 	atarimouse=	[HW,MOUSE] Atari Mouse
diff --git a/arch/arm64/kernel/idreg-override.c b/arch/arm64/kernel/idreg-override.c
index e30fd9e32ef3..642cda19e42d 100644
--- a/arch/arm64/kernel/idreg-override.c
+++ b/arch/arm64/kernel/idreg-override.c
@@ -86,6 +86,7 @@  static const struct ftr_set_desc pfr0 __prel64_initconst = {
 	.override	= &id_aa64pfr0_override,
 	.fields		= {
 	        FIELD("sve", ID_AA64PFR0_EL1_SVE_SHIFT, pfr0_sve_filter),
+		FIELD("el0", ID_AA64PFR0_EL1_EL0_SHIFT, NULL),
 		{}
 	},
 };
@@ -197,6 +198,7 @@  static const struct {
 	{ "arm64.nomops",		"id_aa64isar2.mops=0" },
 	{ "arm64.nomte",		"id_aa64pfr1.mte=0" },
 	{ "nokaslr",			"arm64_sw.nokaslr=1" },
+	{ "arm64.no32bit_el0",		"id_aa64pfr0.el0=1" },
 };
 
 static int __init parse_hexdigit(const char *p, u64 *v)