diff mbox series

[v2,1/3] arm64: dts: imx8dxl: update flexcan[1-3] interrupt number

Message ID 20240130152547.272125-1-Frank.Li@nxp.com
State New
Headers
Series [v2,1/3] arm64: dts: imx8dxl: update flexcan[1-3] interrupt number |

Commit Message

Frank Li Jan. 30, 2024, 3:25 p.m. UTC 
  Update interrupt number of flexcan[1-3].

Signed-off-by: Frank Li <Frank.Li@nxp.com>
---

Notes:
    change from v1 to v2
    - none

 arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)

Comments

Shawn Guo Feb. 6, 2024, 10:45 a.m. UTC | #1 
On Tue, Jan 30, 2024 at 10:25:45AM -0500, Frank Li wrote:
> Update interrupt number of flexcan[1-3].
> 
> Signed-off-by: Frank Li <Frank.Li@nxp.com>

Applied all, thanks!
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi b/arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi
index f8fca86babda7..5d012c95222f5 100644
--- a/arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi
@@ -102,6 +102,18 @@  &edma3 {
 		     <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>;
 };
 
+&flexcan1 {
+	interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>;
+};
+
+&flexcan2 {
+	interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
+};
+
+&flexcan3 {
+	interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>;
+};
+
 &i2c0 {
 	compatible = "fsl,imx8dxl-lpi2c", "fsl,imx7ulp-lpi2c";
 	interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>;