diff mbox series

[v10,104/108] KVM: TDX: Silently ignore INIT/SIPI

Message ID	a888bb4d30de2e57b0eb5e61189349c86cab1a70.1667110240.git.isaku.yamahata@intel.com
State	New
Headers	Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; From: isaku.yamahata@intel.com To: kvm@vger.kernel.org, linux-kernel@vger.kernel.org Cc: isaku.yamahata@intel.com, isaku.yamahata@gmail.com, Paolo Bonzini <pbonzini@redhat.com>, erdemaktas@google.com, Sean Christopherson <seanjc@google.com>, Sagi Shahar <sagis@google.com>, David Matlack <dmatlack@google.com> Subject: [PATCH v10 104/108] KVM: TDX: Silently ignore INIT/SIPI Date: Sat, 29 Oct 2022 23:23:45 -0700 Message-Id: <a888bb4d30de2e57b0eb5e61189349c86cab1a70.1667110240.git.isaku.yamahata@intel.com> In-Reply-To: <cover.1667110240.git.isaku.yamahata@intel.com> References: <cover.1667110240.git.isaku.yamahata@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk
Series	KVM TDX basic feature support \| [v10,000/108] KVM TDX basic feature support [v10,001/108] KVM: VMX: Move out vmx_x86_ops to 'main.c' to wrap VMX and TDX [v10,002/108] KVM: x86: Refactor KVM VMX module init/exit functions [v10,003/108] KVM: TDX: Add placeholders for TDX VM/vcpu structure [v10,004/108] x86/virt/tdx: Add a helper function to return system wide info about TDX module [v10,005/108] KVM: TDX: Initialize the TDX module when loading the KVM intel kernel module [v10,006/108] KVM: x86: Introduce vm_type to differentiate default VMs from confidential VMs [v10,007/108] KVM: TDX: Make TDX VM type supported [v10,008/108,MARKER] The start of TDX KVM patch series: TDX architectural definitions [v10,009/108] KVM: TDX: Define TDX architectural definitions [v10,010/108] KVM: TDX: Add TDX "architectural" error codes [v10,011/108] KVM: TDX: Add C wrapper functions for SEAMCALLs to the TDX module [v10,012/108] KVM: TDX: Add helper functions to print TDX SEAMCALL error [v10,013/108,MARKER] The start of TDX KVM patch series: TD VM creation/destruction [v10,014/108] KVM: TDX: Stub in tdx.h with structs, accessors, and VMCS helpers [v10,015/108] x86/cpu: Add helper functions to allocate/free TDX private host key id [v10,016/108] KVM: TDX: create/destroy VM structure [v10,017/108] KVM: TDX: Refuse to unplug the last cpu on the package [v10,018/108] KVM: TDX: x86: Add ioctl to get TDX systemwide parameters [v10,019/108] KVM: TDX: Add place holder for TDX VM specific mem_enc_op ioctl [v10,020/108] KVM: Support KVM_CAP_MAX_VCPUS for KVM_ENABLE_CAP [v10,021/108] KVM: TDX: initialize VM with TDX specific parameters [v10,022/108] KVM: TDX: Make pmu_intel.c ignore guest TD case [v10,023/108,MARKER] The start of TDX KVM patch series: TD vcpu creation/destruction [v10,024/108] KVM: TDX: allocate/free TDX vcpu structure [v10,025/108] KVM: TDX: Do TDX specific vcpu initialization [v10,026/108] KVM: TDX: Use private memory for TDX [v10,027/108,MARKER] The start of TDX KVM patch series: KVM MMU GPA shared bits [v10,028/108] KVM: x86/mmu: introduce config for PRIVATE KVM MMU [v10,029/108] KVM: x86/mmu: Add address conversion functions for TDX shared bit of GPA [v10,030/108,MARKER] The start of TDX KVM patch series: KVM TDP refactoring for TDX [v10,031/108] KVM: x86/mmu: Replace hardcoded value 0 for the initial value for SPTE [v10,032/108] KVM: x86/mmu: Make sync_page not use hard-coded 0 as the initial SPTE value [v10,033/108] KVM: x86/mmu: Allow non-zero value for non-present SPTE and removed SPTE [v10,034/108] KVM: x86/mmu: Add Suppress VE bit to shadow_mmio_{value, mask} [v10,035/108] KVM: x86/mmu: Track shadow MMIO value on a per-VM basis [v10,036/108] KVM: TDX: Enable mmio spte caching always for TDX [v10,037/108] KVM: x86/mmu: Disallow fast page fault on private GPA [v10,038/108] KVM: x86/mmu: Allow per-VM override of the TDP max page level [v10,039/108] KVM: VMX: Introduce test mode related to EPT violation VE [v10,040/108,MARKER] The start of TDX KVM patch series: KVM TDP MMU hooks [v10,041/108] KVM: x86/tdp_mmu: refactor kvm_tdp_mmu_map() [v10,042/108] KVM: x86/tdp_mmu: Init role member of struct kvm_mmu_page at allocation [v10,043/108] KVM: x86/mmu: Require TDP MMU for TDX [v10,044/108] KVM: x86/mmu: Add a new is_private member for union kvm_mmu_page_role [v10,045/108] KVM: x86/mmu: Add a private pointer to struct kvm_mmu_page [v10,046/108] KVM: Add flags to struct kvm_gfn_range [v10,047/108] KVM: x86/tdp_mmu: Don't zap private pages for unsupported cases [v10,048/108] KVM: x86/tdp_mmu: Make handle_changed_spte() return value [v10,049/108] KVM: x86/tdp_mmu: Support TDX private mapping for TDP MMU [v10,050/108,MARKER] The start of TDX KVM patch series: TDX EPT violation [v10,051/108] KVM: x86/mmu: Disallow dirty logging for x86 TDX [v10,052/108] KVM: x86/tdp_mmu: Ignore unsupported mmu operation on private GFNs [v10,053/108] KVM: VMX: Split out guts of EPT violation to common/exposed function [v10,054/108] KVM: VMX: Move setting of EPT MMU masks to common VT-x code [v10,055/108] KVM: TDX: Add load_mmu_pgd method for TDX [v10,056/108] KVM: TDX: don't request KVM_REQ_APIC_PAGE_RELOAD [v10,057/108] KVM: x86/VMX: introduce vmx tlb_remote_flush and tlb_remote_flush_with_range [v10,058/108] KVM: TDX: TDP MMU TDX support [v10,059/108,MARKER] The start of TDX KVM patch series: KVM TDP MMU MapGPA [v10,060/108] KVM: Add functions to set GFN to private or shared [v10,061/108] KVM: x86/mmu: Introduce kvm_mmu_map_tdp_page() for use by TDX [v10,062/108] KVM: x86/tdp_mmu: implement MapGPA hypercall for TDX [v10,063/108,MARKER] The start of TDX KVM patch series: TD finalization [v10,064/108] KVM: TDX: Create initial guest memory [v10,065/108] KVM: TDX: Finalize VM initialization [v10,066/108,MARKER] The start of TDX KVM patch series: TD vcpu enter/exit [v10,067/108] KVM: TDX: Add helper assembly function to TDX vcpu [v10,068/108] KVM: TDX: Implement TDX vcpu enter/exit path [v10,069/108] KVM: TDX: vcpu_run: save/restore host state(host kernel gs) [v10,070/108] KVM: TDX: restore host xsave state when exit from the guest TD [v10,071/108] KVM: x86: Allow to update cached values in kvm_user_return_msrs w/o wrmsr [v10,072/108] KVM: TDX: restore user ret MSRs [v10,073/108,MARKER] The start of TDX KVM patch series: TD vcpu exits/interrupts/hypercalls [v10,074/108] KVM: TDX: complete interrupts after tdexit [v10,075/108] KVM: TDX: restore debug store when TD exit [v10,076/108] KVM: TDX: handle vcpu migration over logical processor [v10,077/108] KVM: x86: Add a switch_db_regs flag to handle TDX's auto-switched behavior [v10,078/108] KVM: TDX: Add support for find pending IRQ in a protected local APIC [v10,079/108] KVM: x86: Assume timer IRQ was injected if APIC state is proteced [v10,080/108] KVM: TDX: remove use of struct vcpu_vmx from posted_interrupt.c [v10,081/108] KVM: TDX: Implement interrupt injection [v10,082/108] KVM: TDX: Implements vcpu request_immediate_exit [v10,083/108] KVM: TDX: Implement methods to inject NMI [v10,084/108] KVM: VMX: Modify NMI and INTR handlers to take intr_info as function argument [v10,085/108] KVM: VMX: Move NMI/exception handler to common helper [v10,086/108] KVM: x86: Split core of hypercall emulation to helper function [v10,087/108] KVM: TDX: Add a place holder to handle TDX VM exit [v10,088/108] KVM: TDX: Retry seamcall when TDX_OPERAND_BUSY with operand SEPT [v10,089/108] KVM: TDX: handle EXIT_REASON_OTHER_SMI [v10,090/108] KVM: TDX: handle ept violation/misconfig exit [v10,091/108] KVM: TDX: handle EXCEPTION_NMI and EXTERNAL_INTERRUPT [v10,092/108] KVM: TDX: Add a place holder for handler of TDX hypercalls (TDG.VP.VMCALL) [v10,093/108] KVM: TDX: handle KVM hypercall with TDG.VP.VMCALL [v10,094/108] KVM: TDX: Handle TDX PV CPUID hypercall [v10,095/108] KVM: TDX: Handle TDX PV HLT hypercall [v10,096/108] KVM: TDX: Handle TDX PV port io hypercall [v10,097/108] KVM: TDX: Handle TDX PV MMIO hypercall [v10,098/108] KVM: TDX: Implement callbacks for MSR operations for TDX [v10,099/108] KVM: TDX: Handle TDX PV rdmsr/wrmsr hypercall [v10,100/108] KVM: TDX: Handle TDX PV report fatal error hypercall [v10,101/108] KVM: TDX: Handle TDX PV map_gpa hypercall [v10,102/108] KVM: TDX: Handle TDG.VP.VMCALL<GetTdVmCallInfo> hypercall [v10,103/108] KVM: TDX: Silently discard SMI request [v10,104/108] KVM: TDX: Silently ignore INIT/SIPI [v10,105/108] KVM: TDX: Add methods to ignore accesses to CPU state [v10,106/108] Documentation/virt/kvm: Document on Trust Domain Extensions(TDX) [v10,107/108] KVM: x86: design documentation on TDX support of x86 KVM TDP MMU [v10,108/108,MARKER] the end of (the first phase of) TDX KVM patch series

Commit Message

Isaku Yamahata Oct. 30, 2022, 6:23 a.m. UTC

  From: Isaku Yamahata <isaku.yamahata@intel.com>

The TDX module API doesn't provide API for VMM to inject INIT IPI and SIPI.
Instead it defines the different protocols to boot application processors.
Ignore INIT and SIPI events for the TDX guest.

There are two options. 1) (silently) ignore INIT/SIPI request or 2) return
error to guest TDs somehow.  Given that TDX guest is paravirtualized to
boot AP, the option 1 is chosen for simplicity.

Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com>
---
 arch/x86/include/asm/kvm-x86-ops.h |  1 +
 arch/x86/include/asm/kvm_host.h    |  2 ++
 arch/x86/kvm/lapic.c               | 19 ++++++++++++-------
 arch/x86/kvm/svm/svm.c             |  1 +
 arch/x86/kvm/vmx/main.c            | 22 +++++++++++++++++++++-
 5 files changed, 37 insertions(+), 8 deletions(-)

Comments

Binbin Wu Nov. 23, 2022, 3:17 p.m. UTC | #1

On 10/30/2022 2:23 PM, isaku.yamahata@intel.com wrote:
> From: Isaku Yamahata <isaku.yamahata@intel.com>
>
> The TDX module API doesn't provide API for VMM to inject INIT IPI and SIPI.
> Instead it defines the different protocols to boot application processors.
> Ignore INIT and SIPI events for the TDX guest.
>
> There are two options. 1) (silently) ignore INIT/SIPI request or 2) return
> error to guest TDs somehow.  Given that TDX guest is paravirtualized to
> boot AP, the option 1 is chosen for simplicity.
>
> Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com>
> ---
>   arch/x86/include/asm/kvm-x86-ops.h |  1 +
>   arch/x86/include/asm/kvm_host.h    |  2 ++
>   arch/x86/kvm/lapic.c               | 19 ++++++++++++-------
>   arch/x86/kvm/svm/svm.c             |  1 +
>   arch/x86/kvm/vmx/main.c            | 22 +++++++++++++++++++++-
>   5 files changed, 37 insertions(+), 8 deletions(-)
>
> diff --git a/arch/x86/include/asm/kvm-x86-ops.h b/arch/x86/include/asm/kvm-x86-ops.h
> index 17c3828d42a3..4e9b96480716 100644
> --- a/arch/x86/include/asm/kvm-x86-ops.h
> +++ b/arch/x86/include/asm/kvm-x86-ops.h
> @@ -140,6 +140,7 @@ KVM_X86_OP_OPTIONAL(migrate_timers)
>   KVM_X86_OP(msr_filter_changed)
>   KVM_X86_OP(complete_emulated_msr)
>   KVM_X86_OP(vcpu_deliver_sipi_vector)
> +KVM_X86_OP(vcpu_deliver_init)
>   KVM_X86_OP_OPTIONAL_RET0(vcpu_get_apicv_inhibit_reasons);
>   KVM_X86_OP(check_processor_compatibility)
>   
> diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
> index 094fff5414e1..df67ca7b23d3 100644
> --- a/arch/x86/include/asm/kvm_host.h
> +++ b/arch/x86/include/asm/kvm_host.h
> @@ -1706,6 +1706,7 @@ struct kvm_x86_ops {
>   	int (*complete_emulated_msr)(struct kvm_vcpu *vcpu, int err);
>   
>   	void (*vcpu_deliver_sipi_vector)(struct kvm_vcpu *vcpu, u8 vector);
> +	void (*vcpu_deliver_init)(struct kvm_vcpu *vcpu);
>   
>   	/*
>   	 * Returns vCPU specific APICv inhibit reasons
> @@ -1914,6 +1915,7 @@ int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu);
>   void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
>   int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg);
>   void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector);
> +void kvm_vcpu_deliver_init(struct kvm_vcpu *vcpu);
>   
>   int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
>   		    int reason, bool has_error_code, u32 error_code);
> diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
> index 7a1d612bd138..7393d858ed72 100644
> --- a/arch/x86/kvm/lapic.c
> +++ b/arch/x86/kvm/lapic.c
> @@ -3035,6 +3035,16 @@ int kvm_lapic_set_pv_eoi(struct kvm_vcpu *vcpu, u64 data, unsigned long len)
>   	return 0;
>   }
>   
> +void kvm_vcpu_deliver_init(struct kvm_vcpu *vcpu)
> +{
> +	kvm_vcpu_reset(vcpu, true);
> +	if (kvm_vcpu_is_bsp(vcpu))
> +		vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
> +	else
> +		vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
> +}
> +EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_init);
> +
>   int kvm_apic_accept_events(struct kvm_vcpu *vcpu)
>   {
>   	struct kvm_lapic *apic = vcpu->arch.apic;
> @@ -3066,13 +3076,8 @@ int kvm_apic_accept_events(struct kvm_vcpu *vcpu)
>   		return 0;
>   	}
>   
> -	if (test_and_clear_bit(KVM_APIC_INIT, &apic->pending_events)) {
> -		kvm_vcpu_reset(vcpu, true);
> -		if (kvm_vcpu_is_bsp(apic->vcpu))
> -			vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
> -		else
> -			vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
> -	}
> +	if (test_and_clear_bit(KVM_APIC_INIT, &apic->pending_events))
> +		static_call(kvm_x86_vcpu_deliver_init)(vcpu);
>   	if (test_and_clear_bit(KVM_APIC_SIPI, &apic->pending_events)) {
>   		if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
>   			/* evaluate pending_events before reading the vector */
> diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
> index 2bcf2e1a5271..5d56b0f1f595 100644
> --- a/arch/x86/kvm/svm/svm.c
> +++ b/arch/x86/kvm/svm/svm.c
> @@ -4857,6 +4857,7 @@ static struct kvm_x86_ops svm_x86_ops __initdata = {
>   	.complete_emulated_msr = svm_complete_emulated_msr,
>   
>   	.vcpu_deliver_sipi_vector = svm_vcpu_deliver_sipi_vector,
> +	.vcpu_deliver_init = kvm_vcpu_deliver_init,
>   	.vcpu_get_apicv_inhibit_reasons = avic_vcpu_get_apicv_inhibit_reasons,
>   };
>   
> diff --git a/arch/x86/kvm/vmx/main.c b/arch/x86/kvm/vmx/main.c
> index 4acba8d8cb27..d776d5d169d0 100644
> --- a/arch/x86/kvm/vmx/main.c
> +++ b/arch/x86/kvm/vmx/main.c
> @@ -286,6 +286,25 @@ static void vt_deliver_interrupt(struct kvm_lapic *apic, int delivery_mode,
>   	vmx_deliver_interrupt(apic, delivery_mode, trig_mode, vector);
>   }
>   
> +static void vt_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
> +{
> +	if (is_td_vcpu(vcpu))
> +		return;
> +
> +	kvm_vcpu_deliver_sipi_vector(vcpu, vector);
> +}
> +
> +static void vt_vcpu_deliver_init(struct kvm_vcpu *vcpu)
> +{
> +	if (is_td_vcpu(vcpu)) {
> +		/* TDX doesn't support INIT.  Ignore INIT event */
> +		vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
> +		return;
> +	}
> +
> +	kvm_vcpu_deliver_init(vcpu);
> +}
> +

Is it better to add WARN_ON_ONCE in the above two functions for TD case?


>   static void vt_flush_tlb_all(struct kvm_vcpu *vcpu)
>   {
>   	if (is_td_vcpu(vcpu))
> @@ -627,7 +646,8 @@ struct kvm_x86_ops vt_x86_ops __initdata = {
>   	.msr_filter_changed = vmx_msr_filter_changed,
>   	.complete_emulated_msr = kvm_complete_insn_gp,
>   
> -	.vcpu_deliver_sipi_vector = kvm_vcpu_deliver_sipi_vector,
> +	.vcpu_deliver_sipi_vector = vt_vcpu_deliver_sipi_vector,
> +	.vcpu_deliver_init = vt_vcpu_deliver_init,
>   
>   	.dev_mem_enc_ioctl = tdx_dev_ioctl,
>   	.mem_enc_ioctl = vt_mem_enc_ioctl,

Isaku Yamahata Dec. 16, 2022, 3:50 a.m. UTC | #2

On Wed, Nov 23, 2022 at 11:17:44PM +0800,
Binbin Wu <binbin.wu@linux.intel.com> wrote:

> > diff --git a/arch/x86/kvm/vmx/main.c b/arch/x86/kvm/vmx/main.c
> > index 4acba8d8cb27..d776d5d169d0 100644
> > --- a/arch/x86/kvm/vmx/main.c
> > +++ b/arch/x86/kvm/vmx/main.c
> > @@ -286,6 +286,25 @@ static void vt_deliver_interrupt(struct kvm_lapic *apic, int delivery_mode,
> >   	vmx_deliver_interrupt(apic, delivery_mode, trig_mode, vector);
> >   }
> > +static void vt_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
> > +{
> > +	if (is_td_vcpu(vcpu))
> > +		return;
> > +
> > +	kvm_vcpu_deliver_sipi_vector(vcpu, vector);
> > +}
> > +
> > +static void vt_vcpu_deliver_init(struct kvm_vcpu *vcpu)
> > +{
> > +	if (is_td_vcpu(vcpu)) {
> > +		/* TDX doesn't support INIT.  Ignore INIT event */
> > +		vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
> > +		return;
> > +	}
> > +
> > +	kvm_vcpu_deliver_init(vcpu);
> > +}
> > +
> 
> Is it better to add WARN_ON_ONCE in the above two functions for TD case?

No because KVM_SET_VCPU_EVENTS ioctl can trigger those callback.

Sean Christopherson Dec. 16, 2022, 3:49 p.m. UTC | #3

On Sat, Oct 29, 2022, isaku.yamahata@intel.com wrote:
> From: Isaku Yamahata <isaku.yamahata@intel.com>
> 
> The TDX module API doesn't provide API for VMM to inject INIT IPI and SIPI.
> Instead it defines the different protocols to boot application processors.
> Ignore INIT and SIPI events for the TDX guest.
> 
> There are two options. 1) (silently) ignore INIT/SIPI request or 2) return
> error to guest TDs somehow.  Given that TDX guest is paravirtualized to
> boot AP, the option 1 is chosen for simplicity.
> 
> Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com>
> ---

...

> diff --git a/arch/x86/kvm/vmx/main.c b/arch/x86/kvm/vmx/main.c
> index 4acba8d8cb27..d776d5d169d0 100644
> --- a/arch/x86/kvm/vmx/main.c
> +++ b/arch/x86/kvm/vmx/main.c
> @@ -286,6 +286,25 @@ static void vt_deliver_interrupt(struct kvm_lapic *apic, int delivery_mode,
>  	vmx_deliver_interrupt(apic, delivery_mode, trig_mode, vector);
>  }
>  
> +static void vt_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
> +{
> +	if (is_td_vcpu(vcpu))
> +		return;
> +
> +	kvm_vcpu_deliver_sipi_vector(vcpu, vector);
> +}
> +
> +static void vt_vcpu_deliver_init(struct kvm_vcpu *vcpu)
> +{
> +	if (is_td_vcpu(vcpu)) {
> +		/* TDX doesn't support INIT.  Ignore INIT event */
> +		vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
> +		return;
> +	}
> +
> +	kvm_vcpu_deliver_init(vcpu);
> +}
> +
>  static void vt_flush_tlb_all(struct kvm_vcpu *vcpu)
>  {
>  	if (is_td_vcpu(vcpu))
> @@ -627,7 +646,8 @@ struct kvm_x86_ops vt_x86_ops __initdata = {
>  	.msr_filter_changed = vmx_msr_filter_changed,
>  	.complete_emulated_msr = kvm_complete_insn_gp,
>  
> -	.vcpu_deliver_sipi_vector = kvm_vcpu_deliver_sipi_vector,
> +	.vcpu_deliver_sipi_vector = vt_vcpu_deliver_sipi_vector,
> +	.vcpu_deliver_init = vt_vcpu_deliver_init,

A simpler, and arguably more correct, appraoch would be to hook .apic_init_signal_blocked()
and have that return true for TDX.  Waiting until delivery means the vCPU will get
spurious wake events, e.g. KVM will wake the vCPU to service the INIT, but then
ignore the INIT.  Of course, sending the bogus INIT/SIPI in the first place
is a guest bug.

That would also prevent userspace from putting the vCPU into INIT/SIPI via
KVM_SET_MP_STATE.

Ideally, KVM would never mark INIT or SIPI pending in the first place, though I'm
not sure that's worth the effort.

diff mbox series

Patch

diff --git a/arch/x86/include/asm/kvm-x86-ops.h b/arch/x86/include/asm/kvm-x86-ops.h
index 17c3828d42a3..4e9b96480716 100644
--- a/arch/x86/include/asm/kvm-x86-ops.h
+++ b/arch/x86/include/asm/kvm-x86-ops.h
@@ -140,6 +140,7 @@  KVM_X86_OP_OPTIONAL(migrate_timers)
 KVM_X86_OP(msr_filter_changed)
 KVM_X86_OP(complete_emulated_msr)
 KVM_X86_OP(vcpu_deliver_sipi_vector)
+KVM_X86_OP(vcpu_deliver_init)
 KVM_X86_OP_OPTIONAL_RET0(vcpu_get_apicv_inhibit_reasons);
 KVM_X86_OP(check_processor_compatibility)
 
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index 094fff5414e1..df67ca7b23d3 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -1706,6 +1706,7 @@  struct kvm_x86_ops {
 	int (*complete_emulated_msr)(struct kvm_vcpu *vcpu, int err);
 
 	void (*vcpu_deliver_sipi_vector)(struct kvm_vcpu *vcpu, u8 vector);
+	void (*vcpu_deliver_init)(struct kvm_vcpu *vcpu);
 
 	/*
 	 * Returns vCPU specific APICv inhibit reasons
@@ -1914,6 +1915,7 @@  int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu);
 void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector, int seg);
 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector);
+void kvm_vcpu_deliver_init(struct kvm_vcpu *vcpu);
 
 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
 		    int reason, bool has_error_code, u32 error_code);
diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index 7a1d612bd138..7393d858ed72 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -3035,6 +3035,16 @@  int kvm_lapic_set_pv_eoi(struct kvm_vcpu *vcpu, u64 data, unsigned long len)
 	return 0;
 }
 
+void kvm_vcpu_deliver_init(struct kvm_vcpu *vcpu)
+{
+	kvm_vcpu_reset(vcpu, true);
+	if (kvm_vcpu_is_bsp(vcpu))
+		vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
+	else
+		vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
+}
+EXPORT_SYMBOL_GPL(kvm_vcpu_deliver_init);
+
 int kvm_apic_accept_events(struct kvm_vcpu *vcpu)
 {
 	struct kvm_lapic *apic = vcpu->arch.apic;
@@ -3066,13 +3076,8 @@  int kvm_apic_accept_events(struct kvm_vcpu *vcpu)
 		return 0;
 	}
 
-	if (test_and_clear_bit(KVM_APIC_INIT, &apic->pending_events)) {
-		kvm_vcpu_reset(vcpu, true);
-		if (kvm_vcpu_is_bsp(apic->vcpu))
-			vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
-		else
-			vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
-	}
+	if (test_and_clear_bit(KVM_APIC_INIT, &apic->pending_events))
+		static_call(kvm_x86_vcpu_deliver_init)(vcpu);
 	if (test_and_clear_bit(KVM_APIC_SIPI, &apic->pending_events)) {
 		if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
 			/* evaluate pending_events before reading the vector */
diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
index 2bcf2e1a5271..5d56b0f1f595 100644
--- a/arch/x86/kvm/svm/svm.c
+++ b/arch/x86/kvm/svm/svm.c
@@ -4857,6 +4857,7 @@  static struct kvm_x86_ops svm_x86_ops __initdata = {
 	.complete_emulated_msr = svm_complete_emulated_msr,
 
 	.vcpu_deliver_sipi_vector = svm_vcpu_deliver_sipi_vector,
+	.vcpu_deliver_init = kvm_vcpu_deliver_init,
 	.vcpu_get_apicv_inhibit_reasons = avic_vcpu_get_apicv_inhibit_reasons,
 };
 
diff --git a/arch/x86/kvm/vmx/main.c b/arch/x86/kvm/vmx/main.c
index 4acba8d8cb27..d776d5d169d0 100644
--- a/arch/x86/kvm/vmx/main.c
+++ b/arch/x86/kvm/vmx/main.c
@@ -286,6 +286,25 @@  static void vt_deliver_interrupt(struct kvm_lapic *apic, int delivery_mode,
 	vmx_deliver_interrupt(apic, delivery_mode, trig_mode, vector);
 }
 
+static void vt_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
+{
+	if (is_td_vcpu(vcpu))
+		return;
+
+	kvm_vcpu_deliver_sipi_vector(vcpu, vector);
+}
+
+static void vt_vcpu_deliver_init(struct kvm_vcpu *vcpu)
+{
+	if (is_td_vcpu(vcpu)) {
+		/* TDX doesn't support INIT.  Ignore INIT event */
+		vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
+		return;
+	}
+
+	kvm_vcpu_deliver_init(vcpu);
+}
+
 static void vt_flush_tlb_all(struct kvm_vcpu *vcpu)
 {
 	if (is_td_vcpu(vcpu))
@@ -627,7 +646,8 @@  struct kvm_x86_ops vt_x86_ops __initdata = {
 	.msr_filter_changed = vmx_msr_filter_changed,
 	.complete_emulated_msr = kvm_complete_insn_gp,
 
-	.vcpu_deliver_sipi_vector = kvm_vcpu_deliver_sipi_vector,
+	.vcpu_deliver_sipi_vector = vt_vcpu_deliver_sipi_vector,
+	.vcpu_deliver_init = vt_vcpu_deliver_init,
 
 	.dev_mem_enc_ioctl = tdx_dev_ioctl,
 	.mem_enc_ioctl = vt_mem_enc_ioctl,