diff mbox series

[RFC,11/13] arm64: dts: ti: k3-am62p: Add missing properties for MMC

Message ID 20240131003714.2779593-12-jm@ti.com
State New
Headers
Series Add tuning algorithm for delay chain |

Commit Message

Judith Mendez Jan. 31, 2024, 12:37 a.m. UTC 
  Add missing properties to enable HS200 timing for MMC0 and
SDR104 timing for MMC1 according to the datasheet [0] for
AM62p device, refer to Table 7-79 for MMC0 and Table 7-97
for MMC1/MMC2.

[0] https://www.ti.com/lit/ds/symlink/am625.pdf

Signed-off-by: Judith Mendez <jm@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 44 +++++++++++++++++++++--
 arch/arm64/boot/dts/ti/k3-am62p5-sk.dts   |  6 ++--
 2 files changed, 45 insertions(+), 5 deletions(-)

Comments

Roger Quadros Feb. 2, 2024, 9:50 a.m. UTC | #1 
On 31/01/2024 02:37, Judith Mendez wrote:
> Add missing properties to enable HS200 timing for MMC0 and
> SDR104 timing for MMC1 according to the datasheet [0] for
> AM62p device, refer to Table 7-79 for MMC0 and Table 7-97
> for MMC1/MMC2.
> 
> [0] https://www.ti.com/lit/ds/symlink/am625.pdf
> 
> Signed-off-by: Judith Mendez <jm@ti.com>
> ---
>  arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 44 +++++++++++++++++++++--
>  arch/arm64/boot/dts/ti/k3-am62p5-sk.dts   |  6 ++--
>  2 files changed, 45 insertions(+), 5 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
> index 4c51bae06b57..f743700dd5bd 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
> @@ -534,7 +534,21 @@ sdhci0: mmc@fa10000 {
>  		clock-names = "clk_ahb", "clk_xin";
>  		assigned-clocks = <&k3_clks 57 2>;
>  		assigned-clock-parents = <&k3_clks 57 4>;
> -		ti,otap-del-sel-legacy = <0x0>;
> +		bus-width = <8>;
> +		mmc-ddr-1_8v;
> +		mmc-hs200-1_8v;
> +		mmc-hs400-1_8v;
> +		ti,clkbuf-sel = <0x7>;
> +		ti,strobe-sel = <0x77>;
> +		ti,trm-icp = <0x8>;
> +		ti,otap-del-sel-legacy = <0x1>;
> +		ti,otap-del-sel-mmc-hs = <0x1>;
> +		ti,otap-del-sel-ddr52 = <0x6>;
> +		ti,otap-del-sel-hs200 = <0x8>;
> +		ti,otap-del-sel-hs400 = <0x5>;
> +		ti,itap-del-sel-legacy = <0x10>;
> +		ti,itap-del-sel-mmc-hs = <0xa>;
> +		ti,itap-del-sel-ddr52 = <0x3>;
>  		status = "disabled";
>  	};
>  
> @@ -545,7 +559,19 @@ sdhci1: mmc@fa00000 {
>  		power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>;
>  		clocks = <&k3_clks 58 5>, <&k3_clks 58 6>;
>  		clock-names = "clk_ahb", "clk_xin";
> -		ti,otap-del-sel-legacy = <0x8>;
> +		bus-width = <4>;
> +		ti,clkbuf-sel = <0x7>;
> +		ti,otap-del-sel-legacy = <0x0>;
> +		ti,otap-del-sel-sd-hs = <0x0>;
> +		ti,otap-del-sel-sdr12 = <0xf>;
> +		ti,otap-del-sel-sdr25 = <0xf>;
> +		ti,otap-del-sel-sdr50 = <0xc>;
> +		ti,otap-del-sel-ddr50 = <0x9>;
> +		ti,otap-del-sel-sdr104 = <0x6>;
> +		ti,itap-del-sel-legacy = <0x0>;
> +		ti,itap-del-sel-sd-hs = <0x0>;
> +		ti,itap-del-sel-sdr12 = <0x0>;
> +		ti,itap-del-sel-sdr25 = <0x0>;
>  		status = "disabled";
>  	};
>  
> @@ -556,7 +582,19 @@ sdhci2: mmc@fa20000 {
>  		power-domains = <&k3_pds 184 TI_SCI_PD_EXCLUSIVE>;
>  		clocks = <&k3_clks 184 5>, <&k3_clks 184 6>;
>  		clock-names = "clk_ahb", "clk_xin";
> -		ti,otap-del-sel-legacy = <0x8>;
> +		bus-width = <4>;
> +		ti,clkbuf-sel = <0x7>;
> +		ti,otap-del-sel-legacy = <0x0>;
> +		ti,otap-del-sel-sd-hs = <0x0>;
> +		ti,otap-del-sel-sdr12 = <0xf>;
> +		ti,otap-del-sel-sdr25 = <0xf>;
> +		ti,otap-del-sel-sdr50 = <0xc>;
> +		ti,otap-del-sel-ddr50 = <0x9>;
> +		ti,otap-del-sel-sdr104 = <0x6>;
> +		ti,itap-del-sel-legacy = <0x0>;
> +		ti,itap-del-sel-sd-hs = <0x0>;
> +		ti,itap-del-sel-sdr12 = <0x0>;
> +		ti,itap-del-sel-sdr25 = <0x0>;
>  		status = "disabled";
>  	};
>  
> diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
> index 1773c05f752c..10156a04a92c 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
> +++ b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
> @@ -410,13 +410,17 @@ &main_i2c2 {
>  };
>  
>  &sdhci0 {
> +	/* eMMC */
> +	bootph-all;
>  	status = "okay";
> +	non-removable;
>  	ti,driver-strength-ohm = <50>;
>  	disable-wp;
>  };
>  
>  &sdhci1 {
>  	/* SD/MMC */
> +	bootph-all;
>  	status = "okay";
>  	vmmc-supply = <&vdd_mmc1>;
>  	vqmmc-supply = <&vddshv_sdio>;
> @@ -424,8 +428,6 @@ &sdhci1 {
>  	pinctrl-0 = <&main_mmc1_pins_default>;
>  	ti,driver-strength-ohm = <50>;
>  	disable-wp;
> -	no-1-8-v;

Why was 'no-1-8-v' removed?

> -	bootph-all;
>  };
>  
>  &cpsw3g {
Judith Mendez Feb. 12, 2024, 11:38 p.m. UTC | #2 
Hi Roger,

On 2/2/24 3:50 AM, Roger Quadros wrote:
> 
> 
> On 31/01/2024 02:37, Judith Mendez wrote:
>> Add missing properties to enable HS200 timing for MMC0 and
>> SDR104 timing for MMC1 according to the datasheet [0] for
>> AM62p device, refer to Table 7-79 for MMC0 and Table 7-97
>> for MMC1/MMC2.
>>
>> [0] https://www.ti.com/lit/ds/symlink/am625.pdf
>>
>> Signed-off-by: Judith Mendez <jm@ti.com>
>> ---
>>   arch/arm64/boot/dts/ti/k3-am62p-main.dtsi | 44 +++++++++++++++++++++--
>>   arch/arm64/boot/dts/ti/k3-am62p5-sk.dts   |  6 ++--
>>   2 files changed, 45 insertions(+), 5 deletions(-)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
>> index 4c51bae06b57..f743700dd5bd 100644
>> --- a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
>> @@ -534,7 +534,21 @@ sdhci0: mmc@fa10000 {
>>   		clock-names = "clk_ahb", "clk_xin";
>>   		assigned-clocks = <&k3_clks 57 2>;
>>   		assigned-clock-parents = <&k3_clks 57 4>;
>> -		ti,otap-del-sel-legacy = <0x0>;
>> +		bus-width = <8>;
>> +		mmc-ddr-1_8v;
>> +		mmc-hs200-1_8v;
>> +		mmc-hs400-1_8v;
>> +		ti,clkbuf-sel = <0x7>;
>> +		ti,strobe-sel = <0x77>;
>> +		ti,trm-icp = <0x8>;
>> +		ti,otap-del-sel-legacy = <0x1>;
>> +		ti,otap-del-sel-mmc-hs = <0x1>;
>> +		ti,otap-del-sel-ddr52 = <0x6>;
>> +		ti,otap-del-sel-hs200 = <0x8>;
>> +		ti,otap-del-sel-hs400 = <0x5>;
>> +		ti,itap-del-sel-legacy = <0x10>;
>> +		ti,itap-del-sel-mmc-hs = <0xa>;
>> +		ti,itap-del-sel-ddr52 = <0x3>;
>>   		status = "disabled";
>>   	};
>>   
>> @@ -545,7 +559,19 @@ sdhci1: mmc@fa00000 {
>>   		power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>;
>>   		clocks = <&k3_clks 58 5>, <&k3_clks 58 6>;
>>   		clock-names = "clk_ahb", "clk_xin";
>> -		ti,otap-del-sel-legacy = <0x8>;
>> +		bus-width = <4>;
>> +		ti,clkbuf-sel = <0x7>;
>> +		ti,otap-del-sel-legacy = <0x0>;
>> +		ti,otap-del-sel-sd-hs = <0x0>;
>> +		ti,otap-del-sel-sdr12 = <0xf>;
>> +		ti,otap-del-sel-sdr25 = <0xf>;
>> +		ti,otap-del-sel-sdr50 = <0xc>;
>> +		ti,otap-del-sel-ddr50 = <0x9>;
>> +		ti,otap-del-sel-sdr104 = <0x6>;
>> +		ti,itap-del-sel-legacy = <0x0>;
>> +		ti,itap-del-sel-sd-hs = <0x0>;
>> +		ti,itap-del-sel-sdr12 = <0x0>;
>> +		ti,itap-del-sel-sdr25 = <0x0>;
>>   		status = "disabled";
>>   	};
>>   
>> @@ -556,7 +582,19 @@ sdhci2: mmc@fa20000 {
>>   		power-domains = <&k3_pds 184 TI_SCI_PD_EXCLUSIVE>;
>>   		clocks = <&k3_clks 184 5>, <&k3_clks 184 6>;
>>   		clock-names = "clk_ahb", "clk_xin";
>> -		ti,otap-del-sel-legacy = <0x8>;
>> +		bus-width = <4>;
>> +		ti,clkbuf-sel = <0x7>;
>> +		ti,otap-del-sel-legacy = <0x0>;
>> +		ti,otap-del-sel-sd-hs = <0x0>;
>> +		ti,otap-del-sel-sdr12 = <0xf>;
>> +		ti,otap-del-sel-sdr25 = <0xf>;
>> +		ti,otap-del-sel-sdr50 = <0xc>;
>> +		ti,otap-del-sel-ddr50 = <0x9>;
>> +		ti,otap-del-sel-sdr104 = <0x6>;
>> +		ti,itap-del-sel-legacy = <0x0>;
>> +		ti,itap-del-sel-sd-hs = <0x0>;
>> +		ti,itap-del-sel-sdr12 = <0x0>;
>> +		ti,itap-del-sel-sdr25 = <0x0>;
>>   		status = "disabled";
>>   	};
>>   
>> diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
>> index 1773c05f752c..10156a04a92c 100644
>> --- a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
>> +++ b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
>> @@ -410,13 +410,17 @@ &main_i2c2 {
>>   };
>>   
>>   &sdhci0 {
>> +	/* eMMC */
>> +	bootph-all;
>>   	status = "okay";
>> +	non-removable;
>>   	ti,driver-strength-ohm = <50>;
>>   	disable-wp;
>>   };
>>   
>>   &sdhci1 {
>>   	/* SD/MMC */
>> +	bootph-all;
>>   	status = "okay";
>>   	vmmc-supply = <&vdd_mmc1>;
>>   	vqmmc-supply = <&vddshv_sdio>;
>> @@ -424,8 +428,6 @@ &sdhci1 {
>>   	pinctrl-0 = <&main_mmc1_pins_default>;
>>   	ti,driver-strength-ohm = <50>;
>>   	disable-wp;
>> -	no-1-8-v;
> 
> Why was 'no-1-8-v' removed?

To enable HS400 timing, the no-1-8-v property should
be removed. I add this comment in patch description for
v1.

Thanks for reviewing!

~ Judith

> 
>> -	bootph-all;
>>   };
>>   
>>   &cpsw3g {
>
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
index 4c51bae06b57..f743700dd5bd 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
@@ -534,7 +534,21 @@  sdhci0: mmc@fa10000 {
 		clock-names = "clk_ahb", "clk_xin";
 		assigned-clocks = <&k3_clks 57 2>;
 		assigned-clock-parents = <&k3_clks 57 4>;
-		ti,otap-del-sel-legacy = <0x0>;
+		bus-width = <8>;
+		mmc-ddr-1_8v;
+		mmc-hs200-1_8v;
+		mmc-hs400-1_8v;
+		ti,clkbuf-sel = <0x7>;
+		ti,strobe-sel = <0x77>;
+		ti,trm-icp = <0x8>;
+		ti,otap-del-sel-legacy = <0x1>;
+		ti,otap-del-sel-mmc-hs = <0x1>;
+		ti,otap-del-sel-ddr52 = <0x6>;
+		ti,otap-del-sel-hs200 = <0x8>;
+		ti,otap-del-sel-hs400 = <0x5>;
+		ti,itap-del-sel-legacy = <0x10>;
+		ti,itap-del-sel-mmc-hs = <0xa>;
+		ti,itap-del-sel-ddr52 = <0x3>;
 		status = "disabled";
 	};
 
@@ -545,7 +559,19 @@  sdhci1: mmc@fa00000 {
 		power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 58 5>, <&k3_clks 58 6>;
 		clock-names = "clk_ahb", "clk_xin";
-		ti,otap-del-sel-legacy = <0x8>;
+		bus-width = <4>;
+		ti,clkbuf-sel = <0x7>;
+		ti,otap-del-sel-legacy = <0x0>;
+		ti,otap-del-sel-sd-hs = <0x0>;
+		ti,otap-del-sel-sdr12 = <0xf>;
+		ti,otap-del-sel-sdr25 = <0xf>;
+		ti,otap-del-sel-sdr50 = <0xc>;
+		ti,otap-del-sel-ddr50 = <0x9>;
+		ti,otap-del-sel-sdr104 = <0x6>;
+		ti,itap-del-sel-legacy = <0x0>;
+		ti,itap-del-sel-sd-hs = <0x0>;
+		ti,itap-del-sel-sdr12 = <0x0>;
+		ti,itap-del-sel-sdr25 = <0x0>;
 		status = "disabled";
 	};
 
@@ -556,7 +582,19 @@  sdhci2: mmc@fa20000 {
 		power-domains = <&k3_pds 184 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 184 5>, <&k3_clks 184 6>;
 		clock-names = "clk_ahb", "clk_xin";
-		ti,otap-del-sel-legacy = <0x8>;
+		bus-width = <4>;
+		ti,clkbuf-sel = <0x7>;
+		ti,otap-del-sel-legacy = <0x0>;
+		ti,otap-del-sel-sd-hs = <0x0>;
+		ti,otap-del-sel-sdr12 = <0xf>;
+		ti,otap-del-sel-sdr25 = <0xf>;
+		ti,otap-del-sel-sdr50 = <0xc>;
+		ti,otap-del-sel-ddr50 = <0x9>;
+		ti,otap-del-sel-sdr104 = <0x6>;
+		ti,itap-del-sel-legacy = <0x0>;
+		ti,itap-del-sel-sd-hs = <0x0>;
+		ti,itap-del-sel-sdr12 = <0x0>;
+		ti,itap-del-sel-sdr25 = <0x0>;
 		status = "disabled";
 	};
 
diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
index 1773c05f752c..10156a04a92c 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
@@ -410,13 +410,17 @@  &main_i2c2 {
 };
 
 &sdhci0 {
+	/* eMMC */
+	bootph-all;
 	status = "okay";
+	non-removable;
 	ti,driver-strength-ohm = <50>;
 	disable-wp;
 };
 
 &sdhci1 {
 	/* SD/MMC */
+	bootph-all;
 	status = "okay";
 	vmmc-supply = <&vdd_mmc1>;
 	vqmmc-supply = <&vddshv_sdio>;
@@ -424,8 +428,6 @@  &sdhci1 {
 	pinctrl-0 = <&main_mmc1_pins_default>;
 	ti,driver-strength-ohm = <50>;
 	disable-wp;
-	no-1-8-v;
-	bootph-all;
 };
 
 &cpsw3g {