[net-next,v4,08/11] stmmac: intel: configure SerDes according to the interface mode
Commit Message
From: "Tan, Tee Min" <tee.min.tan@linux.intel.com>
Intel platform will configure the SerDes through PMC api based on the
provided interface mode.
This patch adds several new functions below:-
- intel_tsn_interface_is_available(): This new function reads FIA lane
ownership registers and common lane registers through IPC commands
to know which lane the mGbE port is assigned to.
- intel_config_serdes(): To configure the SerDes based on the assigned
lane and latest interface mode, it sends IPC command to the PMC through
PMC driver/API. The PMC acts as a proxy for R/W on behalf of the driver.
- intel_set_reg_access(): Set the register access to the available TSN
interface.
Signed-off-by: Tan, Tee Min <tee.min.tan@linux.intel.com>
Signed-off-by: Choong Yong Liang <yong.liang.choong@linux.intel.com>
---
drivers/net/ethernet/stmicro/stmmac/Kconfig | 1 +
.../net/ethernet/stmicro/stmmac/dwmac-intel.c | 113 +++++++++++++++++-
.../net/ethernet/stmicro/stmmac/dwmac-intel.h | 75 ++++++++++++
3 files changed, 188 insertions(+), 1 deletion(-)
Comments
Hi Choong,
kernel test robot noticed the following build warnings:
[auto build test WARNING on net-next/main]
url: https://github.com/intel-lab-lkp/linux/commits/Choong-Yong-Liang/net-phylink-publish-ethtool-link-modes-that-supported-and-advertised/20240129-211219
base: net-next/main
patch link: https://lore.kernel.org/r/20240129130253.1400707-9-yong.liang.choong%40linux.intel.com
patch subject: [PATCH net-next v4 08/11] stmmac: intel: configure SerDes according to the interface mode
config: x86_64-kismet-CONFIG_INTEL_PMC_IPC-CONFIG_DWMAC_INTEL-0-0 (https://download.01.org/0day-ci/archive/20240130/202401301610.XVvNEdG4-lkp@intel.com/config)
reproduce: (https://download.01.org/0day-ci/archive/20240130/202401301610.XVvNEdG4-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202401301610.XVvNEdG4-lkp@intel.com/
kismet warnings: (new ones prefixed by >>)
>> kismet: WARNING: unmet direct dependencies detected for INTEL_PMC_IPC when selected by DWMAC_INTEL
.config:21:warning: symbol value 'n' invalid for AIC79XX_DEBUG_MASK
.config:51:warning: symbol value 'n' invalid for BLK_DEV_LOOP_MIN_COUNT
.config:114:warning: symbol value 'n' invalid for SQUASHFS_FRAGMENT_CACHE_SIZE
.config:205:warning: symbol value 'n' invalid for FB_OMAP2_NUM_FBS
.config:209:warning: symbol value 'n' invalid for CMA_SIZE_MBYTES
.config:254:warning: symbol value 'n' invalid for SATA_MOBILE_LPM_POLICY
.config:337:warning: symbol value 'n' invalid for CFAG12864B_RATE
.config:351:warning: symbol value 'n' invalid for PSTORE_BLK_MAX_REASON
.config:355:warning: symbol value 'n' invalid for AIC79XX_CMDS_PER_DEVICE
.config:437:warning: symbol value 'n' invalid for PANEL_LCD_PIN_SDA
.config:459:warning: symbol value 'n' invalid for KFENCE_SAMPLE_INTERVAL
.config:574:warning: symbol value 'n' invalid for AIC7XXX_DEBUG_MASK
.config:646:warning: symbol value 'n' invalid for CRYPTO_DEV_QCE_SW_MAX_LEN
.config:653:warning: symbol value 'n' invalid for DRM_XE_JOB_TIMEOUT_MIN
.config:690:warning: symbol value 'n' invalid for FAT_DEFAULT_CODEPAGE
.config:752:warning: symbol value 'n' invalid for PANEL_LCD_CHARSET
.config:838:warning: symbol value 'n' invalid for SND_AC97_POWER_SAVE_DEFAULT
.config:868:warning: symbol value 'n' invalid for MAGIC_SYSRQ_DEFAULT_ENABLE
.config:885:warning: symbol value 'n' invalid for DRM_I915_MAX_REQUEST_BUSYWAIT
.config:919:warning: symbol value 'n' invalid for SND_AT73C213_TARGET_BITRATE
.config:957:warning: symbol value 'n' invalid for DRM_XE_PREEMPT_TIMEOUT_MIN
.config:969:warning: symbol value 'n' invalid for VMCP_CMA_SIZE
.config:1154:warning: symbol value 'n' invalid for NODES_SHIFT
.config:1224:warning: symbol value 'n' invalid for RCU_CPU_STALL_TIMEOUT
.config:1253:warning: symbol value 'n' invalid for MTDRAM_ERASE_SIZE
.config:1327:warning: symbol value 'n' invalid for SERIAL_UARTLITE_NR_UARTS
.config:1492:warning: symbol value 'n' invalid for INPUT_MOUSEDEV_SCREEN_Y
.config:1506:warning: symbol value 'n' invalid for LEGACY_PTY_COUNT
.config:1667:warning: symbol value 'n' invalid for AIC7XXX_RESET_DELAY_MS
.config:1833:warning: symbol value 'n' invalid for USB_GADGET_STORAGE_NUM_BUFFERS
.config:1883:warning: symbol value 'n' invalid for IBM_EMAC_POLL_WEIGHT
.config:1951:warning: symbol value 'n' invalid for PANEL_PROFILE
.config:1967:warning: symbol value 'n' invalid for DRM_I915_STOP_TIMEOUT
.config:2289:warning: symbol value 'n' invalid for SND_HDA_PREALLOC_SIZE
.config:2301:warning: symbol value 'n' invalid for PANEL_LCD_PIN_E
.config:2336:warning: symbol value 'n' invalid for SND_SOC_SOF_DEBUG_IPC_FLOOD_TEST_NUM
.config:2339:warning: symbol value 'n' invalid for RCU_FANOUT_LEAF
.config:2443:warning: symbol value 'n' invalid for DRM_XE_TIMESLICE_MAX
.config:2500:warning: symbol value 'n' invalid for PANEL_LCD_BWIDTH
.config:2763:warning: symbol value 'n' invalid for PANEL_PARPORT
.config:2773:warning: symbol value 'n' invalid for PSTORE_BLK_CONSOLE_SIZE
.config:2860:warning: symbol value 'n' invalid for NOUVEAU_DEBUG_DEFAULT
.config:2938:warning: symbol value 'n' invalid for BOOKE_WDT_DEFAULT_TIMEOUT
.config:3061:warning: symbol value 'n' invalid for KCSAN_REPORT_ONCE_IN_MS
.config:3171:warning: symbol value 'n' invalid for KCSAN_UDELAY_INTERRUPT
.config:3194:warning: symbol value 'n' invalid for PANEL_LCD_PIN_BL
.config:3216:warning: symbol value 'n' invalid for DEBUG_OBJECTS_ENABLE_DEFAULT
.config:3223:warning: symbol value 'n' invalid for INITRAMFS_ROOT_GID
.config:3345:warning: symbol value 'n' invalid for ATM_FORE200E_TX_RETRY
.config:3389:warning: symbol value 'n' invalid for FB_OMAP2_DSS_MIN_FCK_PER_PCK
.config:3450:warning: symbol value 'n' invalid for AIC79XX_RESET_DELAY_MS
.config:3538:warning: symbol value 'n' invalid for KCSAN_UDELAY_TASK
.config:3574:warning: symbol value 'n' invalid for STACK_MAX_DEFAULT_SIZE_MB
.config:3759:warning: symbol value 'n' invalid for MMC_BLOCK_MINORS
.config:3806:warning: symbol value 'n' invalid for SCSI_NCR53C8XX_SYNC
.config:3894:warning: symbol value 'n' invalid for SERIAL_MCF_BAUDRATE
.config:3936:warning: symbol value 'n' invalid for UCLAMP_BUCKETS_COUNT
.config:3963:warning: symbol value 'n' invalid for X86_AMD_PSTATE_DEFAULT_MODE
.config:3985:warning: symbol value 'n' invalid for DE2104X_DSL
.config:3993:warning: symbol value 'n' invalid for BLK_DEV_RAM_COUNT
.config:4233:warning: symbol value 'n' invalid for IP_VS_SH_TAB_BITS
.config:4347:warning: symbol value 'n' invalid for SERIAL_ALTERA_UART_BAUDRATE
.config:4385:warning: symbol value 'n' invalid for USBIP_VHCI_HC_PORTS
.config:4492:warning: symbol value 'n' invalid for CMA_AREAS
.config:4493:warning: symbol value 'n' invalid for DUMMY_CONSOLE_ROWS
.config:4551:warning: symbol value 'n' invalid for INPUT_MOUSEDEV_SCREEN_X
.config:4670:warning: symbol value 'n' invalid for RIONET_RX_SIZE
.config:4736:warning: symbol value 'n' invalid for RADIO_TYPHOON_PORT
.config:4854:warning: symbol value 'n' invalid for SERIAL_TXX9_NR_UARTS
.config:4899:warning: symbol value 'n' invalid for MTRR_SANITIZER_SPARE_REG_NR_DEFAULT
.config:5001:warning: symbol value 'n' invalid for IBM_EMAC_TXB
.config:5148:warning: symbol value 'n' invalid for FTRACE_RECORD_RECURSION_SIZE
.config:5510:warning: symbol value 'n' invalid for DRM_I915_FENCE_TIMEOUT
.config:5532:warning: symbol value 'n' invalid for TTY_PRINTK_LEVEL
.config:5585:warning: symbol value 'n' invalid for CRYPTO_DEV_FSL_CAAM_INTC_TIME_THLD
.config:5701:warning: symbol value 'n' invalid for MIPS_EJTAG_FDC_KGDB_CHAN
.config:5772:warning: symbol value 'n' invalid for PPC_EARLY_DEBUG_EHV_BC_HANDLE
.config:5796:warning: symbol value 'n' invalid for KDB_DEFAULT_ENABLE
.config:5816:warning: symbol value 'n' invalid for SERIAL_ALTERA_UART_MAXPORTS
.config:5933:warning: symbol value 'n' invalid for IP_VS_MH_TAB_INDEX
.config:6101:warning: symbol value 'n' invalid for PANEL_LCD_HWIDTH
.config:6131:warning: symbol value 'n' invalid for LOCKDEP_CHAINS_BITS
.config:6230:warning: symbol value 'n' invalid for DRM_I915_HEARTBEAT_INTERVAL
.config:6236:warning: symbol value 'n' invalid for KCSAN_SKIP_WATCH
.config:6244:warning: symbol value 'n' invalid for EFI_MAX_FAKE_MEM
.config:6260:warning: symbol value 'n' invalid for PSTORE_BLK_KMSG_SIZE
.config:6358:warning: symbol value 'n' invalid for PANEL_LCD_PIN_RW
.config:6481:warning: symbol value 'n' invalid for SERIAL_8250_RUNTIME_UARTS
.config:6517:warning: symbol value 'n' invalid for KVM_MAX_NR_VCPUS
.config:6584:warning: symbol value 'n' invalid for ARCH_MMAP_RND_COMPAT_BITS
.config:6633:warning: symbol value 'n' invalid for SERIAL_SH_SCI_NR_UARTS
.config:6766:warning: symbol value 'n' invalid for RADIO_TRUST_PORT
.config:6852:warning: symbol value 'n' invalid for SND_MAX_CARDS
.config:7006:warning: symbol value 'n' invalid for RCU_BOOST_DELAY
.config:7177:warning: symbol value 'n' invalid for DVB_MAX_ADAPTERS
.config:7180:warning: symbol value 'n' invalid for SCSI_NCR53C8XX_MAX_TAGS
.config:7187:warning: symbol value 'n' invalid for CMA_SIZE_PERCENTAGE
.config:7213:warning: symbol value 'n' invalid for SCSI_SYM53C8XX_DMA_ADDRESSING_MODE
.config:7257:warning: symbol value 'n' invalid for ZSMALLOC_CHAIN_SIZE
.config:7354:warning: symbol value 'n' invalid for DRM_XE_TIMESLICE_MIN
On Mon, 29 Jan 2024, Choong Yong Liang wrote:
> From: "Tan, Tee Min" <tee.min.tan@linux.intel.com>
>
> Intel platform will configure the SerDes through PMC api based on the
> provided interface mode.
>
> This patch adds several new functions below:-
> - intel_tsn_interface_is_available(): This new function reads FIA lane
> ownership registers and common lane registers through IPC commands
> to know which lane the mGbE port is assigned to.
> - intel_config_serdes(): To configure the SerDes based on the assigned
> lane and latest interface mode, it sends IPC command to the PMC through
> PMC driver/API. The PMC acts as a proxy for R/W on behalf of the driver.
> - intel_set_reg_access(): Set the register access to the available TSN
> interface.
>
> Signed-off-by: Tan, Tee Min <tee.min.tan@linux.intel.com>
> Signed-off-by: Choong Yong Liang <yong.liang.choong@linux.intel.com>
> ---
> drivers/net/ethernet/stmicro/stmmac/Kconfig | 1 +
> .../net/ethernet/stmicro/stmmac/dwmac-intel.c | 113 +++++++++++++++++-
> .../net/ethernet/stmicro/stmmac/dwmac-intel.h | 75 ++++++++++++
> 3 files changed, 188 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig
> index 85dcda51df05..be423fb2b46c 100644
> --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
> +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
> @@ -273,6 +273,7 @@ config DWMAC_INTEL
> default X86
> depends on X86 && STMMAC_ETH && PCI
> depends on COMMON_CLK
> + select INTEL_PMC_IPC
INTEL_PMC_IPC has depends on ACPI but selecting INTEL_PMC_IPC won't
enforce it AFAIK.
On 31/1/2024 6:58 pm, Ilpo Järvinen wrote:
> On Mon, 29 Jan 2024, Choong Yong Liang wrote:
>
>> From: "Tan, Tee Min" <tee.min.tan@linux.intel.com>
>>
>> Intel platform will configure the SerDes through PMC api based on the
>> provided interface mode.
>>
>> This patch adds several new functions below:-
>> - intel_tsn_interface_is_available(): This new function reads FIA lane
>> ownership registers and common lane registers through IPC commands
>> to know which lane the mGbE port is assigned to.
>> - intel_config_serdes(): To configure the SerDes based on the assigned
>> lane and latest interface mode, it sends IPC command to the PMC through
>> PMC driver/API. The PMC acts as a proxy for R/W on behalf of the driver.
>> - intel_set_reg_access(): Set the register access to the available TSN
>> interface.
>>
>> Signed-off-by: Tan, Tee Min <tee.min.tan@linux.intel.com>
>> Signed-off-by: Choong Yong Liang <yong.liang.choong@linux.intel.com>
>> ---
>> drivers/net/ethernet/stmicro/stmmac/Kconfig | 1 +
>> .../net/ethernet/stmicro/stmmac/dwmac-intel.c | 113 +++++++++++++++++-
>> .../net/ethernet/stmicro/stmmac/dwmac-intel.h | 75 ++++++++++++
>> 3 files changed, 188 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig
>> index 85dcda51df05..be423fb2b46c 100644
>> --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
>> +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
>> @@ -273,6 +273,7 @@ config DWMAC_INTEL
>> default X86
>> depends on X86 && STMMAC_ETH && PCI
>> depends on COMMON_CLK
>> + select INTEL_PMC_IPC
>
> INTEL_PMC_IPC has depends on ACPI but selecting INTEL_PMC_IPC won't
> enforce it AFAIK.
>
Hi Ilpo,
Thank you for pointing this out.
I will check on my side too.
Will fix it in the new patch series.
@@ -273,6 +273,7 @@ config DWMAC_INTEL
default X86
depends on X86 && STMMAC_ETH && PCI
depends on COMMON_CLK
+ select INTEL_PMC_IPC
help
This selects the Intel platform specific bus support for the
stmmac driver. This driver is used for Intel Quark/EHL/TGL.
@@ -5,6 +5,7 @@
#include <linux/clk-provider.h>
#include <linux/pci.h>
#include <linux/dmi.h>
+#include <linux/platform_data/x86/intel_pmc_ipc.h>
#include "dwmac-intel.h"
#include "dwmac4.h"
#include "stmmac.h"
@@ -14,6 +15,9 @@ struct intel_priv_data {
int mdio_adhoc_addr; /* mdio address for serdes & etc */
unsigned long crossts_adj;
bool is_pse;
+ const int *tsn_lane_registers;
+ int max_tsn_lane_registers;
+ int pid_modphy;
};
/* This struct is used to associate PCI Function of MAC controller on a board,
@@ -93,7 +97,7 @@ static int intel_serdes_powerup(struct net_device *ndev, void *priv_data)
data &= ~SERDES_RATE_MASK;
data &= ~SERDES_PCLK_MASK;
- if (priv->plat->max_speed == 2500)
+ if (priv->plat->phy_interface == PHY_INTERFACE_MODE_2500BASEX)
data |= SERDES_RATE_PCIE_GEN2 << SERDES_RATE_PCIE_SHIFT |
SERDES_PCLK_37p5MHZ << SERDES_PCLK_SHIFT;
else
@@ -447,6 +451,103 @@ static unsigned int intel_get_pcs_neg_mode(phy_interface_t interface,
return neg_mode;
}
+static bool intel_tsn_interface_is_available(struct net_device *ndev,
+ struct intel_priv_data *intel_priv)
+{
+ struct stmmac_priv *priv = netdev_priv(ndev);
+ struct pmc_ipc_cmd tmp = {0};
+ u32 rbuf[4] = {0};
+ int ret, i, j;
+
+ if (priv->plat->serdes_powerup) {
+ tmp.cmd = IPC_SOC_REGISTER_ACCESS;
+ tmp.sub_cmd = IPC_SOC_SUB_CMD_READ;
+
+ for (i = 0; i < 5; i++) {
+ tmp.wbuf[0] = R_PCH_FIA_15_PCR_LOS1_REG_BASE + i;
+
+ ret = intel_pmc_ipc(&tmp, rbuf);
+ if (ret < 0) {
+ netdev_info(priv->dev,
+ "Failed to read from PMC.\n");
+ return false;
+ }
+
+ for (j = 0; j <= intel_priv->max_tsn_lane_registers; j++)
+ if ((rbuf[0] >>
+ (4 * (intel_priv->tsn_lane_registers[j] % 8)) &
+ B_PCH_FIA_PCR_L0O) == 0xB)
+ return true;
+ }
+ }
+ return false;
+}
+
+static int intel_set_reg_access(const struct pmc_serdes_regs *regs, int max_regs)
+{
+ int ret = 0, i;
+
+ for (i = 0; i < max_regs; i++) {
+ struct pmc_ipc_cmd tmp = {0};
+ u32 buf[4] = {0};
+
+ tmp.cmd = IPC_SOC_REGISTER_ACCESS;
+ tmp.sub_cmd = IPC_SOC_SUB_CMD_WRITE;
+ tmp.wbuf[0] = (u32)regs[i].index;
+ tmp.wbuf[1] = regs[i].val;
+
+ ret = intel_pmc_ipc(&tmp, buf);
+ if (ret < 0)
+ return ret;
+ }
+
+ return ret;
+}
+
+static int intel_config_serdes(struct net_device *ndev,
+ void *intel_data,
+ phy_interface_t interface)
+{
+ struct intel_priv_data *intel_priv = intel_data;
+ struct stmmac_priv *priv = netdev_priv(ndev);
+ int ret = 0;
+
+ if (!intel_tsn_interface_is_available(ndev, intel_priv)) {
+ netdev_info(priv->dev,
+ "No TSN interface available to set the registers.\n");
+ goto pmc_read_error;
+ }
+
+ if (intel_priv->pid_modphy == PID_MODPHY1) {
+ if (interface == PHY_INTERFACE_MODE_2500BASEX) {
+ ret = intel_set_reg_access(pid_modphy1_2p5g_regs,
+ ARRAY_SIZE(pid_modphy1_2p5g_regs));
+ } else {
+ ret = intel_set_reg_access(pid_modphy1_1g_regs,
+ ARRAY_SIZE(pid_modphy1_1g_regs));
+ }
+ } else {
+ if (interface == PHY_INTERFACE_MODE_2500BASEX) {
+ ret = intel_set_reg_access(pid_modphy3_2p5g_regs,
+ ARRAY_SIZE(pid_modphy3_2p5g_regs));
+ } else {
+ ret = intel_set_reg_access(pid_modphy3_1g_regs,
+ ARRAY_SIZE(pid_modphy3_1g_regs));
+ }
+ }
+
+ priv->plat->phy_interface = interface;
+
+ if (ret < 0)
+ goto pmc_read_error;
+
+pmc_read_error:
+ intel_serdes_powerdown(ndev, intel_priv);
+ intel_serdes_powerup(ndev, intel_priv);
+
+ return ret;
+}
+
static void common_default_data(struct plat_stmmacenet_data *plat)
{
plat->clk_csr = 2; /* clk_csr_i = 20-35MHz & MDC = clk_csr_i/16 */
@@ -622,6 +723,16 @@ static int intel_mgbe_common_data(struct pci_dev *pdev,
plat->mdio_bus_data->xpcs_an_inband = true;
}
+ /* When the platform is able to switch between PHY_INTERFACE_MODE_SGMII
+ * and PHY_INTERFACE_MODE_2500BASEX interfaces, we clear xpcs_an_inband
+ * for PHY_INTERFACE_MODE_2500BASEX interface
+ */
+ if (plat->phy_interface == PHY_INTERFACE_MODE_SGMII &&
+ plat->max_speed == 2500) {
+ plat->mdio_bus_data->xpcs_an_inband = false;
+ plat->mdio_bus_data->allow_switch_interface = true;
+ }
+
/* For fixed-link setup, we clear xpcs_an_inband */
if (is_fixed_link(pdev))
plat->mdio_bus_data->xpcs_an_inband = false;
@@ -50,4 +50,79 @@
#define PCH_PTP_CLK_FREQ_19_2MHZ (GMAC_GPO0)
#define PCH_PTP_CLK_FREQ_200MHZ (0)
+#define PID_MODPHY1 0xAA
+#define PID_MODPHY3 0xA8
+
+#if IS_ENABLED(CONFIG_INTEL_PMC_IPC)
+struct pmc_serdes_regs {
+ u8 index;
+ u32 val;
+};
+
+/* Modphy Register index */
+#define R_PCH_FIA_15_PCR_LOS1_REG_BASE 8
+#define R_PCH_FIA_15_PCR_LOS2_REG_BASE 9
+#define R_PCH_FIA_15_PCR_LOS3_REG_BASE 10
+#define R_PCH_FIA_15_PCR_LOS4_REG_BASE 11
+#define R_PCH_FIA_15_PCR_LOS5_REG_BASE 12
+#define B_PCH_FIA_PCR_L0O GENMASK(3, 0)
+#define PID_MODPHY1_B_MODPHY_PCR_LCPLL_DWORD0 13
+#define PID_MODPHY1_N_MODPHY_PCR_LCPLL_DWORD2 14
+#define PID_MODPHY1_N_MODPHY_PCR_LCPLL_DWORD7 15
+#define PID_MODPHY1_N_MODPHY_PCR_LPPLL_DWORD10 16
+#define PID_MODPHY1_N_MODPHY_PCR_CMN_ANA_DWORD30 17
+#define PID_MODPHY3_B_MODPHY_PCR_LCPLL_DWORD0 18
+#define PID_MODPHY3_N_MODPHY_PCR_LCPLL_DWORD2 19
+#define PID_MODPHY3_N_MODPHY_PCR_LCPLL_DWORD7 20
+#define PID_MODPHY3_N_MODPHY_PCR_LPPLL_DWORD10 21
+#define PID_MODPHY3_N_MODPHY_PCR_CMN_ANA_DWORD30 22
+
+#define B_MODPHY_PCR_LCPLL_DWORD0_1G 0x46AAAA41
+#define N_MODPHY_PCR_LCPLL_DWORD2_1G 0x00000139
+#define N_MODPHY_PCR_LCPLL_DWORD7_1G 0x002A0003
+#define N_MODPHY_PCR_LPPLL_DWORD10_1G 0x00170008
+#define N_MODPHY_PCR_CMN_ANA_DWORD30_1G 0x0000D4AC
+#define B_MODPHY_PCR_LCPLL_DWORD0_2P5G 0x58555551
+#define N_MODPHY_PCR_LCPLL_DWORD2_2P5G 0x0000012D
+#define N_MODPHY_PCR_LCPLL_DWORD7_2P5G 0x001F0003
+#define N_MODPHY_PCR_LPPLL_DWORD10_2P5G 0x00170008
+#define N_MODPHY_PCR_CMN_ANA_DWORD30_2P5G 0x8200ACAC
+
+static const struct pmc_serdes_regs pid_modphy3_1g_regs[] = {
+ { PID_MODPHY3_B_MODPHY_PCR_LCPLL_DWORD0, B_MODPHY_PCR_LCPLL_DWORD0_1G },
+ { PID_MODPHY3_N_MODPHY_PCR_LCPLL_DWORD2, N_MODPHY_PCR_LCPLL_DWORD2_1G },
+ { PID_MODPHY3_N_MODPHY_PCR_LCPLL_DWORD7, N_MODPHY_PCR_LCPLL_DWORD7_1G },
+ { PID_MODPHY3_N_MODPHY_PCR_LPPLL_DWORD10, N_MODPHY_PCR_LPPLL_DWORD10_1G },
+ { PID_MODPHY3_N_MODPHY_PCR_CMN_ANA_DWORD30, N_MODPHY_PCR_CMN_ANA_DWORD30_1G },
+ {}
+};
+
+static const struct pmc_serdes_regs pid_modphy3_2p5g_regs[] = {
+ { PID_MODPHY3_B_MODPHY_PCR_LCPLL_DWORD0, B_MODPHY_PCR_LCPLL_DWORD0_2P5G },
+ { PID_MODPHY3_N_MODPHY_PCR_LCPLL_DWORD2, N_MODPHY_PCR_LCPLL_DWORD2_2P5G },
+ { PID_MODPHY3_N_MODPHY_PCR_LCPLL_DWORD7, N_MODPHY_PCR_LCPLL_DWORD7_2P5G },
+ { PID_MODPHY3_N_MODPHY_PCR_LPPLL_DWORD10, N_MODPHY_PCR_LPPLL_DWORD10_2P5G },
+ { PID_MODPHY3_N_MODPHY_PCR_CMN_ANA_DWORD30, N_MODPHY_PCR_CMN_ANA_DWORD30_2P5G },
+ {}
+};
+
+static const struct pmc_serdes_regs pid_modphy1_1g_regs[] = {
+ { PID_MODPHY1_B_MODPHY_PCR_LCPLL_DWORD0, B_MODPHY_PCR_LCPLL_DWORD0_1G },
+ { PID_MODPHY1_N_MODPHY_PCR_LCPLL_DWORD2, N_MODPHY_PCR_LCPLL_DWORD2_1G },
+ { PID_MODPHY1_N_MODPHY_PCR_LCPLL_DWORD7, N_MODPHY_PCR_LCPLL_DWORD7_1G },
+ { PID_MODPHY1_N_MODPHY_PCR_LPPLL_DWORD10, N_MODPHY_PCR_LPPLL_DWORD10_1G },
+ { PID_MODPHY1_N_MODPHY_PCR_CMN_ANA_DWORD30, N_MODPHY_PCR_CMN_ANA_DWORD30_1G },
+ {}
+};
+
+static const struct pmc_serdes_regs pid_modphy1_2p5g_regs[] = {
+ { PID_MODPHY1_B_MODPHY_PCR_LCPLL_DWORD0, B_MODPHY_PCR_LCPLL_DWORD0_2P5G },
+ { PID_MODPHY1_N_MODPHY_PCR_LCPLL_DWORD2, N_MODPHY_PCR_LCPLL_DWORD2_2P5G },
+ { PID_MODPHY1_N_MODPHY_PCR_LCPLL_DWORD7, N_MODPHY_PCR_LCPLL_DWORD7_2P5G },
+ { PID_MODPHY1_N_MODPHY_PCR_LPPLL_DWORD10, N_MODPHY_PCR_LPPLL_DWORD10_2P5G },
+ { PID_MODPHY1_N_MODPHY_PCR_CMN_ANA_DWORD30, N_MODPHY_PCR_CMN_ANA_DWORD30_2P5G },
+ {}
+};
+#endif /* CONFIG_INTEL_PMC_IPC */
+
#endif /* __DWMAC_INTEL_H__ */