Message ID | 20240131071910.3950450-1-wenst@chromium.org |
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State | New |
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Tue, 30 Jan 2024 23:19:16 -0800 (PST) Received: from wenstp920.tpe.corp.google.com ([2401:fa00:1:10:74d3:dadd:270b:194a]) by smtp.gmail.com with ESMTPSA id y9-20020aa79e09000000b006ddc7af02c1sm9049919pfq.9.2024.01.30.23.19.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 Jan 2024 23:19:14 -0800 (PST) From: Chen-Yu Tsai <wenst@chromium.org> To: Sean Wang <sean.wang@kernel.org>, Linus Walleij <linus.walleij@linaro.org>, Matthias Brugger <matthias.bgg@gmail.com>, AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Cc: Chen-Yu Tsai <wenst@chromium.org>, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/2] pinctrl: mediatek: Drop bogus slew rate register range for MT8186 Date: Wed, 31 Jan 2024 15:19:07 +0800 Message-ID: <20240131071910.3950450-1-wenst@chromium.org> X-Mailer: git-send-email 2.43.0.429.g432eaa2c6b-goog Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: <linux-kernel.vger.kernel.org> List-Subscribe: <mailto:linux-kernel+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-kernel+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1789589533313407997 X-GMAIL-MSGID: 1789589533313407997 |
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[1/2] pinctrl: mediatek: Drop bogus slew rate register range for MT8186
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Commit Message
Chen-Yu Tsai
Jan. 31, 2024, 7:19 a.m. UTC
The MT8186 does not support configuring pin slew rate. This is evident
from both the datasheet, and the fact that the driver points the slew
rate register range at the GPIO direction register range.
Drop the bogus setting.
Fixes: 8b483bda1e46 ("pinctrl: add pinctrl driver on mt8186")
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
---
drivers/pinctrl/mediatek/pinctrl-mt8186.c | 1 -
1 file changed, 1 deletion(-)
Comments
Il 31/01/24 08:19, Chen-Yu Tsai ha scritto: > The MT8186 does not support configuring pin slew rate. This is evident > from both the datasheet, and the fact that the driver points the slew > rate register range at the GPIO direction register range. > > Drop the bogus setting. > > Fixes: 8b483bda1e46 ("pinctrl: add pinctrl driver on mt8186") > Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Argh :-) Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
On Wed, Jan 31, 2024 at 8:19 AM Chen-Yu Tsai <wenst@chromium.org> wrote: > The MT8186 does not support configuring pin slew rate. This is evident > from both the datasheet, and the fact that the driver points the slew > rate register range at the GPIO direction register range. > > Drop the bogus setting. > > Fixes: 8b483bda1e46 ("pinctrl: add pinctrl driver on mt8186") > Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Patches applied! Yours, Linus Walleij
diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8186.c b/drivers/pinctrl/mediatek/pinctrl-mt8186.c index 7be591591cce..dd19e74856a9 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt8186.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt8186.c @@ -1198,7 +1198,6 @@ static const struct mtk_pin_reg_calc mt8186_reg_cals[PINCTRL_PIN_REG_MAX] = { [PINCTRL_PIN_REG_DIR] = MTK_RANGE(mt8186_pin_dir_range), [PINCTRL_PIN_REG_DI] = MTK_RANGE(mt8186_pin_di_range), [PINCTRL_PIN_REG_DO] = MTK_RANGE(mt8186_pin_do_range), - [PINCTRL_PIN_REG_SR] = MTK_RANGE(mt8186_pin_dir_range), [PINCTRL_PIN_REG_SMT] = MTK_RANGE(mt8186_pin_smt_range), [PINCTRL_PIN_REG_IES] = MTK_RANGE(mt8186_pin_ies_range), [PINCTRL_PIN_REG_PU] = MTK_RANGE(mt8186_pin_pu_range),