[1/2] ARM: dts: qcom: msm8960: Add gsbi3 node
Commit Message
From: Rudraksha Gupta <guptarud@gmail.com>
Copy gsbi3 node from qcom-apq8064.dtsi and set appropriate properties
Signed-off-by: Rudraksha Gupta <guptarud@gmail.com>
---
arch/arm/boot/dts/qcom/qcom-msm8960-pins.dtsi | 29 +++++++++++++++++++++++++++
arch/arm/boot/dts/qcom/qcom-msm8960.dtsi | 27 +++++++++++++++++++++++++
2 files changed, 56 insertions(+)
Comments
On 30/01/2024 03:43, Rudraksha Gupta via B4 Relay wrote:
> From: Rudraksha Gupta <guptarud@gmail.com>
>
> Copy gsbi3 node from qcom-apq8064.dtsi and set appropriate properties
>
> Signed-off-by: Rudraksha Gupta <guptarud@gmail.com>
> ---
> arch/arm/boot/dts/qcom/qcom-msm8960-pins.dtsi | 29 +++++++++++++++++++++++++++
> arch/arm/boot/dts/qcom/qcom-msm8960.dtsi | 27 +++++++++++++++++++++++++
> 2 files changed, 56 insertions(+)
>
> diff --git a/arch/arm/boot/dts/qcom/qcom-msm8960-pins.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8960-pins.dtsi
> new file mode 100644
> index 000000000000..c74c6625d276
> --- /dev/null
> +++ b/arch/arm/boot/dts/qcom/qcom-msm8960-pins.dtsi
> @@ -0,0 +1,29 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +
> +&msmgpio {
> + i2c3_pins: i2c3 {
> + mux {
> + pins = "gpio16", "gpio17";
> + function = "gsbi3";
> + };
> +
> + pinconf {
> + pins = "gpio16", "gpio17";
> + drive-strength = <8>;
> + bias-disable;
> + };
> + };
> +
> + i2c3_pins_sleep: i2c3_pins_sleep {
No underscores in node names.
It does not look like you tested the DTS against bindings. Please run
`make dtbs_check W=1` (see
Documentation/devicetree/bindings/writing-schema.rst or
https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/
for instructions).
> + mux {
> + pins = "gpio16", "gpio17";
> + function = "gpio";
> + };
> +
> + pinconf {
> + pins = "gpio16", "gpio17";
> + drive-strength = <2>;
> + bias-bus-hold;
> + };
> + };
> +};
> diff --git a/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi
> index f420740e068e..62a5a9622e82 100644
> --- a/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi
> +++ b/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi
> @@ -359,5 +359,32 @@ usb_hs1_phy: phy {
> };
> };
> };
> +
> + gsbi3: gsbi@16200000 {
> + status = "disabled";
Please order the properties according to DTS coding style:
https://www.kernel.org/doc/html/latest/devicetree/bindings/dts-coding-style.html#order-of-properties-in-device-node
Best regards,
Krzysztof
new file mode 100644
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: GPL-2.0-only
+
+&msmgpio {
+ i2c3_pins: i2c3 {
+ mux {
+ pins = "gpio16", "gpio17";
+ function = "gsbi3";
+ };
+
+ pinconf {
+ pins = "gpio16", "gpio17";
+ drive-strength = <8>;
+ bias-disable;
+ };
+ };
+
+ i2c3_pins_sleep: i2c3_pins_sleep {
+ mux {
+ pins = "gpio16", "gpio17";
+ function = "gpio";
+ };
+
+ pinconf {
+ pins = "gpio16", "gpio17";
+ drive-strength = <2>;
+ bias-bus-hold;
+ };
+ };
+};
@@ -359,5 +359,32 @@ usb_hs1_phy: phy {
};
};
};
+
+ gsbi3: gsbi@16200000 {
+ status = "disabled";
+ compatible = "qcom,gsbi-v1.0.0";
+ cell-index = <3>;
+ reg = <0x16200000 0x100>;
+ clocks = <&gcc GSBI3_H_CLK>;
+ clock-names = "iface";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ gsbi3_i2c: i2c@16280000 {
+ compatible = "qcom,i2c-qup-v1.1.1";
+ pinctrl-0 = <&i2c3_pins>;
+ pinctrl-1 = <&i2c3_pins_sleep>;
+ pinctrl-names = "default", "sleep";
+ reg = <0x16280000 0x1000>;
+ interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gcc GSBI3_QUP_CLK>,
+ <&gcc GSBI3_H_CLK>;
+ clock-names = "core", "iface";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+ };
};
};
+#include "qcom-msm8960-pins.dtsi"