diff mbox series

dmaengine: ti: k3-psil-j721s2: Add entry for CSI2RX

Message ID 20240125111449.855876-1-vaishnav.a@ti.com
State New
Headers
Series dmaengine: ti: k3-psil-j721s2: Add entry for CSI2RX |

Commit Message

Vaishnav Achath Jan. 25, 2024, 11:14 a.m. UTC 
  The CSI2RX subsystem uses PSI-L DMA to transfer frames to memory. It can
have up to 32 threads per instance. J721S2 has two instances of the
subsystem, so there are 64 threads total, Add them to the endpoint map.

Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
---
Tested on J721S2 EVM on 6.8.0-rc1-next-20240124 for CSI2RX capture with
OV5640: https://gist.github.com/vaishnavachath/e6918ae4dadeb34c4cbad515bffcc558

 drivers/dma/ti/k3-psil-j721s2.c | 73 +++++++++++++++++++++++++++++++++
 1 file changed, 73 insertions(+)

Comments

Kumar, Udit Jan. 28, 2024, 5 a.m. UTC | #1 
Thanks Vaishnav

On 1/25/2024 4:44 PM, Vaishnav Achath wrote:
> The CSI2RX subsystem uses PSI-L DMA to transfer frames to memory. It can
> have up to 32 threads per instance. J721S2 has two instances of the
> subsystem, so there are 64 threads total, Add them to the endpoint map.
>
> Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
> ---
> Tested on J721S2 EVM on 6.8.0-rc1-next-20240124 for CSI2RX capture with
> OV5640: https://gist.github.com/vaishnavachath/e6918ae4dadeb34c4cbad515bffcc558
>
>   drivers/dma/ti/k3-psil-j721s2.c | 73 +++++++++++++++++++++++++++++++++
>   1 file changed, 73 insertions(+)
>
> diff --git a/drivers/dma/ti/k3-psil-j721s2.c b/drivers/dma/ti/k3-psil-j721s2.c
> index 1d5430fc5724..ba08bdcdcd2b 100644
> --- a/drivers/dma/ti/k3-psil-j721s2.c
> +++ b/drivers/dma/ti/k3-psil-j721s2.c
> @@ -57,6 +57,14 @@
>   		},					\
>   	}
>   
> +#define PSIL_CSI2RX(x)					\
> +	{						\
> +		.thread_id = x,				\
> +		.ep_config = {				\
> +			.ep_type = PSIL_EP_NATIVE,	\
> +		},					\
> +	}
> +
>   /* PSI-L source thread IDs, used for RX (DMA_DEV_TO_MEM) */
>   static struct psil_ep j721s2_src_ep_map[] = {
>   	/* PDMA_MCASP - McASP0-4 */
> @@ -114,6 +122,71 @@ static struct psil_ep j721s2_src_ep_map[] = {
>   	PSIL_PDMA_XY_PKT(0x4707),
>   	PSIL_PDMA_XY_PKT(0x4708),
>   	PSIL_PDMA_XY_PKT(0x4709),
> +	/* CSI2RX */
> +	PSIL_CSI2RX(0x4940),
> +	PSIL_CSI2RX(0x4941),
> +	PSIL_CSI2RX(0x4942),
> +	PSIL_CSI2RX(0x4943),
> +	PSIL_CSI2RX(0x4944),
> +	PSIL_CSI2RX(0x4945),
> +	PSIL_CSI2RX(0x4946),
> +	PSIL_CSI2RX(0x4947),
> +	PSIL_CSI2RX(0x4948),
> +	PSIL_CSI2RX(0x4949),

Reviewed-by: Udit Kumar <u-kumar1@ti.com>


> +	PSIL_CSI2RX(0x494a),
> +	PSIL_CSI2RX(0x494b),
> [..]
Vinod Koul Jan. 30, 2024, 4:51 p.m. UTC | #2 
On Thu, 25 Jan 2024 16:44:49 +0530, Vaishnav Achath wrote:
> The CSI2RX subsystem uses PSI-L DMA to transfer frames to memory. It can
> have up to 32 threads per instance. J721S2 has two instances of the
> subsystem, so there are 64 threads total, Add them to the endpoint map.
> 
> 

Applied, thanks!

[1/1] dmaengine: ti: k3-psil-j721s2: Add entry for CSI2RX
      commit: 93bdff7bb83a9ea79f41d4e48e1711fd5f4ec4ed

Best regards,
diff mbox series

Patch

diff --git a/drivers/dma/ti/k3-psil-j721s2.c b/drivers/dma/ti/k3-psil-j721s2.c
index 1d5430fc5724..ba08bdcdcd2b 100644
--- a/drivers/dma/ti/k3-psil-j721s2.c
+++ b/drivers/dma/ti/k3-psil-j721s2.c
@@ -57,6 +57,14 @@ 
 		},					\
 	}
 
+#define PSIL_CSI2RX(x)					\
+	{						\
+		.thread_id = x,				\
+		.ep_config = {				\
+			.ep_type = PSIL_EP_NATIVE,	\
+		},					\
+	}
+
 /* PSI-L source thread IDs, used for RX (DMA_DEV_TO_MEM) */
 static struct psil_ep j721s2_src_ep_map[] = {
 	/* PDMA_MCASP - McASP0-4 */
@@ -114,6 +122,71 @@  static struct psil_ep j721s2_src_ep_map[] = {
 	PSIL_PDMA_XY_PKT(0x4707),
 	PSIL_PDMA_XY_PKT(0x4708),
 	PSIL_PDMA_XY_PKT(0x4709),
+	/* CSI2RX */
+	PSIL_CSI2RX(0x4940),
+	PSIL_CSI2RX(0x4941),
+	PSIL_CSI2RX(0x4942),
+	PSIL_CSI2RX(0x4943),
+	PSIL_CSI2RX(0x4944),
+	PSIL_CSI2RX(0x4945),
+	PSIL_CSI2RX(0x4946),
+	PSIL_CSI2RX(0x4947),
+	PSIL_CSI2RX(0x4948),
+	PSIL_CSI2RX(0x4949),
+	PSIL_CSI2RX(0x494a),
+	PSIL_CSI2RX(0x494b),
+	PSIL_CSI2RX(0x494c),
+	PSIL_CSI2RX(0x494d),
+	PSIL_CSI2RX(0x494e),
+	PSIL_CSI2RX(0x494f),
+	PSIL_CSI2RX(0x4950),
+	PSIL_CSI2RX(0x4951),
+	PSIL_CSI2RX(0x4952),
+	PSIL_CSI2RX(0x4953),
+	PSIL_CSI2RX(0x4954),
+	PSIL_CSI2RX(0x4955),
+	PSIL_CSI2RX(0x4956),
+	PSIL_CSI2RX(0x4957),
+	PSIL_CSI2RX(0x4958),
+	PSIL_CSI2RX(0x4959),
+	PSIL_CSI2RX(0x495a),
+	PSIL_CSI2RX(0x495b),
+	PSIL_CSI2RX(0x495c),
+	PSIL_CSI2RX(0x495d),
+	PSIL_CSI2RX(0x495e),
+	PSIL_CSI2RX(0x495f),
+	PSIL_CSI2RX(0x4960),
+	PSIL_CSI2RX(0x4961),
+	PSIL_CSI2RX(0x4962),
+	PSIL_CSI2RX(0x4963),
+	PSIL_CSI2RX(0x4964),
+	PSIL_CSI2RX(0x4965),
+	PSIL_CSI2RX(0x4966),
+	PSIL_CSI2RX(0x4967),
+	PSIL_CSI2RX(0x4968),
+	PSIL_CSI2RX(0x4969),
+	PSIL_CSI2RX(0x496a),
+	PSIL_CSI2RX(0x496b),
+	PSIL_CSI2RX(0x496c),
+	PSIL_CSI2RX(0x496d),
+	PSIL_CSI2RX(0x496e),
+	PSIL_CSI2RX(0x496f),
+	PSIL_CSI2RX(0x4970),
+	PSIL_CSI2RX(0x4971),
+	PSIL_CSI2RX(0x4972),
+	PSIL_CSI2RX(0x4973),
+	PSIL_CSI2RX(0x4974),
+	PSIL_CSI2RX(0x4975),
+	PSIL_CSI2RX(0x4976),
+	PSIL_CSI2RX(0x4977),
+	PSIL_CSI2RX(0x4978),
+	PSIL_CSI2RX(0x4979),
+	PSIL_CSI2RX(0x497a),
+	PSIL_CSI2RX(0x497b),
+	PSIL_CSI2RX(0x497c),
+	PSIL_CSI2RX(0x497d),
+	PSIL_CSI2RX(0x497e),
+	PSIL_CSI2RX(0x497f),
 	/* MAIN SA2UL */
 	PSIL_SA2UL(0x4a40, 0),
 	PSIL_SA2UL(0x4a41, 0),