diff mbox series

[8/9] arm64: dts: exynos: gs101: sysreg_peric1 needs a clock

Message ID 20240127001926.495769-9-andre.draszik@linaro.org
State New
Headers
Series [1/9] clk: samsung: gs-101: drop extra empty line |

Commit Message

André Draszik Jan. 27, 2024, 12:19 a.m. UTC 
  Without the clock running, we can not access its registers, and now
that we have it, we should add it here so that it gets enabled as
and when needed.

Update the DTSI accordingly.

Signed-off-by: André Draszik <andre.draszik@linaro.org>
---
 arch/arm64/boot/dts/exynos/google/gs101.dtsi | 1 +
 1 file changed, 1 insertion(+)

Comments

Sam Protsenko Jan. 27, 2024, 3 a.m. UTC | #1 
On Fri, Jan 26, 2024 at 6:19 PM André Draszik <andre.draszik@linaro.org> wrote:
>
> Without the clock running, we can not access its registers, and now
> that we have it, we should add it here so that it gets enabled as
> and when needed.
>

That sounds like this patch deserves "Fixes:" tag :) Other than that:

Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>

> Update the DTSI accordingly.
>
> Signed-off-by: André Draszik <andre.draszik@linaro.org>
> ---
>  arch/arm64/boot/dts/exynos/google/gs101.dtsi | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
> index d66590fa922f..ac9cb46d8bc9 100644
> --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
> +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
> @@ -442,6 +442,7 @@ cmu_peric1: clock-controller@10c00000 {
>                 sysreg_peric1: syscon@10c20000 {
>                         compatible = "google,gs101-peric1-sysreg", "syscon";
>                         reg = <0x10c20000 0x10000>;
> +                       clocks = <&cmu_peric1 CLK_GOUT_PERIC1_SYSREG_PERIC1_PCLK>;
>                 };
>
>                 pinctrl_peric1: pinctrl@10c40000 {
> --
> 2.43.0.429.g432eaa2c6b-goog
>
André Draszik Jan. 29, 2024, 10:45 a.m. UTC | #2 
Hi Sam,

On Fri, 2024-01-26 at 21:00 -0600, Sam Protsenko wrote:
> On Fri, Jan 26, 2024 at 6:19 PM André Draszik <andre.draszik@linaro.org> wrote:
> > 
> > Without the clock running, we can not access its registers, and now
> > that we have it, we should add it here so that it gets enabled as
> > and when needed.
> > 
> 
> That sounds like this patch deserves "Fixes:" tag :) Other than that:

I didn't add it, because at the time &sysreg_peric1 was added, the clock
macro CLK_GOUT_PERIC1_SYSREG_PERIC1_PCLK didn't exist and &sysreg_peric1
wasn't in use until this series here anyway.
If this patch here gets backported to some older kernel due to the Fixes: tag,
without the whole peric1 series, it wouldn't build. Therefore I left it out.

Should it still be added?

Cheers,
Andre'
Krzysztof Kozlowski Jan. 29, 2024, 11:01 a.m. UTC | #3 
On 29/01/2024 11:45, André Draszik wrote:
> Hi Sam,
> 
> On Fri, 2024-01-26 at 21:00 -0600, Sam Protsenko wrote:
>> On Fri, Jan 26, 2024 at 6:19 PM André Draszik <andre.draszik@linaro.org> wrote:
>>>
>>> Without the clock running, we can not access its registers, and now
>>> that we have it, we should add it here so that it gets enabled as
>>> and when needed.
>>>
>>
>> That sounds like this patch deserves "Fixes:" tag :) Other than that:
> 
> I didn't add it, because at the time &sysreg_peric1 was added, the clock
> macro CLK_GOUT_PERIC1_SYSREG_PERIC1_PCLK didn't exist and &sysreg_peric1
> wasn't in use until this series here anyway.
> If this patch here gets backported to some older kernel due to the Fixes: tag,
> without the whole peric1 series, it wouldn't build. Therefore I left it out.

Clk patches don't have fixes tag, so Fixes for this alone would be
confusing.

Best regards,
Krzysztof
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
index d66590fa922f..ac9cb46d8bc9 100644
--- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
+++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
@@ -442,6 +442,7 @@  cmu_peric1: clock-controller@10c00000 {
 		sysreg_peric1: syscon@10c20000 {
 			compatible = "google,gs101-peric1-sysreg", "syscon";
 			reg = <0x10c20000 0x10000>;
+			clocks = <&cmu_peric1 CLK_GOUT_PERIC1_SYSREG_PERIC1_PCLK>;
 		};
 
 		pinctrl_peric1: pinctrl@10c40000 {