diff mbox series

arm64: dts: rockchip: enable built-in thermal monitoring on rk3588

Message ID 20240106222357.23835-1-alchark@gmail.com
State New
Headers
Series arm64: dts: rockchip: enable built-in thermal monitoring on rk3588 |

Commit Message

Alexey Charkov Jan. 6, 2024, 10:23 p.m. UTC 
  Include thermal zones information in device tree for rk3588 variants
and enable the built-in thermal sensing ADC on RADXA Rock 5B

Signed-off-by: Alexey Charkov <alchark@gmail.com>
---
 .../boot/dts/rockchip/rk3588-rock-5b.dts      |   4 +
 arch/arm64/boot/dts/rockchip/rk3588s.dtsi     | 143 ++++++++++++++++++
 2 files changed, 147 insertions(+)

Comments

Dragan Simic Jan. 6, 2024, 10:54 p.m. UTC | #1 
Hello Alexey,

Please see my comments below.

On 2024-01-06 23:23, Alexey Charkov wrote:
> Include thermal zones information in device tree for rk3588 variants
> and enable the built-in thermal sensing ADC on RADXA Rock 5B
> 
> Signed-off-by: Alexey Charkov <alchark@gmail.com>
> ---
>  .../boot/dts/rockchip/rk3588-rock-5b.dts      |   4 +
>  arch/arm64/boot/dts/rockchip/rk3588s.dtsi     | 143 ++++++++++++++++++
>  2 files changed, 147 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
> b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
> index a5a104131403..f9d540000de3 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
> @@ -772,3 +772,7 @@ &usb_host1_ehci {
>  &usb_host1_ohci {
>  	status = "okay";
>  };
> +
> +&tsadc {
> +	status = "okay";
> +};
> diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
> b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
> index 8aa0499f9b03..8235991e3112 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
> @@ -10,6 +10,7 @@
>  #include <dt-bindings/reset/rockchip,rk3588-cru.h>
>  #include <dt-bindings/phy/phy.h>
>  #include <dt-bindings/ata/ahci.h>
> +#include <dt-bindings/thermal/thermal.h>
> 
>  / {
>  	compatible = "rockchip,rk3588";
> @@ -2112,6 +2113,148 @@ tsadc: tsadc@fec00000 {
>  		status = "disabled";
>  	};
> 
> +	thermal_zones: thermal-zones {
> +		soc_thermal: soc-thermal {

It should be better to name it cpu_thermal instead.  In the end, that's 
what it is.

> +			polling-delay-passive = <20>; /* milliseconds */
> +			polling-delay = <1000>; /* milliseconds */
> +			sustainable-power = <2100>; /* milliwatts */

These three comments above are pretty much redundant.

> +
> +			thermal-sensors = <&tsadc 0>;

An empty line should be added here.

> +			trips {
> +				threshold: trip-point-0 {

It should be better to name it cpu_alert0 instead, because that's what 
other newer dtsi files already use.

> +					temperature = <75000>;
> +					hysteresis = <2000>;
> +					type = "passive";
> +				};
> +				target: trip-point-1 {

It should be better to name it cpu_alert1 instead, because that's what 
other newer dtsi files already use.

> +					temperature = <85000>;
> +					hysteresis = <2000>;
> +					type = "passive";
> +				};
> +				soc_crit: soc-crit {

It should be better to name it cpu_crit instead, because that's what 
other newer dtsi files already use.

> +					/* millicelsius */
> +					temperature = <115000>;
> +					/* millicelsius */

These two comments above are pretty much redundant.  It also applies to 
all other similar comments below.

> +					hysteresis = <2000>;
> +					type = "critical";
> +				};
> +			};
> +			cooling-maps {
> +				map0 {
> +					trip = <&target>;

Shouldn't &threshold (i.e. &cpu_alert0) be referenced here instead?

> +					cooling-device = <&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;

Shouldn't all big CPU cores be listed here instead?

> +					contribution = <1024>;
> +				};
> +				map1 {
> +					trip = <&target>;

Shouldn't &target (i.e. &cpu_alert1) be referenced here instead?

> +					cooling-device = <&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;

Shouldn't all little and big CPU cores be listed here instead?

> +					contribution = <1024>;
> +				};
> +				map2 {
> +					trip = <&target>;
> +					cooling-device = <&cpu_b2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> +					contribution = <1024>;
> +				};

Isn't this cooling map redundant?

> +			};
> +		};
> +
> +		bigcore0_thermal: bigcore0-thermal {
> +			polling-delay-passive = <20>; /* milliseconds */
> +			polling-delay = <1000>; /* milliseconds */
> +			thermal-sensors = <&tsadc 1>;
> +
> +			trips {
> +				big0_crit: big0-crit {
> +					/* millicelsius */
> +					temperature = <115000>;
> +					/* millicelsius */
> +					hysteresis = <2000>;
> +					type = "critical";
> +				};
> +			};
> +		};
> +
> +		bigcore1_thermal: bigcore1-thermal {
> +			polling-delay-passive = <20>; /* milliseconds */
> +			polling-delay = <1000>; /* milliseconds */
> +			thermal-sensors = <&tsadc 2>;
> +
> +			trips {
> +				big1_crit: big1-crit {
> +					/* millicelsius */
> +					temperature = <115000>;
> +					/* millicelsius */
> +					hysteresis = <2000>;
> +					type = "critical";
> +				};
> +			};
> +		};
> +
> +		little_core_thermal: littlecore-thermal {
> +			polling-delay-passive = <20>; /* milliseconds */
> +			polling-delay = <1000>; /* milliseconds */
> +			thermal-sensors = <&tsadc 3>;
> +
> +			trips {
> +				little_crit: little-crit {
> +					/* millicelsius */
> +					temperature = <115000>;
> +					/* millicelsius */
> +					hysteresis = <2000>;
> +					type = "critical";
> +				};
> +			};
> +		};
> +
> +		center_thermal: center-thermal {
> +			polling-delay-passive = <20>; /* milliseconds */
> +			polling-delay = <1000>; /* milliseconds */
> +			thermal-sensors = <&tsadc 4>;
> +
> +			trips {
> +				center_crit: center-crit {
> +					/* millicelsius */
> +					temperature = <115000>;
> +					/* millicelsius */
> +					hysteresis = <2000>;
> +					type = "critical";
> +				};
> +			};
> +		};
> +
> +		gpu_thermal: gpu-thermal {
> +			polling-delay-passive = <20>; /* milliseconds */
> +			polling-delay = <1000>; /* milliseconds */
> +			thermal-sensors = <&tsadc 5>;
> +
> +			trips {
> +				gpu_crit: gpu-crit {
> +					/* millicelsius */
> +					temperature = <115000>;
> +					/* millicelsius */
> +					hysteresis = <2000>;
> +					type = "critical";
> +				};
> +			};
> +		};
> +
> +		npu_thermal: npu-thermal {
> +			polling-delay-passive = <20>; /* milliseconds */
> +			polling-delay = <1000>; /* milliseconds */
> +			thermal-sensors = <&tsadc 6>;
> +
> +			trips {
> +				npu_crit: npu-crit {
> +					/* millicelsius */
> +					temperature = <115000>;
> +					/* millicelsius */
> +					hysteresis = <2000>;
> +					type = "critical";
> +				};
> +			};
> +		};
> +	};
> +
>  	saradc: adc@fec10000 {
>  		compatible = "rockchip,rk3588-saradc";
>  		reg = <0x0 0xfec10000 0x0 0x10000>;
Alexey Charkov Jan. 8, 2024, 1:41 p.m. UTC | #2 
Hello Dragan,

Thanks a lot for your review and comments! Some reflections below.

On Sun, Jan 7, 2024 at 2:54 AM Dragan Simic <dsimic@manjaro.org> wrote:
>
> Hello Alexey,
>
> Please see my comments below.
>
> On 2024-01-06 23:23, Alexey Charkov wrote:
> > Include thermal zones information in device tree for rk3588 variants
> > and enable the built-in thermal sensing ADC on RADXA Rock 5B
> >
> > Signed-off-by: Alexey Charkov <alchark@gmail.com>
> > ---
> >  .../boot/dts/rockchip/rk3588-rock-5b.dts      |   4 +
> >  arch/arm64/boot/dts/rockchip/rk3588s.dtsi     | 143 ++++++++++++++++++
> >  2 files changed, 147 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
> > b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
> > index a5a104131403..f9d540000de3 100644
> > --- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
> > +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
> > @@ -772,3 +772,7 @@ &usb_host1_ehci {
> >  &usb_host1_ohci {
> >       status = "okay";
> >  };
> > +
> > +&tsadc {
> > +     status = "okay";
> > +};
> > diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
> > b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
> > index 8aa0499f9b03..8235991e3112 100644
> > --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
> > +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
> > @@ -10,6 +10,7 @@
> >  #include <dt-bindings/reset/rockchip,rk3588-cru.h>
> >  #include <dt-bindings/phy/phy.h>
> >  #include <dt-bindings/ata/ahci.h>
> > +#include <dt-bindings/thermal/thermal.h>
> >
> >  / {
> >       compatible = "rockchip,rk3588";
> > @@ -2112,6 +2113,148 @@ tsadc: tsadc@fec00000 {
> >               status = "disabled";
> >       };
> >
> > +     thermal_zones: thermal-zones {
> > +             soc_thermal: soc-thermal {
>
> It should be better to name it cpu_thermal instead.  In the end, that's
> what it is.

The TRM document says the first TSADC channel (to which this section
applies) measures the temperature near the center of the SoC die,
which implies not only the CPU but also the GPU at least. RADXA's
kernel for Rock 5B also has GPU passive cooling as one of the cooling
maps under this node (not included here, as we don't have the GPU node
in .dtsi just yet). So perhaps naming this one cpu_thermal could be
misleading?

> > +                     polling-delay-passive = <20>; /* milliseconds */
> > +                     polling-delay = <1000>; /* milliseconds */
> > +                     sustainable-power = <2100>; /* milliwatts */
>
> These three comments above are pretty much redundant.

Noted, will drop in v2

> > +
> > +                     thermal-sensors = <&tsadc 0>;
>
> An empty line should be added here.

Noted, will add in v2

> > +                     trips {
> > +                             threshold: trip-point-0 {
>
> It should be better to name it cpu_alert0 instead, because that's what
> other newer dtsi files already use.

Reflecting on your comments here and below, I'm thinking that maybe it
would be better to define only the critical trip point for the SoC
overall, and then have alerts along with the respective cooling maps
separately for A76-0,1, A76-2,3, A55-0,1,2,3? After all, given that we
have more granular temperature measurement here than in previous RK
chipsets it might be better to only throttle the "offending" cores,
not the full package.

What do you think?

Downstream DT doesn't follow this approach though, so maybe there's
something I'm missing here.

> > +                                     temperature = <75000>;
> > +                                     hysteresis = <2000>;
> > +                                     type = "passive";
> > +                             };
> > +                             target: trip-point-1 {
>
> It should be better to name it cpu_alert1 instead, because that's what
> other newer dtsi files already use.
>
> > +                                     temperature = <85000>;
> > +                                     hysteresis = <2000>;
> > +                                     type = "passive";
> > +                             };
> > +                             soc_crit: soc-crit {
>
> It should be better to name it cpu_crit instead, because that's what
> other newer dtsi files already use.

Seems to me that if I define separate trips for the three groups of
CPU cores as mentioned above this would better stay as soc_crit, as it
applies to the whole die rather than the CPU cluster alone. Then
'threshold' and 'target' will go altogether, and I'll have separate
*_alert0 and *_alert1 per CPU group.

>> > +                                     /* millicelsius */
> > +                                     temperature = <115000>;
> > +                                     /* millicelsius */
>
> These two comments above are pretty much redundant.  It also applies to
> all other similar comments below.

Noted, thanks - will drop all the noise in v2.

> > +                                     hysteresis = <2000>;
> > +                                     type = "critical";
> > +                             };
> > +                     };
> > +                     cooling-maps {
> > +                             map0 {
> > +                                     trip = <&target>;
>
> Shouldn't &threshold (i.e. &cpu_alert0) be referenced here instead?
>
> > +                                     cooling-device = <&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
>
> Shouldn't all big CPU cores be listed here instead?

I guess if a separate trip point is defined for cpu_l0,1,2,3 then it
would need to throttle at 75C, and then cpu_b0,1 and cpu_b2,3 at 85C
each. Logic being that if a sensor stacked in the middle of a group of
four cores shows 75C then one of the four might well be in abnormal
temperature range already (85+), while sensors next to only two big
cores each will likely show temperatures similar to the actual core
temperature.

> > +                                     contribution = <1024>;
> > +                             };
> > +                             map1 {
> > +                                     trip = <&target>;
>
> Shouldn't &target (i.e. &cpu_alert1) be referenced here instead?
>
> > +                                     cooling-device = <&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
>
> Shouldn't all little and big CPU cores be listed here instead?
>
> > +                                     contribution = <1024>;
> > +                             };
> > +                             map2 {
> > +                                     trip = <&target>;
> > +                                     cooling-device = <&cpu_b2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> > +                                     contribution = <1024>;
> > +                             };
>
> Isn't this cooling map redundant?

Will refactor the above, thanks.

> > +                     };
> > +             };
> > +
> > +             bigcore0_thermal: bigcore0-thermal {
> > +                     polling-delay-passive = <20>; /* milliseconds */
> > +                     polling-delay = <1000>; /* milliseconds */
> > +                     thermal-sensors = <&tsadc 1>;
> > +
> > +                     trips {
> > +                             big0_crit: big0-crit {
> > +                                     /* millicelsius */
> > +                                     temperature = <115000>;
> > +                                     /* millicelsius */
> > +                                     hysteresis = <2000>;
> > +                                     type = "critical";
> > +                             };
> > +                     };
> > +             };
> > +
> > +             bigcore1_thermal: bigcore1-thermal {
> > +                     polling-delay-passive = <20>; /* milliseconds */
> > +                     polling-delay = <1000>; /* milliseconds */
> > +                     thermal-sensors = <&tsadc 2>;
> > +
> > +                     trips {
> > +                             big1_crit: big1-crit {
> > +                                     /* millicelsius */
> > +                                     temperature = <115000>;
> > +                                     /* millicelsius */
> > +                                     hysteresis = <2000>;
> > +                                     type = "critical";
> > +                             };
> > +                     };
> > +             };
> > +
> > +             little_core_thermal: littlecore-thermal {
> > +                     polling-delay-passive = <20>; /* milliseconds */
> > +                     polling-delay = <1000>; /* milliseconds */
> > +                     thermal-sensors = <&tsadc 3>;
> > +
> > +                     trips {
> > +                             little_crit: little-crit {
> > +                                     /* millicelsius */
> > +                                     temperature = <115000>;
> > +                                     /* millicelsius */
> > +                                     hysteresis = <2000>;
> > +                                     type = "critical";
> > +                             };
> > +                     };
> > +             };
> > +
> > +             center_thermal: center-thermal {
> > +                     polling-delay-passive = <20>; /* milliseconds */
> > +                     polling-delay = <1000>; /* milliseconds */
> > +                     thermal-sensors = <&tsadc 4>;
> > +
> > +                     trips {
> > +                             center_crit: center-crit {
> > +                                     /* millicelsius */
> > +                                     temperature = <115000>;
> > +                                     /* millicelsius */
> > +                                     hysteresis = <2000>;
> > +                                     type = "critical";
> > +                             };
> > +                     };
> > +             };
> > +
> > +             gpu_thermal: gpu-thermal {
> > +                     polling-delay-passive = <20>; /* milliseconds */
> > +                     polling-delay = <1000>; /* milliseconds */
> > +                     thermal-sensors = <&tsadc 5>;
> > +
> > +                     trips {
> > +                             gpu_crit: gpu-crit {
> > +                                     /* millicelsius */
> > +                                     temperature = <115000>;
> > +                                     /* millicelsius */
> > +                                     hysteresis = <2000>;
> > +                                     type = "critical";
> > +                             };
> > +                     };
> > +             };
> > +
> > +             npu_thermal: npu-thermal {
> > +                     polling-delay-passive = <20>; /* milliseconds */
> > +                     polling-delay = <1000>; /* milliseconds */
> > +                     thermal-sensors = <&tsadc 6>;
> > +
> > +                     trips {
> > +                             npu_crit: npu-crit {
> > +                                     /* millicelsius */
> > +                                     temperature = <115000>;
> > +                                     /* millicelsius */
> > +                                     hysteresis = <2000>;
> > +                                     type = "critical";
> > +                             };
> > +                     };
> > +             };
> > +     };
> > +
> >       saradc: adc@fec10000 {
> >               compatible = "rockchip,rk3588-saradc";
> >               reg = <0x0 0xfec10000 0x0 0x10000>;
Dragan Simic Jan. 18, 2024, 6:48 p.m. UTC | #3 
On 2024-01-08 14:41, Alexey Charkov wrote:
> Hello Dragan,

Hello Alexey! :)

I apologize for my delayed response.  It took me almost a month to
nearly fully recover from some really nasty flu that eventually went
into my lungs.  It was awful and I'm still not back to my 100%. :(

> Thanks a lot for your review and comments! Some reflections below.

Thank you for your work and for your detailed response.  Please see my
comments below, which apply to your v2 submission as a well, to which
I'll respond separately a bit later.

> On Sun, Jan 7, 2024 at 2:54 AM Dragan Simic <dsimic@manjaro.org> wrote:
>> On 2024-01-06 23:23, Alexey Charkov wrote:
>> > Include thermal zones information in device tree for rk3588 variants
>> > and enable the built-in thermal sensing ADC on RADXA Rock 5B
>> >
>> > Signed-off-by: Alexey Charkov <alchark@gmail.com>
>> > ---
>> > diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
>> > b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
>> > index 8aa0499f9b03..8235991e3112 100644
>> > --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
>> > +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
>> > @@ -10,6 +10,7 @@
>> >  #include <dt-bindings/reset/rockchip,rk3588-cru.h>
>> >  #include <dt-bindings/phy/phy.h>
>> >  #include <dt-bindings/ata/ahci.h>
>> > +#include <dt-bindings/thermal/thermal.h>
>> >
>> >  / {
>> >       compatible = "rockchip,rk3588";
>> > @@ -2112,6 +2113,148 @@ tsadc: tsadc@fec00000 {
>> >               status = "disabled";
>> >       };
>> >
>> > +     thermal_zones: thermal-zones {
>> > +             soc_thermal: soc-thermal {
>> 
>> It should be better to name it cpu_thermal instead.  In the end, 
>> that's
>> what it is.
> 
> The TRM document says the first TSADC channel (to which this section
> applies) measures the temperature near the center of the SoC die,
> which implies not only the CPU but also the GPU at least. RADXA's
> kernel for Rock 5B also has GPU passive cooling as one of the cooling
> maps under this node (not included here, as we don't have the GPU node
> in .dtsi just yet). So perhaps naming this one cpu_thermal could be
> misleading?

Ah, I see now, thanks for reminding;  it's all described on page 1,372
of the first part of the RK3588 TRM v1.0.

Having that in mind, I'd suggest that we end up naming it 
package_thermal.
The temperature near the center of the chip is usually considered to be
the overall package temperature;  for example, that's how the 
user-facing
CPU temperatures are measured in the x86_64 world.

>> > +                     trips {
>> > +                             threshold: trip-point-0 {
>> 
>> It should be better to name it cpu_alert0 instead, because that's what
>> other newer dtsi files already use.
> 
> Reflecting on your comments here and below, I'm thinking that maybe it
> would be better to define only the critical trip point for the SoC
> overall, and then have alerts along with the respective cooling maps
> separately for A76-0,1, A76-2,3, A55-0,1,2,3? After all, given that we
> have more granular temperature measurement here than in previous RK
> chipsets it might be better to only throttle the "offending" cores,
> not the full package.
> 
> What do you think?
> 
> Downstream DT doesn't follow this approach though, so maybe there's
> something I'm missing here.

I agree, it's better to fully utilize the higher measurement granularity
made possible by having multiple temperature sensors available.

I also agree that we should have only the critical trip defined for the
package-level temperature sensor.  Let's have the separate temperature
measurements for the CPU (sub)clusters do the thermal throttling, and
let's keep the package-level measurement for the critical shutdowns 
only.
IIRC, some MediaTek SoC dtsi already does exactly that.

Of course, there are no reasons not to have the critical trips defined
for the CPU (sub)clusters as well.

>> > +                                     temperature = <75000>;
>> > +                                     hysteresis = <2000>;
>> > +                                     type = "passive";
>> > +                             };
>> > +                             target: trip-point-1 {
>> 
>> It should be better to name it cpu_alert1 instead, because that's what
>> other newer dtsi files already use.
>> 
>> > +                                     temperature = <85000>;
>> > +                                     hysteresis = <2000>;
>> > +                                     type = "passive";
>> > +                             };
>> > +                             soc_crit: soc-crit {
>> 
>> It should be better to name it cpu_crit instead, because that's what
>> other newer dtsi files already use.
> 
> Seems to me that if I define separate trips for the three groups of
> CPU cores as mentioned above this would better stay as soc_crit, as it
> applies to the whole die rather than the CPU cluster alone. Then
> 'threshold' and 'target' will go altogether, and I'll have separate
> *_alert0 and *_alert1 per CPU group.

It should perhaps be the best to have "passive", "hot" and "critical"
trips defined for all three CPU groups/(sub)clusters, separately of
course, to have even higher granularity when it comes to the resulting
thermal throttling.

>> > +                                     hysteresis = <2000>;
>> > +                                     type = "critical";
>> > +                             };
>> > +                     };
>> > +                     cooling-maps {
>> > +                             map0 {
>> > +                                     trip = <&target>;
>> 
>> Shouldn't &threshold (i.e. &cpu_alert0) be referenced here instead?
>> 
>> > +                                     cooling-device = <&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
>> 
>> Shouldn't all big CPU cores be listed here instead?
> 
> I guess if a separate trip point is defined for cpu_l0,1,2,3 then it
> would need to throttle at 75C, and then cpu_b0,1 and cpu_b2,3 at 85C
> each. Logic being that if a sensor stacked in the middle of a group of
> four cores shows 75C then one of the four might well be in abnormal
> temperature range already (85+), while sensors next to only two big
> cores each will likely show temperatures similar to the actual core
> temperature.

I think we shouldn't make any assumptions of how the CPU cores heat up
and affect each other, because we don't really know the required 
details.
Instead, we should simply define the reasonable values for the 
"passive",
"hot" and "critical" trips, and leave the rest to the standard thermal
throttling logic.  I hope you agree.

In the end, that's why we have separate thermal sensors available.
Alexey Charkov Jan. 21, 2024, 6:56 p.m. UTC | #4 
On Thu, Jan 18, 2024 at 10:48 PM Dragan Simic <dsimic@manjaro.org> wrote:
>
> On 2024-01-08 14:41, Alexey Charkov wrote:
> > Hello Dragan,
>
> Hello Alexey! :)
>
> I apologize for my delayed response.  It took me almost a month to
> nearly fully recover from some really nasty flu that eventually went
> into my lungs.  It was awful and I'm still not back to my 100%. :(

Ouch, I hope you get well soon!

> > Thanks a lot for your review and comments! Some reflections below.
>
> Thank you for your work and for your detailed response.  Please see my
> comments below, which apply to your v2 submission as a well, to which
> I'll respond separately a bit later.
>
> > On Sun, Jan 7, 2024 at 2:54 AM Dragan Simic <dsimic@manjaro.org> wrote:
> >> On 2024-01-06 23:23, Alexey Charkov wrote:
> >> > Include thermal zones information in device tree for rk3588 variants
> >> > and enable the built-in thermal sensing ADC on RADXA Rock 5B
> >> >
> >> > Signed-off-by: Alexey Charkov <alchark@gmail.com>
> >> > ---
> >> > diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
> >> > b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
> >> > index 8aa0499f9b03..8235991e3112 100644
> >> > --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
> >> > +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
> >> > @@ -10,6 +10,7 @@
> >> >  #include <dt-bindings/reset/rockchip,rk3588-cru.h>
> >> >  #include <dt-bindings/phy/phy.h>
> >> >  #include <dt-bindings/ata/ahci.h>
> >> > +#include <dt-bindings/thermal/thermal.h>
> >> >
> >> >  / {
> >> >       compatible = "rockchip,rk3588";
> >> > @@ -2112,6 +2113,148 @@ tsadc: tsadc@fec00000 {
> >> >               status = "disabled";
> >> >       };
> >> >
> >> > +     thermal_zones: thermal-zones {
> >> > +             soc_thermal: soc-thermal {
> >>
> >> It should be better to name it cpu_thermal instead.  In the end,
> >> that's
> >> what it is.
> >
> > The TRM document says the first TSADC channel (to which this section
> > applies) measures the temperature near the center of the SoC die,
> > which implies not only the CPU but also the GPU at least. RADXA's
> > kernel for Rock 5B also has GPU passive cooling as one of the cooling
> > maps under this node (not included here, as we don't have the GPU node
> > in .dtsi just yet). So perhaps naming this one cpu_thermal could be
> > misleading?
>
> Ah, I see now, thanks for reminding;  it's all described on page 1,372
> of the first part of the RK3588 TRM v1.0.
>
> Having that in mind, I'd suggest that we end up naming it
> package_thermal.
> The temperature near the center of the chip is usually considered to be
> the overall package temperature;  for example, that's how the
> user-facing
> CPU temperatures are measured in the x86_64 world.

Sounds good, will rename in v3!

> >> > +                     trips {
> >> > +                             threshold: trip-point-0 {
> >>
> >> It should be better to name it cpu_alert0 instead, because that's what
> >> other newer dtsi files already use.
> >
> > Reflecting on your comments here and below, I'm thinking that maybe it
> > would be better to define only the critical trip point for the SoC
> > overall, and then have alerts along with the respective cooling maps
> > separately for A76-0,1, A76-2,3, A55-0,1,2,3? After all, given that we
> > have more granular temperature measurement here than in previous RK
> > chipsets it might be better to only throttle the "offending" cores,
> > not the full package.
> >
> > What do you think?
> >
> > Downstream DT doesn't follow this approach though, so maybe there's
> > something I'm missing here.
>
> I agree, it's better to fully utilize the higher measurement granularity
> made possible by having multiple temperature sensors available.
>
> I also agree that we should have only the critical trip defined for the
> package-level temperature sensor.  Let's have the separate temperature
> measurements for the CPU (sub)clusters do the thermal throttling, and
> let's keep the package-level measurement for the critical shutdowns
> only.
> IIRC, some MediaTek SoC dtsi already does exactly that.
>
> Of course, there are no reasons not to have the critical trips defined
> for the CPU (sub)clusters as well.

I think I'll also add a board-specific active cooling mechanism on the
package level in the next iteration, given that Rock 5B has a PWM fan
defined as a cooling device. That will go in the separate patch that
updates rk3588-rock-5b.dts (your feedback to v2 of this patch is also
duly noted, thank you!)

> >> > +                                     temperature = <75000>;
> >> > +                                     hysteresis = <2000>;
> >> > +                                     type = "passive";
> >> > +                             };
> >> > +                             target: trip-point-1 {
> >>
> >> It should be better to name it cpu_alert1 instead, because that's what
> >> other newer dtsi files already use.
> >>
> >> > +                                     temperature = <85000>;
> >> > +                                     hysteresis = <2000>;
> >> > +                                     type = "passive";
> >> > +                             };
> >> > +                             soc_crit: soc-crit {
> >>
> >> It should be better to name it cpu_crit instead, because that's what
> >> other newer dtsi files already use.
> >
> > Seems to me that if I define separate trips for the three groups of
> > CPU cores as mentioned above this would better stay as soc_crit, as it
> > applies to the whole die rather than the CPU cluster alone. Then
> > 'threshold' and 'target' will go altogether, and I'll have separate
> > *_alert0 and *_alert1 per CPU group.
>
> It should perhaps be the best to have "passive", "hot" and "critical"
> trips defined for all three CPU groups/(sub)clusters, separately of
> course, to have even higher granularity when it comes to the resulting
> thermal throttling.

I looked through drivers/thermal/rockchip_thermal.c, and it doesn't
seem to provide any callback for the "hot" trip as part of its struct
thermal_zone_device_ops, so I guess it would be redundant in our case
here? I couldn't find any generic mechanism to react to "hot" trips,
and they seem to be purely driver-specific, thus no-op in case of
Rockchips - or am I missing something?

> >> > +                                     hysteresis = <2000>;
> >> > +                                     type = "critical";
> >> > +                             };
> >> > +                     };
> >> > +                     cooling-maps {
> >> > +                             map0 {
> >> > +                                     trip = <&target>;
> >>
> >> Shouldn't &threshold (i.e. &cpu_alert0) be referenced here instead?
> >>
> >> > +                                     cooling-device = <&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
> >>
> >> Shouldn't all big CPU cores be listed here instead?
> >
> > I guess if a separate trip point is defined for cpu_l0,1,2,3 then it
> > would need to throttle at 75C, and then cpu_b0,1 and cpu_b2,3 at 85C
> > each. Logic being that if a sensor stacked in the middle of a group of
> > four cores shows 75C then one of the four might well be in abnormal
> > temperature range already (85+), while sensors next to only two big
> > cores each will likely show temperatures similar to the actual core
> > temperature.
>
> I think we shouldn't make any assumptions of how the CPU cores heat up
> and affect each other, because we don't really know the required
> details.
> Instead, we should simply define the reasonable values for the
> "passive",
> "hot" and "critical" trips, and leave the rest to the standard thermal
> throttling logic.  I hope you agree.
>
> In the end, that's why we have separate thermal sensors available.

Indeed! I'll add extra "passive" alerts though (at 75C) to enable the
power allocation governor to initialize its PID parameters calculation
before the control temperature setpoint gets hit (per Daniel's
feedback under separate cover).

Thanks again for your review and comments on this one!

Best regards,
Alexey
Dragan Simic Jan. 22, 2024, 4:55 a.m. UTC | #5 
Hello Alexey,

On 2024-01-21 19:56, Alexey Charkov wrote:
> On Thu, Jan 18, 2024 at 10:48 PM Dragan Simic <dsimic@manjaro.org> 
> wrote:
>> On 2024-01-08 14:41, Alexey Charkov wrote:
>> I apologize for my delayed response.  It took me almost a month to
>> nearly fully recover from some really nasty flu that eventually went
>> into my lungs.  It was awful and I'm still not back to my 100%. :(
> 
> Ouch, I hope you get well soon!

Thank you, let's hope so.  It's been really exhausting. :(

>> > On Sun, Jan 7, 2024 at 2:54 AM Dragan Simic <dsimic@manjaro.org> wrote:
>> >> On 2024-01-06 23:23, Alexey Charkov wrote:
>> >> > Include thermal zones information in device tree for rk3588 variants
>> >> > and enable the built-in thermal sensing ADC on RADXA Rock 5B
>> >> >
>> >> > Signed-off-by: Alexey Charkov <alchark@gmail.com>
>> >> > ---
>> >> > diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
>> >> > b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
>> >> > index 8aa0499f9b03..8235991e3112 100644
>> >> > --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
>> >> > +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
>> >> > @@ -10,6 +10,7 @@
>> >> >  #include <dt-bindings/reset/rockchip,rk3588-cru.h>
>> >> >  #include <dt-bindings/phy/phy.h>
>> >> >  #include <dt-bindings/ata/ahci.h>
>> >> > +#include <dt-bindings/thermal/thermal.h>
>> >> >
>> >> >  / {
>> >> >       compatible = "rockchip,rk3588";
>> >> > @@ -2112,6 +2113,148 @@ tsadc: tsadc@fec00000 {
>> >> >               status = "disabled";
>> >> >       };
>> >> >
>> >> > +     thermal_zones: thermal-zones {
>> >> > +             soc_thermal: soc-thermal {
>> >>
>> >> It should be better to name it cpu_thermal instead.  In the end,
>> >> that's what it is.
>> >
>> > The TRM document says the first TSADC channel (to which this section
>> > applies) measures the temperature near the center of the SoC die,
>> > which implies not only the CPU but also the GPU at least. RADXA's
>> > kernel for Rock 5B also has GPU passive cooling as one of the cooling
>> > maps under this node (not included here, as we don't have the GPU node
>> > in .dtsi just yet). So perhaps naming this one cpu_thermal could be
>> > misleading?
>> 
>> Ah, I see now, thanks for reminding;  it's all described on page 1,372
>> of the first part of the RK3588 TRM v1.0.
>> 
>> Having that in mind, I'd suggest that we end up naming it 
>> package_thermal.
>> The temperature near the center of the chip is usually considered to 
>> be
>> the overall package temperature;  for example, that's how the 
>> user-facing
>> CPU temperatures are measured in the x86_64 world.
> 
> Sounds good, will rename in v3!

Thanks, I'm glad you agree.

>> >> > +                     trips {
>> >> > +                             threshold: trip-point-0 {
>> >>
>> >> It should be better to name it cpu_alert0 instead, because that's what
>> >> other newer dtsi files already use.
>> >
>> > Reflecting on your comments here and below, I'm thinking that maybe it
>> > would be better to define only the critical trip point for the SoC
>> > overall, and then have alerts along with the respective cooling maps
>> > separately for A76-0,1, A76-2,3, A55-0,1,2,3? After all, given that we
>> > have more granular temperature measurement here than in previous RK
>> > chipsets it might be better to only throttle the "offending" cores,
>> > not the full package.
>> >
>> > What do you think?
>> >
>> > Downstream DT doesn't follow this approach though, so maybe there's
>> > something I'm missing here.
>> 
>> I agree, it's better to fully utilize the higher measurement 
>> granularity
>> made possible by having multiple temperature sensors available.
>> 
>> I also agree that we should have only the critical trip defined for 
>> the
>> package-level temperature sensor.  Let's have the separate temperature
>> measurements for the CPU (sub)clusters do the thermal throttling, and
>> let's keep the package-level measurement for the critical shutdowns
>> only.  IIRC, some MediaTek SoC dtsi already does exactly that.
>> 
>> Of course, there are no reasons not to have the critical trips defined
>> for the CPU (sub)clusters as well.
> 
> I think I'll also add a board-specific active cooling mechanism on the
> package level in the next iteration, given that Rock 5B has a PWM fan
> defined as a cooling device. That will go in the separate patch that
> updates rk3588-rock-5b.dts (your feedback to v2 of this patch is also
> duly noted, thank you!)

Great, thanks.  Sure, making use of the Rock 5B's support for attaching
a PWM-controlled cooling fan is the way to go.

Just to reiterate a bit, any "active" trip points belong to the board 
dts
file(s), because having a cooling fan is a board-specific feature.  As a
note, you may also want to have a look at the RockPro64 dts(i) files, 
for
example;  the RockPro64 also comes with a cooling fan connector and the
associated PWM fan control logic.

>> >> > +                                     temperature = <75000>;
>> >> > +                                     hysteresis = <2000>;
>> >> > +                                     type = "passive";
>> >> > +                             };
>> >> > +                             target: trip-point-1 {
>> >>
>> >> It should be better to name it cpu_alert1 instead, because that's what
>> >> other newer dtsi files already use.
>> >>
>> >> > +                                     temperature = <85000>;
>> >> > +                                     hysteresis = <2000>;
>> >> > +                                     type = "passive";
>> >> > +                             };
>> >> > +                             soc_crit: soc-crit {
>> >>
>> >> It should be better to name it cpu_crit instead, because that's what
>> >> other newer dtsi files already use.
>> >
>> > Seems to me that if I define separate trips for the three groups of
>> > CPU cores as mentioned above this would better stay as soc_crit, as it
>> > applies to the whole die rather than the CPU cluster alone. Then
>> > 'threshold' and 'target' will go altogether, and I'll have separate
>> > *_alert0 and *_alert1 per CPU group.
>> 
>> It should perhaps be the best to have "passive", "hot" and "critical"
>> trips defined for all three CPU groups/(sub)clusters, separately of
>> course, to have even higher granularity when it comes to the resulting
>> thermal throttling.
> 
> I looked through drivers/thermal/rockchip_thermal.c, and it doesn't
> seem to provide any callback for the "hot" trip as part of its struct
> thermal_zone_device_ops, so I guess it would be redundant in our case
> here? I couldn't find any generic mechanism to react to "hot" trips,
> and they seem to be purely driver-specific, thus no-op in case of
> Rockchips - or am I missing something?

That's a good question.  Please, let me go through the code in detail,
and I'll get back with an update soon.  Also, please wait a bit with
sending the v3, until all open questions are addressed.

>> >> > +                                     hysteresis = <2000>;
>> >> > +                                     type = "critical";
>> >> > +                             };
>> >> > +                     };
>> >> > +                     cooling-maps {
>> >> > +                             map0 {
>> >> > +                                     trip = <&target>;
>> >>
>> >> Shouldn't &threshold (i.e. &cpu_alert0) be referenced here instead?
>> >>
>> >> > +                                     cooling-device = <&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
>> >>
>> >> Shouldn't all big CPU cores be listed here instead?
>> >
>> > I guess if a separate trip point is defined for cpu_l0,1,2,3 then it
>> > would need to throttle at 75C, and then cpu_b0,1 and cpu_b2,3 at 85C
>> > each. Logic being that if a sensor stacked in the middle of a group of
>> > four cores shows 75C then one of the four might well be in abnormal
>> > temperature range already (85+), while sensors next to only two big
>> > cores each will likely show temperatures similar to the actual core
>> > temperature.
>> 
>> I think we shouldn't make any assumptions of how the CPU cores heat up
>> and affect each other, because we don't really know the required 
>> details.
>> Instead, we should simply define the reasonable values for the 
>> "passive",
>> "hot" and "critical" trips, and leave the rest to the standard thermal
>> throttling logic.  I hope you agree.
>> 
>> In the end, that's why we have separate thermal sensors available.
> 
> Indeed! I'll add extra "passive" alerts though (at 75C) to enable the
> power allocation governor to initialize its PID parameters calculation
> before the control temperature setpoint gets hit (per Daniel's
> feedback under separate cover).

I'm glad you agree.  Adding one more "passive" trip point makes sense,
but please let me go through the code in detail first.
Alexey Charkov Jan. 22, 2024, 6:03 a.m. UTC | #6 
On Mon, Jan 22, 2024 at 8:55 AM Dragan Simic <dsimic@manjaro.org> wrote:
>
> Hello Alexey,
>
> On 2024-01-21 19:56, Alexey Charkov wrote:
> > On Thu, Jan 18, 2024 at 10:48 PM Dragan Simic <dsimic@manjaro.org>
> > wrote:
> >> On 2024-01-08 14:41, Alexey Charkov wrote:
> >> I apologize for my delayed response.  It took me almost a month to
> >> nearly fully recover from some really nasty flu that eventually went
> >> into my lungs.  It was awful and I'm still not back to my 100%. :(
> >
> > Ouch, I hope you get well soon!
>
> Thank you, let's hope so.  It's been really exhausting. :(
>
> >> > On Sun, Jan 7, 2024 at 2:54 AM Dragan Simic <dsimic@manjaro.org> wrote:
> >> >> On 2024-01-06 23:23, Alexey Charkov wrote:
> >> >> > Include thermal zones information in device tree for rk3588 variants
> >> >> > and enable the built-in thermal sensing ADC on RADXA Rock 5B
> >> >> >
> >> >> > Signed-off-by: Alexey Charkov <alchark@gmail.com>
> >> >> > ---
> >> >> > diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
> >> >> > b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
> >> >> > index 8aa0499f9b03..8235991e3112 100644
> >> >> > --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
> >> >> > +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
> >> >> > @@ -10,6 +10,7 @@
> >> >> >  #include <dt-bindings/reset/rockchip,rk3588-cru.h>
> >> >> >  #include <dt-bindings/phy/phy.h>
> >> >> >  #include <dt-bindings/ata/ahci.h>
> >> >> > +#include <dt-bindings/thermal/thermal.h>
> >> >> >
> >> >> >  / {
> >> >> >       compatible = "rockchip,rk3588";
> >> >> > @@ -2112,6 +2113,148 @@ tsadc: tsadc@fec00000 {
> >> >> >               status = "disabled";
> >> >> >       };
> >> >> >
> >> >> > +     thermal_zones: thermal-zones {
> >> >> > +             soc_thermal: soc-thermal {
> >> >>
> >> >> It should be better to name it cpu_thermal instead.  In the end,
> >> >> that's what it is.
> >> >
> >> > The TRM document says the first TSADC channel (to which this section
> >> > applies) measures the temperature near the center of the SoC die,
> >> > which implies not only the CPU but also the GPU at least. RADXA's
> >> > kernel for Rock 5B also has GPU passive cooling as one of the cooling
> >> > maps under this node (not included here, as we don't have the GPU node
> >> > in .dtsi just yet). So perhaps naming this one cpu_thermal could be
> >> > misleading?
> >>
> >> Ah, I see now, thanks for reminding;  it's all described on page 1,372
> >> of the first part of the RK3588 TRM v1.0.
> >>
> >> Having that in mind, I'd suggest that we end up naming it
> >> package_thermal.
> >> The temperature near the center of the chip is usually considered to
> >> be
> >> the overall package temperature;  for example, that's how the
> >> user-facing
> >> CPU temperatures are measured in the x86_64 world.
> >
> > Sounds good, will rename in v3!
>
> Thanks, I'm glad you agree.
>
> >> >> > +                     trips {
> >> >> > +                             threshold: trip-point-0 {
> >> >>
> >> >> It should be better to name it cpu_alert0 instead, because that's what
> >> >> other newer dtsi files already use.
> >> >
> >> > Reflecting on your comments here and below, I'm thinking that maybe it
> >> > would be better to define only the critical trip point for the SoC
> >> > overall, and then have alerts along with the respective cooling maps
> >> > separately for A76-0,1, A76-2,3, A55-0,1,2,3? After all, given that we
> >> > have more granular temperature measurement here than in previous RK
> >> > chipsets it might be better to only throttle the "offending" cores,
> >> > not the full package.
> >> >
> >> > What do you think?
> >> >
> >> > Downstream DT doesn't follow this approach though, so maybe there's
> >> > something I'm missing here.
> >>
> >> I agree, it's better to fully utilize the higher measurement
> >> granularity
> >> made possible by having multiple temperature sensors available.
> >>
> >> I also agree that we should have only the critical trip defined for
> >> the
> >> package-level temperature sensor.  Let's have the separate temperature
> >> measurements for the CPU (sub)clusters do the thermal throttling, and
> >> let's keep the package-level measurement for the critical shutdowns
> >> only.  IIRC, some MediaTek SoC dtsi already does exactly that.
> >>
> >> Of course, there are no reasons not to have the critical trips defined
> >> for the CPU (sub)clusters as well.
> >
> > I think I'll also add a board-specific active cooling mechanism on the
> > package level in the next iteration, given that Rock 5B has a PWM fan
> > defined as a cooling device. That will go in the separate patch that
> > updates rk3588-rock-5b.dts (your feedback to v2 of this patch is also
> > duly noted, thank you!)
>
> Great, thanks.  Sure, making use of the Rock 5B's support for attaching
> a PWM-controlled cooling fan is the way to go.
>
> Just to reiterate a bit, any "active" trip points belong to the board
> dts
> file(s), because having a cooling fan is a board-specific feature.  As a
> note, you may also want to have a look at the RockPro64 dts(i) files,
> for
> example;  the RockPro64 also comes with a cooling fan connector and the
> associated PWM fan control logic.

Thanks for the pointer! There is also a helpful doc within devicetree
bindings descriptions, although it sits under hwmon which was a bit
confusing to me. I've already tested it locally (by adding to the
board dts), and it spins up and down quite nicely, and even modulates
the fan speed swiftly when the load changes - yay!

> >> >> > +                                     temperature = <75000>;
> >> >> > +                                     hysteresis = <2000>;
> >> >> > +                                     type = "passive";
> >> >> > +                             };
> >> >> > +                             target: trip-point-1 {
> >> >>
> >> >> It should be better to name it cpu_alert1 instead, because that's what
> >> >> other newer dtsi files already use.
> >> >>
> >> >> > +                                     temperature = <85000>;
> >> >> > +                                     hysteresis = <2000>;
> >> >> > +                                     type = "passive";
> >> >> > +                             };
> >> >> > +                             soc_crit: soc-crit {
> >> >>
> >> >> It should be better to name it cpu_crit instead, because that's what
> >> >> other newer dtsi files already use.
> >> >
> >> > Seems to me that if I define separate trips for the three groups of
> >> > CPU cores as mentioned above this would better stay as soc_crit, as it
> >> > applies to the whole die rather than the CPU cluster alone. Then
> >> > 'threshold' and 'target' will go altogether, and I'll have separate
> >> > *_alert0 and *_alert1 per CPU group.
> >>
> >> It should perhaps be the best to have "passive", "hot" and "critical"
> >> trips defined for all three CPU groups/(sub)clusters, separately of
> >> course, to have even higher granularity when it comes to the resulting
> >> thermal throttling.
> >
> > I looked through drivers/thermal/rockchip_thermal.c, and it doesn't
> > seem to provide any callback for the "hot" trip as part of its struct
> > thermal_zone_device_ops, so I guess it would be redundant in our case
> > here? I couldn't find any generic mechanism to react to "hot" trips,
> > and they seem to be purely driver-specific, thus no-op in case of
> > Rockchips - or am I missing something?
>
> That's a good question.  Please, let me go through the code in detail,
> and I'll get back with an update soon.  Also, please wait a bit with
> sending the v3, until all open questions are addressed.

Of course. Thank you for taking the time to dig through this one with me!

Best regards,
Alexey
Dragan Simic Jan. 22, 2024, 6:22 a.m. UTC | #7 
On 2024-01-22 07:03, Alexey Charkov wrote:
> On Mon, Jan 22, 2024 at 8:55 AM Dragan Simic <dsimic@manjaro.org> 
> wrote:
>> On 2024-01-21 19:56, Alexey Charkov wrote:
>> > On Thu, Jan 18, 2024 at 10:48 PM Dragan Simic <dsimic@manjaro.org> wrote:
>> >> On 2024-01-08 14:41, Alexey Charkov wrote:
>> >> > On Sun, Jan 7, 2024 at 2:54 AM Dragan Simic <dsimic@manjaro.org> wrote:
>> >> >> On 2024-01-06 23:23, Alexey Charkov wrote:
>> >> >> > Include thermal zones information in device tree for rk3588 variants
>> >> >> > and enable the built-in thermal sensing ADC on RADXA Rock 5B
>> >> >> >
>> >> >> > Signed-off-by: Alexey Charkov <alchark@gmail.com>
>> >> >> > ---
>> >> >> > +                     trips {
>> >> >> > +                             threshold: trip-point-0 {
>> >> >>
>> >> >> It should be better to name it cpu_alert0 instead, because that's what
>> >> >> other newer dtsi files already use.
>> >> >
>> >> > Reflecting on your comments here and below, I'm thinking that maybe it
>> >> > would be better to define only the critical trip point for the SoC
>> >> > overall, and then have alerts along with the respective cooling maps
>> >> > separately for A76-0,1, A76-2,3, A55-0,1,2,3? After all, given that we
>> >> > have more granular temperature measurement here than in previous RK
>> >> > chipsets it might be better to only throttle the "offending" cores,
>> >> > not the full package.
>> >> >
>> >> > What do you think?
>> >> >
>> >> > Downstream DT doesn't follow this approach though, so maybe there's
>> >> > something I'm missing here.
>> >>
>> >> I agree, it's better to fully utilize the higher measurement
>> >> granularity
>> >> made possible by having multiple temperature sensors available.
>> >>
>> >> I also agree that we should have only the critical trip defined for
>> >> the
>> >> package-level temperature sensor.  Let's have the separate temperature
>> >> measurements for the CPU (sub)clusters do the thermal throttling, and
>> >> let's keep the package-level measurement for the critical shutdowns
>> >> only.  IIRC, some MediaTek SoC dtsi already does exactly that.
>> >>
>> >> Of course, there are no reasons not to have the critical trips defined
>> >> for the CPU (sub)clusters as well.
>> >
>> > I think I'll also add a board-specific active cooling mechanism on the
>> > package level in the next iteration, given that Rock 5B has a PWM fan
>> > defined as a cooling device. That will go in the separate patch that
>> > updates rk3588-rock-5b.dts (your feedback to v2 of this patch is also
>> > duly noted, thank you!)
>> 
>> Great, thanks.  Sure, making use of the Rock 5B's support for 
>> attaching
>> a PWM-controlled cooling fan is the way to go.
>> 
>> Just to reiterate a bit, any "active" trip points belong to the board
>> dts file(s), because having a cooling fan is a board-specific feature.
>> As a note, you may also want to have a look at the RockPro64 dts(i)
>> files, for example;  the RockPro64 also comes with a cooling fan
>> connector and the associated PWM fan control logic.
> 
> Thanks for the pointer! There is also a helpful doc within devicetree
> bindings descriptions, although it sits under hwmon which was a bit
> confusing to me. I've already tested it locally (by adding to the
> board dts), and it spins up and down quite nicely, and even modulates
> the fan speed swiftly when the load changes - yay!

Nice!  Also, isn't it like magic? :)  To me, turning LEDs on/off and
controlling fans acts as some kind of a "bridge" between the virtual
and the real world. :)

As a suggestion, it would be good to test with a couple of different
fans, to make sure that the PWM values work well for more that one fan
model.  The Rock 5B requires a 5 V fan, if I'm not mistaken?

>> >> >> > +                                     temperature = <75000>;
>> >> >> > +                                     hysteresis = <2000>;
>> >> >> > +                                     type = "passive";
>> >> >> > +                             };
>> >> >> > +                             target: trip-point-1 {
>> >> >>
>> >> >> It should be better to name it cpu_alert1 instead, because that's what
>> >> >> other newer dtsi files already use.
>> >> >>
>> >> >> > +                                     temperature = <85000>;
>> >> >> > +                                     hysteresis = <2000>;
>> >> >> > +                                     type = "passive";
>> >> >> > +                             };
>> >> >> > +                             soc_crit: soc-crit {
>> >> >>
>> >> >> It should be better to name it cpu_crit instead, because that's what
>> >> >> other newer dtsi files already use.
>> >> >
>> >> > Seems to me that if I define separate trips for the three groups of
>> >> > CPU cores as mentioned above this would better stay as soc_crit, as it
>> >> > applies to the whole die rather than the CPU cluster alone. Then
>> >> > 'threshold' and 'target' will go altogether, and I'll have separate
>> >> > *_alert0 and *_alert1 per CPU group.
>> >>
>> >> It should perhaps be the best to have "passive", "hot" and "critical"
>> >> trips defined for all three CPU groups/(sub)clusters, separately of
>> >> course, to have even higher granularity when it comes to the resulting
>> >> thermal throttling.
>> >
>> > I looked through drivers/thermal/rockchip_thermal.c, and it doesn't
>> > seem to provide any callback for the "hot" trip as part of its struct
>> > thermal_zone_device_ops, so I guess it would be redundant in our case
>> > here? I couldn't find any generic mechanism to react to "hot" trips,
>> > and they seem to be purely driver-specific, thus no-op in case of
>> > Rockchips - or am I missing something?
>> 
>> That's a good question.  Please, let me go through the code in detail,
>> and I'll get back with an update soon.  Also, please wait a bit with
>> sending the v3, until all open questions are addressed.
> 
> Of course. Thank you for taking the time to dig through this one with 
> me!

I'm glad to help.  It's important to have working thermal throttling on
the supported RK3588-based boards.
Alexey Charkov Jan. 22, 2024, 7:36 a.m. UTC | #8 
On Mon, Jan 22, 2024 at 10:22 AM Dragan Simic <dsimic@manjaro.org> wrote:
>
> On 2024-01-22 07:03, Alexey Charkov wrote:
> > On Mon, Jan 22, 2024 at 8:55 AM Dragan Simic <dsimic@manjaro.org>
> > wrote:
> >> On 2024-01-21 19:56, Alexey Charkov wrote:
> >> > On Thu, Jan 18, 2024 at 10:48 PM Dragan Simic <dsimic@manjaro.org> wrote:
> >> >> On 2024-01-08 14:41, Alexey Charkov wrote:
> >> >> > On Sun, Jan 7, 2024 at 2:54 AM Dragan Simic <dsimic@manjaro.org> wrote:
> >> >> >> On 2024-01-06 23:23, Alexey Charkov wrote:
> >> >> >> > Include thermal zones information in device tree for rk3588 variants
> >> >> >> > and enable the built-in thermal sensing ADC on RADXA Rock 5B
> >> >> >> >
> >> >> >> > Signed-off-by: Alexey Charkov <alchark@gmail.com>
> >> >> >> > ---
> >> >> >> > +                     trips {
> >> >> >> > +                             threshold: trip-point-0 {
> >> >> >>
> >> >> >> It should be better to name it cpu_alert0 instead, because that's what
> >> >> >> other newer dtsi files already use.
> >> >> >
> >> >> > Reflecting on your comments here and below, I'm thinking that maybe it
> >> >> > would be better to define only the critical trip point for the SoC
> >> >> > overall, and then have alerts along with the respective cooling maps
> >> >> > separately for A76-0,1, A76-2,3, A55-0,1,2,3? After all, given that we
> >> >> > have more granular temperature measurement here than in previous RK
> >> >> > chipsets it might be better to only throttle the "offending" cores,
> >> >> > not the full package.
> >> >> >
> >> >> > What do you think?
> >> >> >
> >> >> > Downstream DT doesn't follow this approach though, so maybe there's
> >> >> > something I'm missing here.
> >> >>
> >> >> I agree, it's better to fully utilize the higher measurement
> >> >> granularity
> >> >> made possible by having multiple temperature sensors available.
> >> >>
> >> >> I also agree that we should have only the critical trip defined for
> >> >> the
> >> >> package-level temperature sensor.  Let's have the separate temperature
> >> >> measurements for the CPU (sub)clusters do the thermal throttling, and
> >> >> let's keep the package-level measurement for the critical shutdowns
> >> >> only.  IIRC, some MediaTek SoC dtsi already does exactly that.
> >> >>
> >> >> Of course, there are no reasons not to have the critical trips defined
> >> >> for the CPU (sub)clusters as well.
> >> >
> >> > I think I'll also add a board-specific active cooling mechanism on the
> >> > package level in the next iteration, given that Rock 5B has a PWM fan
> >> > defined as a cooling device. That will go in the separate patch that
> >> > updates rk3588-rock-5b.dts (your feedback to v2 of this patch is also
> >> > duly noted, thank you!)
> >>
> >> Great, thanks.  Sure, making use of the Rock 5B's support for
> >> attaching
> >> a PWM-controlled cooling fan is the way to go.
> >>
> >> Just to reiterate a bit, any "active" trip points belong to the board
> >> dts file(s), because having a cooling fan is a board-specific feature.
> >> As a note, you may also want to have a look at the RockPro64 dts(i)
> >> files, for example;  the RockPro64 also comes with a cooling fan
> >> connector and the associated PWM fan control logic.
> >
> > Thanks for the pointer! There is also a helpful doc within devicetree
> > bindings descriptions, although it sits under hwmon which was a bit
> > confusing to me. I've already tested it locally (by adding to the
> > board dts), and it spins up and down quite nicely, and even modulates
> > the fan speed swiftly when the load changes - yay!
>
> Nice!  Also, isn't it like magic? :)  To me, turning LEDs on/off and
> controlling fans acts as some kind of a "bridge" between the virtual
> and the real world. :)

Oh yes! I also keep admiring how one can add just a couple of lines of
text here and there that's not even real code, and the whole kernel
machinery starts crunching numbers, analyzing temperatures, running
PID loops, etc etc so that I could enjoy the satisfying whistle of a
small fan when I type `make -j8` :-D

> As a suggestion, it would be good to test with a couple of different
> fans, to make sure that the PWM values work well for more that one fan
> model.  The Rock 5B requires a 5 V fan, if I'm not mistaken?

It is 5V, yes. I only have one fan to try though, and I simply relied
on the PWM values that are already defined in the upstream
rk3588-rock-5b.dts. They don't look ideal for my particular fan,
because the lowest non-zero cooling state currently uses a PWM value
of 95, which doesn't always make it spin up. But in the end it doesn't
seem to matter that much, because that tiny fan needs to spin at full
255 whenever all eight cores are loaded (and even then it can only
balance the temperature at around 60.5С), and when the load is lighter
(such as during various ./configure runs) it just switches off
completely as the temperature goes down to 46C even with the fan not
spinning.

I don't currently use the GPU/NPU/VPU though - maybe those would
produce more moderate load which could benefit from spinning the fan
at medium speeds.

Best regards,
Alexey
Dragan Simic Jan. 22, 2024, 7:57 a.m. UTC | #9 
On 2024-01-22 08:36, Alexey Charkov wrote:
> On Mon, Jan 22, 2024 at 10:22 AM Dragan Simic <dsimic@manjaro.org> 
> wrote:
>> On 2024-01-22 07:03, Alexey Charkov wrote:
>> > On Mon, Jan 22, 2024 at 8:55 AM Dragan Simic <dsimic@manjaro.org> wrote:
>> >> On 2024-01-21 19:56, Alexey Charkov wrote:
>> >> > I think I'll also add a board-specific active cooling mechanism on the
>> >> > package level in the next iteration, given that Rock 5B has a PWM fan
>> >> > defined as a cooling device. That will go in the separate patch that
>> >> > updates rk3588-rock-5b.dts (your feedback to v2 of this patch is also
>> >> > duly noted, thank you!)
>> >>
>> >> Great, thanks.  Sure, making use of the Rock 5B's support for attaching
>> >> a PWM-controlled cooling fan is the way to go.
>> >>
>> >> Just to reiterate a bit, any "active" trip points belong to the board
>> >> dts file(s), because having a cooling fan is a board-specific feature.
>> >> As a note, you may also want to have a look at the RockPro64 dts(i)
>> >> files, for example;  the RockPro64 also comes with a cooling fan
>> >> connector and the associated PWM fan control logic.
>> >
>> > Thanks for the pointer! There is also a helpful doc within devicetree
>> > bindings descriptions, although it sits under hwmon which was a bit
>> > confusing to me. I've already tested it locally (by adding to the
>> > board dts), and it spins up and down quite nicely, and even modulates
>> > the fan speed swiftly when the load changes - yay!
>> 
>> Nice!  Also, isn't it like magic? :)  To me, turning LEDs on/off and
>> controlling fans acts as some kind of a "bridge" between the virtual
>> and the real world. :)
> 
> Oh yes! I also keep admiring how one can add just a couple of lines of
> text here and there that's not even real code, and the whole kernel
> machinery starts crunching numbers, analyzing temperatures, running
> PID loops, etc etc so that I could enjoy the satisfying whistle of a
> small fan when I type `make -j8` :-D

Yes, it's very satisfying, :) and it also demonstrates the true power
of the device trees as hardware definitions.  Just a few more lines and
the cooling works! :)

>> As a suggestion, it would be good to test with a couple of different
>> fans, to make sure that the PWM values work well for more that one fan
>> model.  The Rock 5B requires a 5 V fan, if I'm not mistaken?
> 
> It is 5V, yes. I only have one fan to try though, and I simply relied
> on the PWM values that are already defined in the upstream
> rk3588-rock-5b.dts. They don't look ideal for my particular fan,
> because the lowest non-zero cooling state currently uses a PWM value
> of 95, which doesn't always make it spin up. But in the end it doesn't
> seem to matter that much, because that tiny fan needs to spin at full
> 255 whenever all eight cores are loaded (and even then it can only
> balance the temperature at around 60.5С), and when the load is lighter
> (such as during various ./configure runs) it just switches off
> completely as the temperature goes down to 46C even with the fan not
> spinning.

I see, 5 V fans unfortunately aren't very common.  I'm not sure why
Radxa opted for 5 V there;  maybe the goal was to use Raspberry Pi 5 V
fans, but using those tiny fans doesn't make much sense, IMHO.

I think you can freely adjust the PWM values a bit to make your fan
start reliably at the lowest state, regardless of how rarely that state
will be used.  See, if your fan doesn't spin up reliably with the 
current
lowest state, chances for other fan models not to spin up are quite 
high.
IOW, it's better to play safe there, if you agree.

What kind of heatsink are you using with your Rock 5B?  Ah yes, and
what's the actual model of the fan you're using?

> I don't currently use the GPU/NPU/VPU though - maybe those would
> produce more moderate load which could benefit from spinning the fan
> at medium speeds.

Perhaps, but it will need to be tested at some point.  Have you tried
loading only one or two CPU cores?
Alexey Charkov Jan. 22, 2024, 2:20 p.m. UTC | #10 
On Mon, Jan 22, 2024 at 11:57 AM Dragan Simic <dsimic@manjaro.org> wrote:
>
> On 2024-01-22 08:36, Alexey Charkov wrote:
> > On Mon, Jan 22, 2024 at 10:22 AM Dragan Simic <dsimic@manjaro.org>
> > wrote:
> >> On 2024-01-22 07:03, Alexey Charkov wrote:
> >> > On Mon, Jan 22, 2024 at 8:55 AM Dragan Simic <dsimic@manjaroorg> wrote:
> >> >> On 2024-01-21 19:56, Alexey Charkov wrote:
> >> >> > I think I'll also add a board-specific active cooling mechanism on the
> >> >> > package level in the next iteration, given that Rock 5B has a PWM fan
> >> >> > defined as a cooling device. That will go in the separate patch that
> >> >> > updates rk3588-rock-5b.dts (your feedback to v2 of this patch is also
> >> >> > duly noted, thank you!)
> >> >>
> >> >> Great, thanks.  Sure, making use of the Rock 5B's support for attaching
> >> >> a PWM-controlled cooling fan is the way to go.
> >> >>
> >> >> Just to reiterate a bit, any "active" trip points belong to the board
> >> >> dts file(s), because having a cooling fan is a board-specific feature.
> >> >> As a note, you may also want to have a look at the RockPro64 dts(i)
> >> >> files, for example;  the RockPro64 also comes with a cooling fan
> >> >> connector and the associated PWM fan control logic.
> >> >
> >> > Thanks for the pointer! There is also a helpful doc within devicetree
> >> > bindings descriptions, although it sits under hwmon which was a bit
> >> > confusing to me. I've already tested it locally (by adding to the
> >> > board dts), and it spins up and down quite nicely, and even modulates
> >> > the fan speed swiftly when the load changes - yay!
> >>
> >> Nice!  Also, isn't it like magic? :)  To me, turning LEDs on/off and
> >> controlling fans acts as some kind of a "bridge" between the virtual
> >> and the real world. :)
> >
> > Oh yes! I also keep admiring how one can add just a couple of lines of
> > text here and there that's not even real code, and the whole kernel
> > machinery starts crunching numbers, analyzing temperatures, running
> > PID loops, etc etc so that I could enjoy the satisfying whistle of a
> > small fan when I type `make -j8` :-D
>
> Yes, it's very satisfying, :) and it also demonstrates the true power
> of the device trees as hardware definitions.  Just a few more lines and
> the cooling works! :)
>
> >> As a suggestion, it would be good to test with a couple of different
> >> fans, to make sure that the PWM values work well for more that one fan
> >> model.  The Rock 5B requires a 5 V fan, if I'm not mistaken?
> >
> > It is 5V, yes. I only have one fan to try though, and I simply relied
> > on the PWM values that are already defined in the upstream
> > rk3588-rock-5b.dts. They don't look ideal for my particular fan,
> > because the lowest non-zero cooling state currently uses a PWM value
> > of 95, which doesn't always make it spin up. But in the end it doesn't
> > seem to matter that much, because that tiny fan needs to spin at full
> > 255 whenever all eight cores are loaded (and even then it can only
> > balance the temperature at around 60.5С), and when the load is lighter
> > (such as during various ./configure runs) it just switches off
> > completely as the temperature goes down to 46C even with the fan not
> > spinning.
>
> I see, 5 V fans unfortunately aren't very common.  I'm not sure why
> Radxa opted for 5 V there;  maybe the goal was to use Raspberry Pi 5 V
> fans, but using those tiny fans doesn't make much sense, IMHO.
>
> I think you can freely adjust the PWM values a bit to make your fan
> start reliably at the lowest state, regardless of how rarely that state
> will be used.  See, if your fan doesn't spin up reliably with the
> current
> lowest state, chances for other fan models not to spin up are quite
> high.
> IOW, it's better to play safe there, if you agree.
>
> What kind of heatsink are you using with your Rock 5B?  Ah yes, and
> what's the actual model of the fan you're using?

I use Radxa's 4012 heatsink-fan assembly that comes as an add-on
option when buying the board itself from Allnet. I guess I'll include
slightly adjusted PWM values in the rk3588-rock-5b.dts patch to better
represent my fan's "preferred" range (in my experience a PWM value of
around 120 is the reliable lower end - it would continue spinning
below that point but won't always start without being pushed manually)

> > I don't currently use the GPU/NPU/VPU though - maybe those would
> > produce more moderate load which could benefit from spinning the fan
> > at medium speeds.
>
> Perhaps, but it will need to be tested at some point.  Have you tried
> loading only one or two CPU cores?

I do see the full range of PWM values being used, including
intermediate ones. It doesn't go zero to hero :) My point was more
about the default fan not being super mighty vs. the full package
thermal output, which will likely mean that intermediate values are
rarely used. But I'll double check with more varied loads to make sure
it behaves in a sensible way (especially given that I'll be testing
purely interrupt-driven operation per Daniel's guidance in the other
sub-thread).

Best regards,
Alexey
Dragan Simic Jan. 22, 2024, 5:33 p.m. UTC | #11 
On 2024-01-22 15:20, Alexey Charkov wrote:
> On Mon, Jan 22, 2024 at 11:57 AM Dragan Simic <dsimic@manjaro.org> 
> wrote:
>> On 2024-01-22 08:36, Alexey Charkov wrote:
>> > On Mon, Jan 22, 2024 at 10:22 AM Dragan Simic <dsimic@manjaro.org> wrote:
>> >> As a suggestion, it would be good to test with a couple of different
>> >> fans, to make sure that the PWM values work well for more that one fan
>> >> model.  The Rock 5B requires a 5 V fan, if I'm not mistaken?
>> >
>> > It is 5V, yes. I only have one fan to try though, and I simply relied
>> > on the PWM values that are already defined in the upstream
>> > rk3588-rock-5b.dts. They don't look ideal for my particular fan,
>> > because the lowest non-zero cooling state currently uses a PWM value
>> > of 95, which doesn't always make it spin up. But in the end it doesn't
>> > seem to matter that much, because that tiny fan needs to spin at full
>> > 255 whenever all eight cores are loaded (and even then it can only
>> > balance the temperature at around 60.5С), and when the load is lighter
>> > (such as during various ./configure runs) it just switches off
>> > completely as the temperature goes down to 46C even with the fan not
>> > spinning.
>> 
>> I see, 5 V fans unfortunately aren't very common.  I'm not sure why
>> Radxa opted for 5 V there;  maybe the goal was to use Raspberry Pi 5 V
>> fans, but using those tiny fans doesn't make much sense, IMHO.
>> 
>> I think you can freely adjust the PWM values a bit to make your fan
>> start reliably at the lowest state, regardless of how rarely that 
>> state
>> will be used.  See, if your fan doesn't spin up reliably with the 
>> current
>> lowest state, chances for other fan models not to spin up are quite
>> high.  IOW, it's better to play safe there, if you agree.
>> 
>> What kind of heatsink are you using with your Rock 5B?  Ah yes, and
>> what's the actual model of the fan you're using?
> 
> I use Radxa's 4012 heatsink-fan assembly that comes as an add-on
> option when buying the board itself from Allnet. I guess I'll include
> slightly adjusted PWM values in the rk3588-rock-5b.dts patch to better
> represent my fan's "preferred" range (in my experience a PWM value of
> around 120 is the reliable lower end - it would continue spinning
> below that point but won't always start without being pushed manually)

Sure, just go ahead.  You're using an official active cooling solution
for the Rock 5B, so adjusting the PWM values a bit to make the fan start
up reliably is even more warranted.

>> > I don't currently use the GPU/NPU/VPU though - maybe those would
>> > produce more moderate load which could benefit from spinning the fan
>> > at medium speeds.
>> 
>> Perhaps, but it will need to be tested at some point.  Have you tried
>> loading only one or two CPU cores?
> 
> I do see the full range of PWM values being used, including
> intermediate ones. It doesn't go zero to hero :) My point was more
> about the default fan not being super mighty vs. the full package
> thermal output, which will likely mean that intermediate values are
> rarely used. But I'll double check with more varied loads to make sure
> it behaves in a sensible way (especially given that I'll be testing
> purely interrupt-driven operation per Daniel's guidance in the other
> sub-thread).

I see, thanks for the clarification. :)  The 4012 fan and heatsink seem
rather tiny; [1]  a more beefy assembly, with more thermal mass, larger
fin surface and a fan that pushes a bit more air across its RPM range,
would probably result in a noticeably broader use of the intermediate
PWM values.

[1] 
https://shop.allnetchina.cn/products/active-heat-sink-for-visionfive-sbc
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
index a5a104131403..f9d540000de3 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
@@ -772,3 +772,7 @@  &usb_host1_ehci {
 &usb_host1_ohci {
 	status = "okay";
 };
+
+&tsadc {
+	status = "okay";
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
index 8aa0499f9b03..8235991e3112 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
@@ -10,6 +10,7 @@ 
 #include <dt-bindings/reset/rockchip,rk3588-cru.h>
 #include <dt-bindings/phy/phy.h>
 #include <dt-bindings/ata/ahci.h>
+#include <dt-bindings/thermal/thermal.h>
 
 / {
 	compatible = "rockchip,rk3588";
@@ -2112,6 +2113,148 @@  tsadc: tsadc@fec00000 {
 		status = "disabled";
 	};
 
+	thermal_zones: thermal-zones {
+		soc_thermal: soc-thermal {
+			polling-delay-passive = <20>; /* milliseconds */
+			polling-delay = <1000>; /* milliseconds */
+			sustainable-power = <2100>; /* milliwatts */
+
+			thermal-sensors = <&tsadc 0>;
+			trips {
+				threshold: trip-point-0 {
+					temperature = <75000>;
+					hysteresis = <2000>;
+					type = "passive";
+				};
+				target: trip-point-1 {
+					temperature = <85000>;
+					hysteresis = <2000>;
+					type = "passive";
+				};
+				soc_crit: soc-crit {
+					/* millicelsius */
+					temperature = <115000>;
+					/* millicelsius */
+					hysteresis = <2000>;
+					type = "critical";
+				};
+			};
+			cooling-maps {
+				map0 {
+					trip = <&target>;
+					cooling-device = <&cpu_l0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+					contribution = <1024>;
+				};
+				map1 {
+					trip = <&target>;
+					cooling-device = <&cpu_b0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+					contribution = <1024>;
+				};
+				map2 {
+					trip = <&target>;
+					cooling-device = <&cpu_b2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+					contribution = <1024>;
+				};
+			};
+		};
+
+		bigcore0_thermal: bigcore0-thermal {
+			polling-delay-passive = <20>; /* milliseconds */
+			polling-delay = <1000>; /* milliseconds */
+			thermal-sensors = <&tsadc 1>;
+
+			trips {
+				big0_crit: big0-crit {
+					/* millicelsius */
+					temperature = <115000>;
+					/* millicelsius */
+					hysteresis = <2000>;
+					type = "critical";
+				};
+			};
+		};
+
+		bigcore1_thermal: bigcore1-thermal {
+			polling-delay-passive = <20>; /* milliseconds */
+			polling-delay = <1000>; /* milliseconds */
+			thermal-sensors = <&tsadc 2>;
+
+			trips {
+				big1_crit: big1-crit {
+					/* millicelsius */
+					temperature = <115000>;
+					/* millicelsius */
+					hysteresis = <2000>;
+					type = "critical";
+				};
+			};
+		};
+
+		little_core_thermal: littlecore-thermal {
+			polling-delay-passive = <20>; /* milliseconds */
+			polling-delay = <1000>; /* milliseconds */
+			thermal-sensors = <&tsadc 3>;
+
+			trips {
+				little_crit: little-crit {
+					/* millicelsius */
+					temperature = <115000>;
+					/* millicelsius */
+					hysteresis = <2000>;
+					type = "critical";
+				};
+			};
+		};
+
+		center_thermal: center-thermal {
+			polling-delay-passive = <20>; /* milliseconds */
+			polling-delay = <1000>; /* milliseconds */
+			thermal-sensors = <&tsadc 4>;
+
+			trips {
+				center_crit: center-crit {
+					/* millicelsius */
+					temperature = <115000>;
+					/* millicelsius */
+					hysteresis = <2000>;
+					type = "critical";
+				};
+			};
+		};
+
+		gpu_thermal: gpu-thermal {
+			polling-delay-passive = <20>; /* milliseconds */
+			polling-delay = <1000>; /* milliseconds */
+			thermal-sensors = <&tsadc 5>;
+
+			trips {
+				gpu_crit: gpu-crit {
+					/* millicelsius */
+					temperature = <115000>;
+					/* millicelsius */
+					hysteresis = <2000>;
+					type = "critical";
+				};
+			};
+		};
+
+		npu_thermal: npu-thermal {
+			polling-delay-passive = <20>; /* milliseconds */
+			polling-delay = <1000>; /* milliseconds */
+			thermal-sensors = <&tsadc 6>;
+
+			trips {
+				npu_crit: npu-crit {
+					/* millicelsius */
+					temperature = <115000>;
+					/* millicelsius */
+					hysteresis = <2000>;
+					type = "critical";
+				};
+			};
+		};
+	};
+
 	saradc: adc@fec10000 {
 		compatible = "rockchip,rk3588-saradc";
 		reg = <0x0 0xfec10000 0x0 0x10000>;