Message ID | 20240110094338.472304-1-alexander.stein@ew.tq-group.com |
---|---|
State | New |
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[139.178.88.99]) by mx.google.com with ESMTPS id gx1-20020a056a001e0100b006d9a094cf29si3208208pfb.160.2024.01.10.01.44.02 for <ouuuleilei@gmail.com> (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Jan 2024 01:44:02 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-21903-ouuuleilei=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) client-ip=139.178.88.99; Authentication-Results: mx.google.com; dkim=pass header.i=@tq-group.com header.s=key1 header.b=FIfjWd4w; spf=pass (google.com: domain of linux-kernel+bounces-21903-ouuuleilei=gmail.com@vger.kernel.org designates 139.178.88.99 as permitted sender) smtp.mailfrom="linux-kernel+bounces-21903-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=tq-group.com Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by sv.mirrors.kernel.org (Postfix) with ESMTPS id 448302886CC for <ouuuleilei@gmail.com>; Wed, 10 Jan 2024 09:44:02 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id E46393F8C4; Wed, 10 Jan 2024 09:43:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=tq-group.com header.i=@tq-group.com header.b="FIfjWd4w" Received: from mx1.tq-group.com (mx1.tq-group.com [93.104.207.81]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CF2C93EA73; Wed, 10 Jan 2024 09:43:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ew.tq-group.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ew.tq-group.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tq-group.com; i=@tq-group.com; q=dns/txt; s=key1; t=1704879824; x=1736415824; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=Oe+RPWEWGt5ubRnnGnoeB42BPxrjzjK1FGQalske8Mk=; b=FIfjWd4wDE1owmq4aSP60pQllYAA1gZ0VBycC3AGiZgy932SnG3mClzp 2ay56FMEvZs/Q8+i8RLpBGf3UyvbPd8P5sTpCSQlMR/xX/5csicDzDZ9H kSAafzrtUpsmKY2+0yemUmLYxbxhstXtXNXXnT0QWP2RZ4nLcc/FTuV/Z Igs5RdnCQUIxUpkZDoM8whUkNKhgfAzU8F+G5GwIuM9I+2pOlmQbXRvBJ JBvUs77EBK9wktbJhApfeOUtTfIopPZMHh77AG6YR9fr5UVi4Mc+lqm92 vgH1trFUDd7ZhTjTO0a1hw6jcewZBRaIX17gdsTjro5J1e2oMog9v85v6 A==; X-IronPort-AV: E=Sophos;i="6.04,184,1695679200"; d="scan'208";a="34824491" Received: from vtuxmail01.tq-net.de ([10.115.0.20]) by mx1.tq-group.com with ESMTP; 10 Jan 2024 10:43:41 +0100 Received: from steina-w.tq-net.de (steina-w.tq-net.de [10.123.53.25]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by vtuxmail01.tq-net.de (Postfix) with ESMTPSA id 3BC58280075; Wed, 10 Jan 2024 10:43:41 +0100 (CET) From: Alexander Stein <alexander.stein@ew.tq-group.com> To: Thomas Gleixner <tglx@linutronix.de>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org> Cc: Alexander Stein <alexander.stein@ew.tq-group.com>, Lucas Stach <l.stach@pengutronix.de>, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/1] dt-bindings: interrupt-controller: fsl,irqsteer: Add power-domains Date: Wed, 10 Jan 2024 10:43:38 +0100 Message-Id: <20240110094338.472304-1-alexander.stein@ew.tq-group.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: <linux-kernel.vger.kernel.org> List-Subscribe: <mailto:linux-kernel+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-kernel+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1787696085538307793 X-GMAIL-MSGID: 1787696085538307793 |
Series |
[1/1] dt-bindings: interrupt-controller: fsl,irqsteer: Add power-domains
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Commit Message
Alexander Stein
Jan. 10, 2024, 9:43 a.m. UTC
Some SoC like i.MX8QXP use a power-domain for this IP add it to the
supported proerties. Fixes the dtbs_check warning:
freescale/imx8qxp-tqma8xqp-mba8xx.dtb: irqsteer@56000000: 'power-domains'
does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/interrupt-controller/fsl,irqsteer.yaml#
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
---
Notes:
Please note that both the board dts and the DT node for irqsteer being used,
are still work-in-progress.
.../devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml | 3 +++
1 file changed, 3 insertions(+)
Comments
On Wed, Jan 10, 2024 at 10:43:38AM +0100, Alexander Stein wrote: > Some SoC like i.MX8QXP use a power-domain for this IP add it to the > supported proerties. Fixes the dtbs_check warning: > freescale/imx8qxp-tqma8xqp-mba8xx.dtb: irqsteer@56000000: 'power-domains' > does not match any of the regexes: 'pinctrl-[0-9]+' > from schema $id: http://devicetree.org/schemas/interrupt-controller/fsl,irqsteer.yaml# > > Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> > --- > > Notes: > Please note that both the board dts and the DT node for irqsteer being used, > are still work-in-progress. The binding doesn't even support the imx8qxp's irqsteer yet, I think this should be added alongside support for that SoC. Am I missing something? Cheers, Conor. > > .../devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml b/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml > index 20ad4ad82ad64..cb4fcd23627f6 100644 > --- a/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml > +++ b/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml > @@ -42,6 +42,9 @@ properties: > clock-names: > const: ipg > > + power-domains: > + maxItems: 1 > + > interrupt-controller: true > > "#interrupt-cells": > -- > 2.34.1 >
Hi Conor, Am Mittwoch, 10. Januar 2024, 17:09:07 CET schrieb Conor Dooley: > On Wed, Jan 10, 2024 at 10:43:38AM +0100, Alexander Stein wrote: > > Some SoC like i.MX8QXP use a power-domain for this IP add it to the > > supported proerties. Fixes the dtbs_check warning: > > freescale/imx8qxp-tqma8xqp-mba8xx.dtb: irqsteer@56000000: 'power-domains' > > > > does not match any of the regexes: 'pinctrl-[0-9]+' > > > > from schema $id: > > http://devicetree.org/schemas/interrupt-controller/fsl,irqsteer.yaml# > > > > Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> > > --- > > > > Notes: > > Please note that both the board dts and the DT node for irqsteer being > > used, are still work-in-progress. > > The binding doesn't even support the imx8qxp's irqsteer yet, I think > this should be added alongside support for that SoC. Am I missing > something? I'm not sure if any additional SoC support is actually needed. 'fsl,imx- irqsteer' is available and that's what I use in my WiP. Also imx8mp also just uses the generic compatible. Only imx8mq uses 'fsl,imx8m-irqsteer'. AFAICS the bindings support the different amount of IRQs already. Best regards, Alexander > > > .../devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml | 3 +++ > > 1 file changed, 3 insertions(+) > > > > diff --git > > a/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yam > > l > > b/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yam > > l index 20ad4ad82ad64..cb4fcd23627f6 100644 > > --- > > a/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yam > > l +++ > > b/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yam > > l> > > @@ -42,6 +42,9 @@ properties: > > clock-names: > > const: ipg > > > > + power-domains: > > + maxItems: 1 > > + > > > > interrupt-controller: true > > > > "#interrupt-cells":
On Thu, Jan 11, 2024 at 09:59:54AM +0100, Alexander Stein wrote: > Hi Conor, > > Am Mittwoch, 10. Januar 2024, 17:09:07 CET schrieb Conor Dooley: > > On Wed, Jan 10, 2024 at 10:43:38AM +0100, Alexander Stein wrote: > > > Some SoC like i.MX8QXP use a power-domain for this IP add it to the > > > supported proerties. Fixes the dtbs_check warning: > > > freescale/imx8qxp-tqma8xqp-mba8xx.dtb: irqsteer@56000000: 'power-domains' > > > > > > does not match any of the regexes: 'pinctrl-[0-9]+' > > > > > > from schema $id: > > > http://devicetree.org/schemas/interrupt-controller/fsl,irqsteer.yaml# > > > > > > Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> > > > --- > > > > > > Notes: > > > Please note that both the board dts and the DT node for irqsteer being > > > used, are still work-in-progress. > > > > The binding doesn't even support the imx8qxp's irqsteer yet, I think > > this should be added alongside support for that SoC. Am I missing > > something? > > I'm not sure if any additional SoC support is actually needed. 'fsl,imx- > irqsteer' is available and that's what I use in my WiP. Also imx8mp also just > uses the generic compatible. Only imx8mq uses 'fsl,imx8m-irqsteer'. Why doesn't it used "imx8mq-irqsteer"? Should it not have its own soc-specific compatible? Cheers, Conor. > AFAICS the bindings support the different amount of IRQs already. > > Best regards, > Alexander > > > > > > .../devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml | 3 +++ > > > 1 file changed, 3 insertions(+) > > > > > > diff --git > > > a/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yam > > > l > > > b/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yam > > > l index 20ad4ad82ad64..cb4fcd23627f6 100644 > > > --- > > > a/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yam > > > l +++ > > > b/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yam > > > l> > > > @@ -42,6 +42,9 @@ properties: > > > clock-names: > > > const: ipg > > > > > > + power-domains: > > > + maxItems: 1 > > > + > > > > > > interrupt-controller: true > > > > > > "#interrupt-cells": > > > -- > TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany > Amtsgericht München, HRB 105018 > Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider > http://www.tq-group.com/ > >
Hi Conor, Am Donnerstag, 11. Januar 2024, 17:49:03 CET schrieb Conor Dooley: > On Thu, Jan 11, 2024 at 09:59:54AM +0100, Alexander Stein wrote: > > Hi Conor, > > > > Am Mittwoch, 10. Januar 2024, 17:09:07 CET schrieb Conor Dooley: > > > On Wed, Jan 10, 2024 at 10:43:38AM +0100, Alexander Stein wrote: > > > > Some SoC like i.MX8QXP use a power-domain for this IP add it to the > > > > supported proerties. Fixes the dtbs_check warning: > > > > freescale/imx8qxp-tqma8xqp-mba8xx.dtb: irqsteer@56000000: > > > > 'power-domains' > > > > > > > > does not match any of the regexes: 'pinctrl-[0-9]+' > > > > > > > > from schema $id: > > > > http://devicetree.org/schemas/interrupt-controller/fsl,irqsteer.yaml# > > > > > > > > Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> > > > > --- > > > > > > > > Notes: > > > > Please note that both the board dts and the DT node for irqsteer > > > > being > > > > used, are still work-in-progress. > > > > > > The binding doesn't even support the imx8qxp's irqsteer yet, I think > > > this should be added alongside support for that SoC. Am I missing > > > something? > > > > I'm not sure if any additional SoC support is actually needed. 'fsl,imx- > > irqsteer' is available and that's what I use in my WiP. Also imx8mp also > > just uses the generic compatible. Only imx8mq uses 'fsl,imx8m-irqsteer'. > Why doesn't it used "imx8mq-irqsteer"? Should it not have its own > soc-specific compatible? I would assume that "fsl,imx8m-irqsteer" is for the whole i.MX8M family. I don't think a soc-specific compatible is needed at all. On top I can't see any difference between i.MX8M and i.MX8/i.MX8X. If a soc-specific compatible is preferred, fine by me. But I don't expect any difference despite imx8qxp/imx8qm requiring a power-domain. Best regards, Alexander > Cheers, > Conor. > > > AFAICS the bindings support the different amount of IRQs already. > > > > Best regards, > > Alexander > > > > > > .../devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml | 3 > > > > +++ > > > > 1 file changed, 3 insertions(+) > > > > > > > > diff --git > > > > a/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer. > > > > yam > > > > l > > > > b/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer. > > > > yam > > > > l index 20ad4ad82ad64..cb4fcd23627f6 100644 > > > > --- > > > > a/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer. > > > > yam > > > > l +++ > > > > b/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer. > > > > yam > > > > l> > > > > > > > > @@ -42,6 +42,9 @@ properties: > > > > clock-names: > > > > const: ipg > > > > > > > > + power-domains: > > > > + maxItems: 1 > > > > + > > > > > > > > interrupt-controller: true > > > > > > > > "#interrupt-cells":
On Wed, Jan 17, 2024 at 08:31:26AM +0100, Alexander Stein wrote: > Hi Conor, > > Am Donnerstag, 11. Januar 2024, 17:49:03 CET schrieb Conor Dooley: > > On Thu, Jan 11, 2024 at 09:59:54AM +0100, Alexander Stein wrote: > > > Hi Conor, > > > > > > Am Mittwoch, 10. Januar 2024, 17:09:07 CET schrieb Conor Dooley: > > > > On Wed, Jan 10, 2024 at 10:43:38AM +0100, Alexander Stein wrote: > > > > > Some SoC like i.MX8QXP use a power-domain for this IP add it to the > > > > > supported proerties. Fixes the dtbs_check warning: > > > > > freescale/imx8qxp-tqma8xqp-mba8xx.dtb: irqsteer@56000000: > > > > > 'power-domains' > > > > > > > > > > does not match any of the regexes: 'pinctrl-[0-9]+' > > > > > > > > > > from schema $id: > > > > > http://devicetree.org/schemas/interrupt-controller/fsl,irqsteer.yaml# > > > > > > > > > > Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> > > > > > --- > > > > > > > > > > Notes: > > > > > Please note that both the board dts and the DT node for irqsteer > > > > > being > > > > > used, are still work-in-progress. > > > > > > > > The binding doesn't even support the imx8qxp's irqsteer yet, I think > > > > this should be added alongside support for that SoC. Am I missing > > > > something? > > > > > > I'm not sure if any additional SoC support is actually needed. 'fsl,imx- > > > irqsteer' is available and that's what I use in my WiP. Also imx8mp also > > > just uses the generic compatible. Only imx8mq uses 'fsl,imx8m-irqsteer'. > > Why doesn't it used "imx8mq-irqsteer"? Should it not have its own > > soc-specific compatible? > > I would assume that "fsl,imx8m-irqsteer" is for the whole i.MX8M family. I > don't think a soc-specific compatible is needed at all. On top I can't see any > difference between i.MX8M and i.MX8/i.MX8X. > If a soc-specific compatible is preferred, fine by me. But I don't expect any > difference despite imx8qxp/imx8qm requiring a power-domain. Specific imx8mq compatibles exist for a wide range of peripherals, I'm not sure why the irqsteer would be an exception. Cheers, Conor.
diff --git a/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml b/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml index 20ad4ad82ad64..cb4fcd23627f6 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml @@ -42,6 +42,9 @@ properties: clock-names: const: ipg + power-domains: + maxItems: 1 + interrupt-controller: true "#interrupt-cells":