[1/1] arm64: dts: qcom: ipq6018: enable sdhci node

Message ID 20240107122822.21667-1-amadeus@jmu.edu.cn
State New
Headers
Series [1/1] arm64: dts: qcom: ipq6018: enable sdhci node |

Commit Message

Chukun Pan Jan. 7, 2024, 12:28 p.m. UTC
  Enable mmc device found on ipq6018 devices.
This node supports both eMMC and SD cards.

Tested with:
  eMMC (HS200)
  SD Card (SDR50/SDR104)

Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
---
 arch/arm64/boot/dts/qcom/ipq6018.dtsi | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)
  

Comments

Robert Marko Jan. 9, 2024, 10:17 a.m. UTC | #1
On 07. 01. 2024. 13:28, Chukun Pan wrote:
> Enable mmc device found on ipq6018 devices.
> This node supports both eMMC and SD cards.
>
> Tested with:
>    eMMC (HS200)
>    SD Card (SDR50/SDR104)
>
> Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
L2 LDO should be used as VQMMC supply, otherwise you cannot change 
between 3 and 1.8V.

Regards,
Robert
> ---
>   arch/arm64/boot/dts/qcom/ipq6018.dtsi | 22 ++++++++++++++++++++++
>   1 file changed, 22 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
> index 5e1277fea725..39fb38914a1e 100644
> --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
> +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
> @@ -436,6 +436,28 @@ dwc_1: usb@7000000 {
>   			};
>   		};
>   
> +		sdhc: mmc@7804000 {
> +			compatible = "qcom,ipq6018-sdhci", "qcom,sdhci-msm-v5";
> +			reg = <0x0 0x7804000 0x0 0x1000>,
> +			      <0x0 0x7805000 0x0 0x1000>;
> +			reg-names = "hc", "cqhci";
> +
> +			interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
> +				     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-names = "hc_irq", "pwr_irq";
> +
> +			clocks = <&gcc GCC_SDCC1_AHB_CLK>,
> +				 <&gcc GCC_SDCC1_APPS_CLK>,
> +				 <&xo>;
> +			clock-names = "iface", "core", "xo";
> +			resets = <&gcc GCC_SDCC1_BCR>;
> +			max-frequency = <192000000>;
> +			mmc-ddr-1_8v;
> +			mmc-hs200-1_8v;
> +
> +			status = "disabled";
> +		};
> +
>   		blsp_dma: dma-controller@7884000 {
>   			compatible = "qcom,bam-v1.7.0";
>   			reg = <0x0 0x07884000 0x0 0x2b000>;
  
Chukun Pan Jan. 10, 2024, 2:30 a.m. UTC | #2
Hi, Robert
> L2 LDO should be used as VQMMC supply, otherwise you cannot change 
> between 3 and 1.8V.

Some ipq6000 devices do not have pmic chips, resulting in l2 being
unavailable. So vqmmc-supply should be configured in the dts of the
device.

Thanks,
Chukun
  
Robert Marko Jan. 10, 2024, 8:29 a.m. UTC | #3
On Wed, 10 Jan 2024 at 03:31, Chukun Pan <amadeus@jmu.edu.cn> wrote:
>
> Hi, Robert
> > L2 LDO should be used as VQMMC supply, otherwise you cannot change
> > between 3 and 1.8V.
>
> Some ipq6000 devices do not have pmic chips, resulting in l2 being
> unavailable. So vqmmc-supply should be configured in the dts of the
> device.

Yes, but you need to at least register it in the RPM regulator node so
that they can easily reference it in the device DTS.

Regards,
Robert
>
> Thanks,
> Chukun
>
> --
> 2.25.1
>
  

Patch

diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
index 5e1277fea725..39fb38914a1e 100644
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
@@ -436,6 +436,28 @@  dwc_1: usb@7000000 {
 			};
 		};
 
+		sdhc: mmc@7804000 {
+			compatible = "qcom,ipq6018-sdhci", "qcom,sdhci-msm-v5";
+			reg = <0x0 0x7804000 0x0 0x1000>,
+			      <0x0 0x7805000 0x0 0x1000>;
+			reg-names = "hc", "cqhci";
+
+			interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "hc_irq", "pwr_irq";
+
+			clocks = <&gcc GCC_SDCC1_AHB_CLK>,
+				 <&gcc GCC_SDCC1_APPS_CLK>,
+				 <&xo>;
+			clock-names = "iface", "core", "xo";
+			resets = <&gcc GCC_SDCC1_BCR>;
+			max-frequency = <192000000>;
+			mmc-ddr-1_8v;
+			mmc-hs200-1_8v;
+
+			status = "disabled";
+		};
+
 		blsp_dma: dma-controller@7884000 {
 			compatible = "qcom,bam-v1.7.0";
 			reg = <0x0 0x07884000 0x0 0x2b000>;