[V5,9/9] Support APX JMPABS for disassembler
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Commit Message
From: "Hu, Lin1" <lin1.hu@intel.com>
gas/ChangeLog:
* testsuite/gas/i386/x86-64.exp: Ditto.
* testsuite/gas/i386/x86-64-apx-jmpabs-intel.d: Ditto.
* testsuite/gas/i386/x86-64-apx-jmpabs-inval.d: Ditto.
* testsuite/gas/i386/x86-64-apx-jmpabs-inval.s: Ditto.
* testsuite/gas/i386/x86-64-apx-jmpabs.d: Ditto.
* testsuite/gas/i386/x86-64-apx-jmpabs.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (JMPABS_Fixup): New Fixup function to disassemble jmpabs.
(print_insn): Add #UD exception for jmpabs.
(dis386): Modify a1 unit for support jmpabs.
* i386-mnem.h: Regenerated.
* i386-opc.tbl: New insns.
* i386-tbl.h: Regenerated.
---
.../gas/i386/x86-64-apx-jmpabs-intel.d | 12 ++++++
.../gas/i386/x86-64-apx-jmpabs-inval.d | 40 +++++++++++++++++++
.../gas/i386/x86-64-apx-jmpabs-inval.s | 15 +++++++
gas/testsuite/gas/i386/x86-64-apx-jmpabs.d | 12 ++++++
gas/testsuite/gas/i386/x86-64-apx-jmpabs.s | 5 +++
gas/testsuite/gas/i386/x86-64.exp | 3 ++
opcodes/i386-dis.c | 37 ++++++++++++++++-
7 files changed, 122 insertions(+), 2 deletions(-)
create mode 100644 gas/testsuite/gas/i386/x86-64-apx-jmpabs-intel.d
create mode 100644 gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.d
create mode 100644 gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.s
create mode 100644 gas/testsuite/gas/i386/x86-64-apx-jmpabs.d
create mode 100644 gas/testsuite/gas/i386/x86-64-apx-jmpabs.s
Comments
On Thu, Dec 28, 2023 at 01:27:14AM +0000, Cui, Lili wrote:
> From: "Hu, Lin1" <lin1.hu@intel.com>
>
> gas/ChangeLog:
>
> * testsuite/gas/i386/x86-64.exp: Ditto.
> * testsuite/gas/i386/x86-64-apx-jmpabs-intel.d: Ditto.
> * testsuite/gas/i386/x86-64-apx-jmpabs-inval.d: Ditto.
> * testsuite/gas/i386/x86-64-apx-jmpabs-inval.s: Ditto.
> * testsuite/gas/i386/x86-64-apx-jmpabs.d: Ditto.
> * testsuite/gas/i386/x86-64-apx-jmpabs.s: Ditto.
>
> opcodes/ChangeLog:
>
> * i386-dis.c (JMPABS_Fixup): New Fixup function to disassemble jmpabs.
> (print_insn): Add #UD exception for jmpabs.
> (dis386): Modify a1 unit for support jmpabs.
> * i386-mnem.h: Regenerated.
> * i386-opc.tbl: New insns.
> * i386-tbl.h: Regenerated.
> ---
> .../gas/i386/x86-64-apx-jmpabs-intel.d | 12 ++++++
> .../gas/i386/x86-64-apx-jmpabs-inval.d | 40 +++++++++++++++++++
> .../gas/i386/x86-64-apx-jmpabs-inval.s | 15 +++++++
> gas/testsuite/gas/i386/x86-64-apx-jmpabs.d | 12 ++++++
> gas/testsuite/gas/i386/x86-64-apx-jmpabs.s | 5 +++
> gas/testsuite/gas/i386/x86-64.exp | 3 ++
> opcodes/i386-dis.c | 37 ++++++++++++++++-
> 7 files changed, 122 insertions(+), 2 deletions(-)
> create mode 100644 gas/testsuite/gas/i386/x86-64-apx-jmpabs-intel.d
> create mode 100644 gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.d
> create mode 100644 gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.s
> create mode 100644 gas/testsuite/gas/i386/x86-64-apx-jmpabs.d
> create mode 100644 gas/testsuite/gas/i386/x86-64-apx-jmpabs.s
>
> diff --git a/gas/testsuite/gas/i386/x86-64-apx-jmpabs-intel.d b/gas/testsuite/gas/i386/x86-64-apx-jmpabs-intel.d
> new file mode 100644
> index 00000000000..2b87f95532f
> --- /dev/null
> +++ b/gas/testsuite/gas/i386/x86-64-apx-jmpabs-intel.d
> @@ -0,0 +1,12 @@
> +#as:
> +#objdump: -dw -Mintel
> +#name: x86_64 APX_F JMPABS insns (Intel disassembly)
> +#source: x86-64-apx-jmpabs.s
> +
> +.*: +file format .*
> +
> +Disassembly of section \.text:
> +
> +0+ <_start>:
> +\s*[a-f0-9]+:\s*d5 00 a1 02 00 00 00 00 00 00 00[ ]+jmpabs 0x2
> +#pass
> diff --git a/gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.d b/gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.d
> new file mode 100644
> index 00000000000..86f313f0873
> --- /dev/null
> +++ b/gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.d
> @@ -0,0 +1,40 @@
> +#as: --64
> +#objdump: -dw
> +#name: illegal decoding of APX_F jmpabs insns
> +#source: x86-64-apx-jmpabs-inval.s
> +
> +.*: +file format .*
> +
> +Disassembly of section \.text:
> +
> +0+ <.text>:
> +\s*[a-f0-9]+: 66 d5 00 a1[ ]+\(bad\)
> +\s*[a-f0-9]+: 01 00[ ]+add %eax,\(%rax\)
> +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> +\s*[a-f0-9]+: 67 d5 00 a1[ ]+\(bad\)
> +\s*[a-f0-9]+: 01 00[ ]+add %eax,\(%rax\)
> +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> +\s*[a-f0-9]+: f2 d5 00 a1[ ]+\(bad\)
> +\s*[a-f0-9]+: 01 00[ ]+add %eax,\(%rax\)
> +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> +\s*[a-f0-9]+: f3 d5 00 a1[ ]+\(bad\)
> +\s*[a-f0-9]+: 01 00[ ]+add %eax,\(%rax\)
> +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> +\s*[a-f0-9]+: f0 d5 00 a1[ ]+\(bad\)
> +\s*[a-f0-9]+: 01 00[ ]+add %eax,\(%rax\)
> +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> +\s*[a-f0-9]+: d5 08 a1[ ]+\(bad\)
> +\s*[a-f0-9]+: 01 00[ ]+add %eax,\(%rax\)
> +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> +\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
> +#pass
> diff --git a/gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.s b/gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.s
> new file mode 100644
> index 00000000000..de4440a5466
> --- /dev/null
> +++ b/gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.s
> @@ -0,0 +1,15 @@
> +# Check bytecode of APX_F jmpabs instructions with illegal encode.
> +
> + .text
> +# With 66 prefix
> + .byte 0x66,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
> +# With 67 prefix
> + .byte 0x67,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
> +# With F2 prefix
> + .byte 0xf2,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
> +# With F3 prefix
> + .byte 0xf3,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
> +# With LOCK prefix
> + .byte 0xf0,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
> +# REX2.M0 = 0 REX2.W = 1
> + .byte 0xd5,0x08,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
> diff --git a/gas/testsuite/gas/i386/x86-64-apx-jmpabs.d b/gas/testsuite/gas/i386/x86-64-apx-jmpabs.d
> new file mode 100644
> index 00000000000..e95b54f5dab
> --- /dev/null
> +++ b/gas/testsuite/gas/i386/x86-64-apx-jmpabs.d
> @@ -0,0 +1,12 @@
> +#as:
> +#objdump: -dw
> +#name: x86_64 APX_F JMPABS insns
> +#source: x86-64-apx-jmpabs.s
> +
> +.*: +file format .*
> +
> +Disassembly of section \.text:
> +
> +0+ <_start>:
> +\s*[a-f0-9]+:\s*d5 00 a1 02 00 00 00 00 00 00 00[ ]+jmpabs \$0x2
> +#pass
> diff --git a/gas/testsuite/gas/i386/x86-64-apx-jmpabs.s b/gas/testsuite/gas/i386/x86-64-apx-jmpabs.s
> new file mode 100644
> index 00000000000..69ffb763260
> --- /dev/null
> +++ b/gas/testsuite/gas/i386/x86-64-apx-jmpabs.s
> @@ -0,0 +1,5 @@
> +# Check 64bit APX_F JMPABS instructions
> +
> + .text
> + _start:
> + .byte 0xd5,0x00,0xa1,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00
> diff --git a/gas/testsuite/gas/i386/x86-64.exp b/gas/testsuite/gas/i386/x86-64.exp
> index 2ba4c49417a..fa6a1c3c945 100644
> --- a/gas/testsuite/gas/i386/x86-64.exp
> +++ b/gas/testsuite/gas/i386/x86-64.exp
> @@ -377,6 +377,9 @@ run_dump_test "x86-64-apx-evex-promoted"
> run_dump_test "x86-64-apx-evex-promoted-intel"
> run_dump_test "x86-64-apx-evex-egpr"
> run_dump_test "x86-64-apx-ndd"
> +run_dump_test "x86-64-apx-jmpabs"
> +run_dump_test "x86-64-apx-jmpabs-intel"
> +run_dump_test "x86-64-apx-jmpabs-inval"
> run_dump_test "x86-64-avx512f-rcigrz-intel"
> run_dump_test "x86-64-avx512f-rcigrz"
> run_dump_test "x86-64-clwb"
> diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
> index e851fb376d9..b6d7e089823 100644
> --- a/opcodes/i386-dis.c
> +++ b/opcodes/i386-dis.c
> @@ -106,6 +106,7 @@ static bool MOVSXD_Fixup (instr_info *, int, int);
> static bool DistinctDest_Fixup (instr_info *, int, int);
> static bool PREFETCHI_Fixup (instr_info *, int, int);
> static bool PUSH2_POP2_Fixup (instr_info *, int, int);
> +static bool JMPABS_Fixup (instr_info *, int, int);
>
> static void ATTRIBUTE_PRINTF_3 i386_dis_printf (const disassemble_info *,
> enum disassembler_style,
> @@ -2018,7 +2019,7 @@ static const struct dis386 dis386[] = {
> { "lahf", { XX }, 0 },
> /* a0 */
> { "mov%LB", { AL, Ob }, PREFIX_REX2_ILLEGAL },
> - { "mov%LS", { eAX, Ov }, PREFIX_REX2_ILLEGAL },
> + { "mov%LS", { { JMPABS_Fixup, eAX_reg }, { JMPABS_Fixup, v_mode } }, PREFIX_REX2_ILLEGAL },
> { "mov%LB", { Ob, AL }, PREFIX_REX2_ILLEGAL },
> { "mov%LS", { Ov, eAX }, PREFIX_REX2_ILLEGAL },
> { "movs{b|}", { Ybr, Xb }, PREFIX_REX2_ILLEGAL },
> @@ -9699,7 +9700,7 @@ print_insn (bfd_vma pc, disassemble_info *info, int intel_syntax)
> }
>
> if ((dp->prefix_requirement & PREFIX_REX2_ILLEGAL)
> - && ins.last_rex2_prefix >= 0)
> + && ins.last_rex2_prefix >= 0 && (ins.rex2 & REX2_SPECIAL) == 0)
> {
> i386_dis_printf (info, dis_style_text, "(bad)");
> ret = ins.end_codep - priv.the_buffer;
> @@ -13942,3 +13943,35 @@ PUSH2_POP2_Fixup (instr_info *ins, int bytemode, int sizeflag)
>
> return OP_VEX (ins, bytemode, sizeflag);
> }
> +
> +static bool
> +JMPABS_Fixup (instr_info *ins, int bytemode, int sizeflag)
> +{
> + if (ins->last_rex2_prefix >= 0)
> + {
> + uint64_t op;
> +
> + if ((ins->prefixes & (PREFIX_OPCODE | PREFIX_ADDR | PREFIX_LOCK)) != 0x0
> + || (ins->rex & REX_W) != 0x0)
> + {
> + oappend (ins, "(bad)");
> + return true;
> + }
> +
> + if (bytemode == eAX_reg)
> + return true;
> +
> + if (!get64 (ins, &op))
> + return false;
> +
> + ins->mnemonicendp = stpcpy (ins->obuf, "jmpabs");
> + ins->rex2 |= REX2_SPECIAL;
> + oappend_immediate (ins, op);
> +
> + return true;
> + }
> +
> + if (bytemode == eAX_reg)
> + return OP_IMREG (ins, bytemode, sizeflag);
> + return OP_OFF64 (ins, bytemode, sizeflag);
> +}
> --
> 2.25.1
>
OK.
Thanks.
H.J.
On 28.12.2023 02:27, Cui, Lili wrote:
> --- /dev/null
> +++ b/gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.s
> @@ -0,0 +1,15 @@
> +# Check bytecode of APX_F jmpabs instructions with illegal encode.
> +
> + .text
> +# With 66 prefix
> + .byte 0x66,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
> +# With 67 prefix
> + .byte 0x67,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
> +# With F2 prefix
> + .byte 0xf2,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
> +# With F3 prefix
> + .byte 0xf3,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
> +# With LOCK prefix
> + .byte 0xf0,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
> +# REX2.M0 = 0 REX2.W = 1
> + .byte 0xd5,0x08,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
Considering that I specifically asked that this use .insn, and that I
further took the time to make a patch to make .insn work with {rex2},
I find it rather poor that here and ...
> --- /dev/null
> +++ b/gas/testsuite/gas/i386/x86-64-apx-jmpabs.s
> @@ -0,0 +1,5 @@
> +# Check 64bit APX_F JMPABS instructions
> +
> + .text
> + _start:
> + .byte 0xd5,0x00,0xa1,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00
... here it is still .byte that is being used.
Jan
> -----Original Message-----
> From: Jan Beulich <jbeulich@suse.com>
> Sent: Friday, January 5, 2024 8:09 PM
> To: Cui, Lili <lili.cui@intel.com>
> Cc: Lu, Hongjiu <hongjiu.lu@intel.com>; Hu, Lin1 <lin1.hu@intel.com>;
> binutils@sourceware.org
> Subject: Re: [PATCH V5 9/9] Support APX JMPABS for disassembler
>
> On 28.12.2023 02:27, Cui, Lili wrote:
> > --- /dev/null
> > +++ b/gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.s
> > @@ -0,0 +1,15 @@
> > +# Check bytecode of APX_F jmpabs instructions with illegal encode.
> > +
> > + .text
> > +# With 66 prefix
> > + .byte 0x66,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
> > +# With 67 prefix
> > + .byte 0x67,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
> > +# With F2 prefix
> > + .byte 0xf2,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
> > +# With F3 prefix
> > + .byte 0xf3,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
> > +# With LOCK prefix
> > + .byte 0xf0,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
> > +# REX2.M0 = 0 REX2.W = 1
> > + .byte 0xd5,0x08,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
>
> Considering that I specifically asked that this use .insn, and that I further took
> the time to make a patch to make .insn work with {rex2}, I find it rather poor
> that here and ...
>
> > --- /dev/null
> > +++ b/gas/testsuite/gas/i386/x86-64-apx-jmpabs.s
> > @@ -0,0 +1,5 @@
> > +# Check 64bit APX_F JMPABS instructions
> > +
> > + .text
> > + _start:
> > + .byte 0xd5,0x00,0xa1,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00
>
> ... here it is still .byte that is being used.
>
I'm not always keeping my eye on what patches push in Binutils. We can upstream a new fix patch like this.
.text
# With 66 prefix
- .byte 0x66,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
+ .insn {rex2} data16 0xa1, $1{:u64}
# With 67 prefix
- .byte 0x67,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
+ .insn {rex2} addr32 0xa1, $1{:u64}
# With F2 prefix
- .byte 0xf2,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
+ .insn {rex2} repne 0xa1, $1{:u64}
# With F3 prefix
- .byte 0xf3,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
+ .insn {rex2} rep 0xa1, $1{:u64}
# With LOCK prefix
- .byte 0xf0,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
+ .insn {rex2} lock 0xa1, $1{:u64}
# REX2.M0 = 0 REX2.W = 1
- .byte 0xd5,0x08,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
+ .insn {rex2} 0x08,0xa1, $1{:u64}
+#.byte 0xd5,0x08,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
But the last test " REX2.M0 = 0 REX2.W = 1" is invalid, do you have some advise?
BRs,
Lin
On 08.01.2024 03:32, Hu, Lin1 wrote:
>> -----Original Message-----
>> From: Jan Beulich <jbeulich@suse.com>
>> Sent: Friday, January 5, 2024 8:09 PM
>> To: Cui, Lili <lili.cui@intel.com>
>> Cc: Lu, Hongjiu <hongjiu.lu@intel.com>; Hu, Lin1 <lin1.hu@intel.com>;
>> binutils@sourceware.org
>> Subject: Re: [PATCH V5 9/9] Support APX JMPABS for disassembler
>>
>> On 28.12.2023 02:27, Cui, Lili wrote:
>>> --- /dev/null
>>> +++ b/gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.s
>>> @@ -0,0 +1,15 @@
>>> +# Check bytecode of APX_F jmpabs instructions with illegal encode.
>>> +
>>> + .text
>>> +# With 66 prefix
>>> + .byte 0x66,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
>>> +# With 67 prefix
>>> + .byte 0x67,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
>>> +# With F2 prefix
>>> + .byte 0xf2,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
>>> +# With F3 prefix
>>> + .byte 0xf3,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
>>> +# With LOCK prefix
>>> + .byte 0xf0,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
>>> +# REX2.M0 = 0 REX2.W = 1
>>> + .byte 0xd5,0x08,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
>>
>> Considering that I specifically asked that this use .insn, and that I further took
>> the time to make a patch to make .insn work with {rex2}, I find it rather poor
>> that here and ...
>>
>>> --- /dev/null
>>> +++ b/gas/testsuite/gas/i386/x86-64-apx-jmpabs.s
>>> @@ -0,0 +1,5 @@
>>> +# Check 64bit APX_F JMPABS instructions
>>> +
>>> + .text
>>> + _start:
>>> + .byte 0xd5,0x00,0xa1,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00
>>
>> ... here it is still .byte that is being used.
>>
>
> I'm not always keeping my eye on what patches push in Binutils.
That's not a general requirement of course, but when it specifically is
work done for you, I would have expected it to be recognized and then
leveraged.
> We can upstream a new fix patch like this.
> .text
> # With 66 prefix
> - .byte 0x66,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
> + .insn {rex2} data16 0xa1, $1{:u64}
> # With 67 prefix
> - .byte 0x67,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
> + .insn {rex2} addr32 0xa1, $1{:u64}
> # With F2 prefix
> - .byte 0xf2,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
> + .insn {rex2} repne 0xa1, $1{:u64}
> # With F3 prefix
> - .byte 0xf3,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
> + .insn {rex2} rep 0xa1, $1{:u64}
> # With LOCK prefix
> - .byte 0xf0,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
> + .insn {rex2} lock 0xa1, $1{:u64}
> # REX2.M0 = 0 REX2.W = 1
> - .byte 0xd5,0x08,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
> + .insn {rex2} 0x08,0xa1, $1{:u64}
> +#.byte 0xd5,0x08,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
>
> But the last test " REX2.M0 = 0 REX2.W = 1" is invalid, do you have some advise?
Well, no, as long as {rex2} cannot specify any of the payload bits, and when
there are no operands controlling the individual bit (due to there not being
any register/memory operands), it can't be easily expressed using .insn.
Further work would be required to permit that, but for the time being in
_such_ cases it is (of course) okay to use .byte.
Jan
> -----Original Message-----
> From: Jan Beulich <jbeulich@suse.com>
> Sent: Monday, January 8, 2024 3:41 PM
> To: Hu, Lin1 <lin1.hu@intel.com>
> Cc: Lu, Hongjiu <hongjiu.lu@intel.com>; binutils@sourceware.org; Cui, Lili
> <lili.cui@intel.com>
> Subject: Re: [PATCH V5 9/9] Support APX JMPABS for disassembler
>
> On 08.01.2024 03:32, Hu, Lin1 wrote:
> >> -----Original Message-----
> >> From: Jan Beulich <jbeulich@suse.com>
> >> Sent: Friday, January 5, 2024 8:09 PM
> >> To: Cui, Lili <lili.cui@intel.com>
> >> Cc: Lu, Hongjiu <hongjiu.lu@intel.com>; Hu, Lin1 <lin1.hu@intel.com>;
> >> binutils@sourceware.org
> >> Subject: Re: [PATCH V5 9/9] Support APX JMPABS for disassembler
> >>
> >> On 28.12.2023 02:27, Cui, Lili wrote:
> >>> --- /dev/null
> >>> +++ b/gas/testsuite/gas/i386/x86-64-apx-jmpabs-inval.s
> >>> @@ -0,0 +1,15 @@
> >>> +# Check bytecode of APX_F jmpabs instructions with illegal encode.
> >>> +
> >>> + .text
> >>> +# With 66 prefix
> >>> + .byte 0x66,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
> >>> +# With 67 prefix
> >>> + .byte 0x67,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
> >>> +# With F2 prefix
> >>> + .byte 0xf2,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
> >>> +# With F3 prefix
> >>> + .byte 0xf3,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
> >>> +# With LOCK prefix
> >>> + .byte 0xf0,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
> >>> +# REX2.M0 = 0 REX2.W = 1
> >>> + .byte 0xd5,0x08,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
> >>
> >> Considering that I specifically asked that this use .insn, and that I
> >> further took the time to make a patch to make .insn work with {rex2},
> >> I find it rather poor that here and ...
> >>
> >>> --- /dev/null
> >>> +++ b/gas/testsuite/gas/i386/x86-64-apx-jmpabs.s
> >>> @@ -0,0 +1,5 @@
> >>> +# Check 64bit APX_F JMPABS instructions
> >>> +
> >>> + .text
> >>> + _start:
> >>> + .byte 0xd5,0x00,0xa1,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00
> >>
> >> ... here it is still .byte that is being used.
> >>
> >
> > I'm not always keeping my eye on what patches push in Binutils.
>
> That's not a general requirement of course, but when it specifically is work done
> for you, I would have expected it to be recognized and then leveraged.
>
OK, I will upstream another fix patch.
BRs,
Lin
new file mode 100644
@@ -0,0 +1,12 @@
+#as:
+#objdump: -dw -Mintel
+#name: x86_64 APX_F JMPABS insns (Intel disassembly)
+#source: x86-64-apx-jmpabs.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*d5 00 a1 02 00 00 00 00 00 00 00[ ]+jmpabs 0x2
+#pass
new file mode 100644
@@ -0,0 +1,40 @@
+#as: --64
+#objdump: -dw
+#name: illegal decoding of APX_F jmpabs insns
+#source: x86-64-apx-jmpabs-inval.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <.text>:
+\s*[a-f0-9]+: 66 d5 00 a1[ ]+\(bad\)
+\s*[a-f0-9]+: 01 00[ ]+add %eax,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: 67 d5 00 a1[ ]+\(bad\)
+\s*[a-f0-9]+: 01 00[ ]+add %eax,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: f2 d5 00 a1[ ]+\(bad\)
+\s*[a-f0-9]+: 01 00[ ]+add %eax,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: f3 d5 00 a1[ ]+\(bad\)
+\s*[a-f0-9]+: 01 00[ ]+add %eax,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: f0 d5 00 a1[ ]+\(bad\)
+\s*[a-f0-9]+: 01 00[ ]+add %eax,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: d5 08 a1[ ]+\(bad\)
+\s*[a-f0-9]+: 01 00[ ]+add %eax,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+\s*[a-f0-9]+: 00 00[ ]+add %al,\(%rax\)
+#pass
new file mode 100644
@@ -0,0 +1,15 @@
+# Check bytecode of APX_F jmpabs instructions with illegal encode.
+
+ .text
+# With 66 prefix
+ .byte 0x66,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
+# With 67 prefix
+ .byte 0x67,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
+# With F2 prefix
+ .byte 0xf2,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
+# With F3 prefix
+ .byte 0xf3,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
+# With LOCK prefix
+ .byte 0xf0,0xd5,0x00,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
+# REX2.M0 = 0 REX2.W = 1
+ .byte 0xd5,0x08,0xa1,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00
new file mode 100644
@@ -0,0 +1,12 @@
+#as:
+#objdump: -dw
+#name: x86_64 APX_F JMPABS insns
+#source: x86-64-apx-jmpabs.s
+
+.*: +file format .*
+
+Disassembly of section \.text:
+
+0+ <_start>:
+\s*[a-f0-9]+:\s*d5 00 a1 02 00 00 00 00 00 00 00[ ]+jmpabs \$0x2
+#pass
new file mode 100644
@@ -0,0 +1,5 @@
+# Check 64bit APX_F JMPABS instructions
+
+ .text
+ _start:
+ .byte 0xd5,0x00,0xa1,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00
@@ -377,6 +377,9 @@ run_dump_test "x86-64-apx-evex-promoted"
run_dump_test "x86-64-apx-evex-promoted-intel"
run_dump_test "x86-64-apx-evex-egpr"
run_dump_test "x86-64-apx-ndd"
+run_dump_test "x86-64-apx-jmpabs"
+run_dump_test "x86-64-apx-jmpabs-intel"
+run_dump_test "x86-64-apx-jmpabs-inval"
run_dump_test "x86-64-avx512f-rcigrz-intel"
run_dump_test "x86-64-avx512f-rcigrz"
run_dump_test "x86-64-clwb"
@@ -106,6 +106,7 @@ static bool MOVSXD_Fixup (instr_info *, int, int);
static bool DistinctDest_Fixup (instr_info *, int, int);
static bool PREFETCHI_Fixup (instr_info *, int, int);
static bool PUSH2_POP2_Fixup (instr_info *, int, int);
+static bool JMPABS_Fixup (instr_info *, int, int);
static void ATTRIBUTE_PRINTF_3 i386_dis_printf (const disassemble_info *,
enum disassembler_style,
@@ -2018,7 +2019,7 @@ static const struct dis386 dis386[] = {
{ "lahf", { XX }, 0 },
/* a0 */
{ "mov%LB", { AL, Ob }, PREFIX_REX2_ILLEGAL },
- { "mov%LS", { eAX, Ov }, PREFIX_REX2_ILLEGAL },
+ { "mov%LS", { { JMPABS_Fixup, eAX_reg }, { JMPABS_Fixup, v_mode } }, PREFIX_REX2_ILLEGAL },
{ "mov%LB", { Ob, AL }, PREFIX_REX2_ILLEGAL },
{ "mov%LS", { Ov, eAX }, PREFIX_REX2_ILLEGAL },
{ "movs{b|}", { Ybr, Xb }, PREFIX_REX2_ILLEGAL },
@@ -9699,7 +9700,7 @@ print_insn (bfd_vma pc, disassemble_info *info, int intel_syntax)
}
if ((dp->prefix_requirement & PREFIX_REX2_ILLEGAL)
- && ins.last_rex2_prefix >= 0)
+ && ins.last_rex2_prefix >= 0 && (ins.rex2 & REX2_SPECIAL) == 0)
{
i386_dis_printf (info, dis_style_text, "(bad)");
ret = ins.end_codep - priv.the_buffer;
@@ -13942,3 +13943,35 @@ PUSH2_POP2_Fixup (instr_info *ins, int bytemode, int sizeflag)
return OP_VEX (ins, bytemode, sizeflag);
}
+
+static bool
+JMPABS_Fixup (instr_info *ins, int bytemode, int sizeflag)
+{
+ if (ins->last_rex2_prefix >= 0)
+ {
+ uint64_t op;
+
+ if ((ins->prefixes & (PREFIX_OPCODE | PREFIX_ADDR | PREFIX_LOCK)) != 0x0
+ || (ins->rex & REX_W) != 0x0)
+ {
+ oappend (ins, "(bad)");
+ return true;
+ }
+
+ if (bytemode == eAX_reg)
+ return true;
+
+ if (!get64 (ins, &op))
+ return false;
+
+ ins->mnemonicendp = stpcpy (ins->obuf, "jmpabs");
+ ins->rex2 |= REX2_SPECIAL;
+ oappend_immediate (ins, op);
+
+ return true;
+ }
+
+ if (bytemode == eAX_reg)
+ return OP_IMREG (ins, bytemode, sizeflag);
+ return OP_OFF64 (ins, bytemode, sizeflag);
+}