Message ID | 20231229202959.266502-1-david@ixit.cz |
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State | New |
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[2604:1380:4601:e00::3]) by mx.google.com with ESMTPS id i26-20020a1709061cda00b00a234963fc8csi8179723ejh.691.2023.12.29.12.30.29 for <ouuuleilei@gmail.com> (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Dec 2023 12:30:30 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel+bounces-13227-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) client-ip=2604:1380:4601:e00::3; Authentication-Results: mx.google.com; dkim=pass header.i=@ixit.cz header.s=dkim header.b=1jBzkh8F; spf=pass (google.com: domain of linux-kernel+bounces-13227-ouuuleilei=gmail.com@vger.kernel.org designates 2604:1380:4601:e00::3 as permitted sender) smtp.mailfrom="linux-kernel+bounces-13227-ouuuleilei=gmail.com@vger.kernel.org"; dmarc=pass (p=NONE sp=REJECT dis=NONE) header.from=ixit.cz Received: from smtp.subspace.kernel.org (wormhole.subspace.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by am.mirrors.kernel.org (Postfix) with ESMTPS id C32811F22EB7 for <ouuuleilei@gmail.com>; Fri, 29 Dec 2023 20:30:29 +0000 (UTC) Received: from localhost.localdomain (localhost.localdomain [127.0.0.1]) by smtp.subspace.kernel.org (Postfix) with ESMTP id D61B514AA5; Fri, 29 Dec 2023 20:30:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ixit.cz header.i=@ixit.cz header.b="1jBzkh8F" X-Original-To: linux-kernel@vger.kernel.org Received: from ixit.cz (ip-89-177-23-149.bb.vodafone.cz [89.177.23.149]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3C74E14284; Fri, 29 Dec 2023 20:30:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ixit.cz Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ixit.cz Received: from newone.congress.ccc.de (unknown [151.217.64.190]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ixit.cz (Postfix) with ESMTPSA id 28C53163998; Fri, 29 Dec 2023 21:30:05 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ixit.cz; s=dkim; t=1703881805; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=W1DwKX7Tz/5TTyYVFi24EUOrX90BXUle9nCmdIhFA28=; b=1jBzkh8FP7nsZ3cPYsjY/0y2YREnZN4iHiqoo8Y5ufW5pSzSzwwAl9HBL/OVb/GSzSVOO6 DZ0bMILvFj5eLPZdnfyS4WkAJn6yJddU+dD3vNsrJhck+zcdQZ3GXKNPUAbDWKrd3UafFT LEnPmItUuK9zX8vik66xnDds9P7GUTM= From: David Heidelberg <david@ixit.cz> To: Bjorn Andersson <andersson@kernel.org>, Konrad Dybcio <konrad.dybcio@linaro.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org> Cc: Caleb Connolly <caleb.connolly@linaro.org>, David Heidelberg <david@ixit.cz>, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH] arm64: dts: qcom: sdm845: add power domain to UFS phy interface Date: Fri, 29 Dec 2023 21:29:54 +0100 Message-ID: <20231229202959.266502-1-david@ixit.cz> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: <linux-kernel.vger.kernel.org> List-Subscribe: <mailto:linux-kernel+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-kernel+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1786649594108278667 X-GMAIL-MSGID: 1786649594108278667 |
Series |
arm64: dts: qcom: sdm845: add power domain to UFS phy interface
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Commit Message
David Heidelberg
Dec. 29, 2023, 8:29 p.m. UTC
Reported by: `make CHECK_DTBS=1 qcom/sdm845-oneplus-enchilada.dtb`
Signed-off-by: David Heidelberg <david@ixit.cz>
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 ++
1 file changed, 2 insertions(+)
Comments
On Freitag, 29. Dezember 2023 21:29:54 CET David Heidelberg wrote: > Reported by: `make CHECK_DTBS=1 qcom/sdm845-oneplus-enchilada.dtb` > > Signed-off-by: David Heidelberg <david@ixit.cz> > --- > arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi > b/arch/arm64/boot/dts/qcom/sdm845.dtsi index c2244824355a..ad8677b62bfb > 100644 > --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi > +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi > @@ -2644,6 +2644,8 @@ ufs_mem_phy: phy@1d87000 { > clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>, > <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; > > + power-domains = <&gcc UFS_PHY_GDSC>; > + > resets = <&ufs_mem_hc 0>; > reset-names = "ufsphy"; This is potentially the wrong power domain, see the conversation here: https://lore.kernel.org/linux-arm-msm/20231204172829.GA69580@thinkpad/ Hopefully Mani can give some input here :) Regards Luca
On 29/12/2023 22:37, Luca Weiss wrote: > On Freitag, 29. Dezember 2023 21:29:54 CET David Heidelberg wrote: >> Reported by: `make CHECK_DTBS=1 qcom/sdm845-oneplus-enchilada.dtb` >> >> Signed-off-by: David Heidelberg <david@ixit.cz> >> --- >> arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 ++ >> 1 file changed, 2 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi >> b/arch/arm64/boot/dts/qcom/sdm845.dtsi index c2244824355a..ad8677b62bfb >> 100644 >> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi >> @@ -2644,6 +2644,8 @@ ufs_mem_phy: phy@1d87000 { >> clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>, >> <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; >> >> + power-domains = <&gcc UFS_PHY_GDSC>; >> + >> resets = <&ufs_mem_hc 0>; >> reset-names = "ufsphy"; > This is potentially the wrong power domain, see the conversation here: > https://lore.kernel.org/linux-arm-msm/20231204172829.GA69580@thinkpad/ Thanks, I was thinking about SDM845_MX, but then looked at rest more closer qcom archs and thought it'll be likely GDSC (also by looking at ufs_mem_hc reset vectors). > > Hopefully Mani can give some input here :) > > Regards > Luca > >
Hi David, Did you boot-test this? On 30/12/2023 00:18, David Heidelberg wrote: > On 29/12/2023 22:37, Luca Weiss wrote: > >> On Freitag, 29. Dezember 2023 21:29:54 CET David Heidelberg wrote: >>> Reported by: `make CHECK_DTBS=1 qcom/sdm845-oneplus-enchilada.dtb` >>> >>> Signed-off-by: David Heidelberg <david@ixit.cz> >>> --- >>> arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 ++ >>> 1 file changed, 2 insertions(+) >>> >>> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi >>> b/arch/arm64/boot/dts/qcom/sdm845.dtsi index c2244824355a..ad8677b62bfb >>> 100644 >>> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi >>> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi >>> @@ -2644,6 +2644,8 @@ ufs_mem_phy: phy@1d87000 { >>> clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>, >>> <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; >>> >>> + power-domains = <&gcc UFS_PHY_GDSC>; >>> + >>> resets = <&ufs_mem_hc 0>; >>> reset-names = "ufsphy"; >> This is potentially the wrong power domain, see the conversation here: >> https://lore.kernel.org/linux-arm-msm/20231204172829.GA69580@thinkpad/ > Thanks, I was thinking about SDM845_MX, but then looked at rest more > closer qcom archs and thought it'll be likely GDSC (also by looking at > ufs_mem_hc reset vectors). >> >> Hopefully Mani can give some input here :) >> >> Regards >> Luca >> >>
On Fri, Dec 29, 2023 at 10:37:56PM +0100, Luca Weiss wrote: > On Freitag, 29. Dezember 2023 21:29:54 CET David Heidelberg wrote: > > Reported by: `make CHECK_DTBS=1 qcom/sdm845-oneplus-enchilada.dtb` > > > > Signed-off-by: David Heidelberg <david@ixit.cz> > > --- > > arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 ++ > > 1 file changed, 2 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi > > b/arch/arm64/boot/dts/qcom/sdm845.dtsi index c2244824355a..ad8677b62bfb > > 100644 > > --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi > > +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi > > @@ -2644,6 +2644,8 @@ ufs_mem_phy: phy@1d87000 { > > clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>, > > <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; > > > > + power-domains = <&gcc UFS_PHY_GDSC>; > > + > > resets = <&ufs_mem_hc 0>; > > reset-names = "ufsphy"; > > This is potentially the wrong power domain, see the conversation here: > https://lore.kernel.org/linux-arm-msm/20231204172829.GA69580@thinkpad/ > Yes, GDSCs are the power domain of the controllers, not PHYs. This applies to other peripherals such as USB, PCIe etc... - Mani > Hopefully Mani can give some input here :) > > Regards > Luca > >
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index c2244824355a..ad8677b62bfb 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -2644,6 +2644,8 @@ ufs_mem_phy: phy@1d87000 { clocks = <&gcc GCC_UFS_MEM_CLKREF_CLK>, <&gcc GCC_UFS_PHY_PHY_AUX_CLK>; + power-domains = <&gcc UFS_PHY_GDSC>; + resets = <&ufs_mem_hc 0>; reset-names = "ufsphy";