diff mbox series

[v2,06/22] ARM: dts: samsung: exynos5420: Enable cros-ec-spi as wake source

Message ID 20231220165423.v2.6.I06b059021de1bf6103e60a73211f078f2af75d17@changeid
State New
Headers
Series Improve IRQ wake capability reporting and update the cros_ec driver to use it |

Commit Message

Mark Hasemeyer Dec. 20, 2023, 11:54 p.m. UTC 
  The cros_ec driver currently assumes that cros-ec-spi compatible device
nodes are a wakeup-source even though the wakeup-source property is not
defined.

Add the wakeup-source property to all cros-ec-spi compatible device
nodes to match expected behavior.

Signed-off-by: Mark Hasemeyer <markhas@chromium.org>
---

Changes in v2:
-Split by arch/soc

 arch/arm/boot/dts/samsung/exynos5420-peach-pit.dts | 1 +
 1 file changed, 1 insertion(+)

Comments

Krzysztof Kozlowski Dec. 21, 2023, 8:14 a.m. UTC | #1 
On 21/12/2023 00:54, Mark Hasemeyer wrote:
> The cros_ec driver currently assumes that cros-ec-spi compatible device
> nodes are a wakeup-source even though the wakeup-source property is not
> defined.
> 
> Add the wakeup-source property to all cros-ec-spi compatible device
> nodes to match expected behavior.
> 

You do not need this property, if driver assumes that. Just enable it
unconditionally. I don't think anything from previous discussion was
resolved.

Best regards,
Krzysztof
Mark Hasemeyer Dec. 21, 2023, 6:29 p.m. UTC | #2 
> You do not need this property, if driver assumes that. Just enable it
> unconditionally.

The goal of this patch series is to change exactly that: to prevent
the driver from unconditionally enabling the irq for wake.
The driver works across numerous buses (spi, uart, i2c, lpc) and
supports DT and ACPI.
SPI+DT systems all happen to need irq wake enabled.

> I don't think anything from previous discussion was
> resolved.

Which previous discussion do you mean? In v1 it was suggested to split
up the DTS changes by arch/soc and add a cover letter (which I did).
Wrt to the binding discussion, Sudeep said the new documentation
wording looked good to him [1].

[1]: https://lore.kernel.org/all/ZYAjxxHcCOgDVMTQ@bogus/
Krzysztof Kozlowski Dec. 21, 2023, 6:38 p.m. UTC | #3 
On 21/12/2023 19:29, Mark Hasemeyer wrote:
>> You do not need this property, if driver assumes that. Just enable it
>> unconditionally.
> 
> The goal of this patch series is to change exactly that: to prevent
> the driver from unconditionally enabling the irq for wake.

But why? What is the problem being solved? Is unconditional wakeup in
the driver incorrect? If so, mention it shortly in the commit msg, what
is rationale because existing one does not justify this change.

> The driver works across numerous buses (spi, uart, i2c, lpc) and
> supports DT and ACPI.
> SPI+DT systems all happen to need irq wake enabled.
> 
>> I don't think anything from previous discussion was
>> resolved.
> 
> Which previous discussion do you mean? In v1 it was suggested to split

https://lore.kernel.org/all/20231213221124.GB2115075-robh@kernel.org/


Best regards,
Krzysztof
Mark Hasemeyer Dec. 21, 2023, 7:24 p.m. UTC | #4 
> >> You do not need this property, if driver assumes that. Just enable it
> >> unconditionally.
> >
> > The goal of this patch series is to change exactly that: to prevent
> > the driver from unconditionally enabling the irq for wake.
>
> But why? What is the problem being solved? Is unconditional wakeup in
> the driver incorrect? If so, mention it shortly in the commit msg, what
> is rationale because existing one does not justify this change.

The cover letter talks about it:
"Currently the cros_ec driver assumes that its associated interrupt is
wake capable. This is an incorrect assumption as some Chromebooks use
a separate wake pin, while others overload the interrupt for wake and
IO."
With the current assumption, spurious wakes can occur on systems that
use a separate wake pin.
I can add wording to the dts patches to help clarify.

> > The driver works across numerous buses (spi, uart, i2c, lpc) and
> > supports DT and ACPI.
> > SPI+DT systems all happen to need irq wake enabled.
> >
> >> I don't think anything from previous discussion was
> >> resolved.
> >
> > Which previous discussion do you mean? In v1 it was suggested to split
>
> https://lore.kernel.org/all/20231213221124.GB2115075-robh@kernel.org/

Hmm, I thought that was addressed [2]. I was referencing the existing
binding documentation. From there, there was discussion about updating
the docs to clarify what was actually intended (patch 3 in this
series). I also addressed the ABI break concern in the thread and
mentioned it in patch 22.
"For device tree base systems, it is not an issue as the relevant
device tree entries have been updated and DTS is built from source for
each ChromeOS update."

Is there a specific concern you feel is not resolved? Or can I make
something more clear?

[2] https://lore.kernel.org/all/CANg-bXCG61HFW7JFuAd3k+OrCG_F9F3e8brjM-pmBauS53aobQ@mail.gmail.com/
Krzysztof Kozlowski Dec. 21, 2023, 8:34 p.m. UTC | #5 
On 21/12/2023 20:24, Mark Hasemeyer wrote:
>>>> You do not need this property, if driver assumes that. Just enable it
>>>> unconditionally.
>>>
>>> The goal of this patch series is to change exactly that: to prevent
>>> the driver from unconditionally enabling the irq for wake.
>>
>> But why? What is the problem being solved? Is unconditional wakeup in
>> the driver incorrect? If so, mention it shortly in the commit msg, what
>> is rationale because existing one does not justify this change.
> 
> The cover letter talks about it:
> "Currently the cros_ec driver assumes that its associated interrupt is
> wake capable. This is an incorrect assumption as some Chromebooks use
> a separate wake pin, while others overload the interrupt for wake and
> IO."
> With the current assumption, spurious wakes can occur on systems that
> use a separate wake pin.

This sentence would be enough.

> I can add wording to the dts patches to help clarify.
> 
>>> The driver works across numerous buses (spi, uart, i2c, lpc) and
>>> supports DT and ACPI.
>>> SPI+DT systems all happen to need irq wake enabled.
>>>
>>>> I don't think anything from previous discussion was
>>>> resolved.
>>>
>>> Which previous discussion do you mean? In v1 it was suggested to split
>>
>> https://lore.kernel.org/all/20231213221124.GB2115075-robh@kernel.org/
> 
> Hmm, I thought that was addressed [2]. I was referencing the existing
> binding documentation. From there, there was discussion about updating
> the docs to clarify what was actually intended (patch 3 in this
> series). I also addressed the ABI break concern in the thread and
> mentioned it in patch 22.
> "For device tree base systems, it is not an issue as the relevant
> device tree entries have been updated and DTS is built from source for
> each ChromeOS update."
> 
> Is there a specific concern you feel is not resolved? Or can I make
> something more clear?
> 
Seems fine, thanks.

Best regards,
Krzysztof
Krzysztof Kozlowski Jan. 22, 2024, 11:15 a.m. UTC | #6 
On Wed, 20 Dec 2023 16:54:20 -0700, Mark Hasemeyer wrote:
> The cros_ec driver currently assumes that cros-ec-spi compatible device
> nodes are a wakeup-source even though the wakeup-source property is not
> defined.
> 
> Add the wakeup-source property to all cros-ec-spi compatible device
> nodes to match expected behavior.
> 
> [...]

Applied, thanks!

[06/22] ARM: dts: samsung: exynos5420: Enable cros-ec-spi as wake source
        https://git.kernel.org/krzk/linux/c/8f51b5290ff4f8a9f1c634cf42ca37cd9e90018c

Best regards,
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/samsung/exynos5420-peach-pit.dts b/arch/arm/boot/dts/samsung/exynos5420-peach-pit.dts
index 4e757b6e28e1c..3759742d38cac 100644
--- a/arch/arm/boot/dts/samsung/exynos5420-peach-pit.dts
+++ b/arch/arm/boot/dts/samsung/exynos5420-peach-pit.dts
@@ -967,6 +967,7 @@  cros_ec: cros-ec@0 {
 		reg = <0>;
 		spi-max-frequency = <3125000>;
 		google,has-vbc-nvram;
+		wakeup-source;
 
 		controller-data {
 			samsung,spi-feedback-delay = <1>;