arm64: dts: qcom: Add coresight nodes for sm8450

Message ID 20231220124009.16816-1-quic_jinlmao@quicinc.com
State New
Headers
Series arm64: dts: qcom: Add coresight nodes for sm8450 |

Commit Message

Mao Jinlong Dec. 20, 2023, 12:40 p.m. UTC
  Add coresight components on Qualcomm SM8450 Soc. The components include
TMC ETF/ETR, ETE, STM, TPDM, CTI.

Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com>
---
 arch/arm64/boot/dts/qcom/sm8450.dtsi | 742 +++++++++++++++++++++++++++
 1 file changed, 742 insertions(+)
  

Comments

Krzysztof Kozlowski Dec. 20, 2023, 12:46 p.m. UTC | #1
On 20/12/2023 13:40, Mao Jinlong wrote:
> Add coresight components on Qualcomm SM8450 Soc. The components include
> TMC ETF/ETR, ETE, STM, TPDM, CTI.
> 
> Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com>
> ---
>  arch/arm64/boot/dts/qcom/sm8450.dtsi | 742 +++++++++++++++++++++++++++
>  1 file changed, 742 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> index 1783fa78bdbc..112b5a069c94 100644
> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
> @@ -285,6 +285,192 @@ CLUSTER_SLEEP_1: cluster-sleep-1 {
>  		};
>  	};
>  
> +	ete0 {

ete-0

> +		compatible = "arm,embedded-trace-extension";
> +		cpu = <&CPU0>;
> +
> +		out-ports {
> +			port {
> +				ete0_out_funnel_ete: endpoint {
> +				remote-endpoint = <&funnel_ete_in_ete0>;

Missing indentation.

...

> +	funnel_ete {

funnel
Anyway underscores are not allowed

> +		compatible = "arm,coresight-static-funnel";
> +
> +		out-ports {
> +			port {
> +				funnel_ete_out_funnel_apss: endpoint {
> +					remote-endpoint =
> +					<&funnel_apss_in_funnel_ete>;

Messed indentation

Errors above look all over this patch, so fix all instances in this patch.

Best regards,
Krzysztof
  
Mao Jinlong Dec. 20, 2023, 1:07 p.m. UTC | #2
On 12/20/2023 8:46 PM, Krzysztof Kozlowski wrote:
> On 20/12/2023 13:40, Mao Jinlong wrote:
>> Add coresight components on Qualcomm SM8450 Soc. The components include
>> TMC ETF/ETR, ETE, STM, TPDM, CTI.
>>
>> Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com>
>> ---
>>   arch/arm64/boot/dts/qcom/sm8450.dtsi | 742 +++++++++++++++++++++++++++
>>   1 file changed, 742 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
>> index 1783fa78bdbc..112b5a069c94 100644
>> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
>> @@ -285,6 +285,192 @@ CLUSTER_SLEEP_1: cluster-sleep-1 {
>>   		};
>>   	};
>>   
>> +	ete0 {
> 
> ete-0
Thanks for the review.

In arm,embedded-trace-extension.yaml, the node name pattern is 
"^ete([0-9a-f]+)$".

examples:

# An ETE node without legacy CoreSight connections
   - |
     ete0 {
       compatible = "arm,embedded-trace-extension";
       cpu = <&cpu_0>;
     };
# An ETE node with legacy CoreSight connections
   - |
    ete1 {
       compatible = "arm,embedded-trace-extension";
       cpu = <&cpu_1>;

       out-ports {        /* legacy coresight connection */
          port {
              ete1_out_port: endpoint {
                 remote-endpoint = <&funnel_in_port0>;
              };
          };
       };
    };
> 
>> +		compatible = "arm,embedded-trace-extension";
>> +		cpu = <&CPU0>;
>> +
>> +		out-ports {
>> +			port {
>> +				ete0_out_funnel_ete: endpoint {
>> +				remote-endpoint = <&funnel_ete_in_ete0>;
> 
> Missing indentation.
> 
> ...
> 
>> +	funnel_ete {
> 
> funnel
> Anyway underscores are not allowed
> 
>> +		compatible = "arm,coresight-static-funnel";
>> +
>> +		out-ports {
>> +			port {
>> +				funnel_ete_out_funnel_apss: endpoint {
>> +					remote-endpoint =
>> +					<&funnel_apss_in_funnel_ete>;
> 
> Messed indentation
> 
> Errors above look all over this patch, so fix all instances in this patch.
> 
> Best regards,
> Krzysztof
>
  
Krzysztof Kozlowski Dec. 20, 2023, 1:21 p.m. UTC | #3
On 20/12/2023 14:07, Jinlong Mao wrote:
> 
> 
> On 12/20/2023 8:46 PM, Krzysztof Kozlowski wrote:
>> On 20/12/2023 13:40, Mao Jinlong wrote:
>>> Add coresight components on Qualcomm SM8450 Soc. The components include
>>> TMC ETF/ETR, ETE, STM, TPDM, CTI.
>>>
>>> Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com>
>>> ---
>>>   arch/arm64/boot/dts/qcom/sm8450.dtsi | 742 +++++++++++++++++++++++++++
>>>   1 file changed, 742 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
>>> index 1783fa78bdbc..112b5a069c94 100644
>>> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
>>> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
>>> @@ -285,6 +285,192 @@ CLUSTER_SLEEP_1: cluster-sleep-1 {
>>>   		};
>>>   	};
>>>   
>>> +	ete0 {
>>
>> ete-0
> Thanks for the review.
> 
> In arm,embedded-trace-extension.yaml, the node name pattern is 
> "^ete([0-9a-f]+)$".

I don't understand why this binding requires ete name. It's not like it
is a generic name worth preserving. Also, the recommended suffix for
names is with '-'.


Best regards,
Krzysztof
  
Mao Jinlong Dec. 20, 2023, 1:40 p.m. UTC | #4
On 12/20/2023 9:21 PM, Krzysztof Kozlowski wrote:
> On 20/12/2023 14:07, Jinlong Mao wrote:
>>
>>
>> On 12/20/2023 8:46 PM, Krzysztof Kozlowski wrote:
>>> On 20/12/2023 13:40, Mao Jinlong wrote:
>>>> Add coresight components on Qualcomm SM8450 Soc. The components include
>>>> TMC ETF/ETR, ETE, STM, TPDM, CTI.
>>>>
>>>> Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com>
>>>> ---
>>>>    arch/arm64/boot/dts/qcom/sm8450.dtsi | 742 +++++++++++++++++++++++++++
>>>>    1 file changed, 742 insertions(+)
>>>>
>>>> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
>>>> index 1783fa78bdbc..112b5a069c94 100644
>>>> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
>>>> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
>>>> @@ -285,6 +285,192 @@ CLUSTER_SLEEP_1: cluster-sleep-1 {
>>>>    		};
>>>>    	};
>>>>    
>>>> +	ete0 {
>>>
>>> ete-0
>> Thanks for the review.
>>
>> In arm,embedded-trace-extension.yaml, the node name pattern is
>> "^ete([0-9a-f]+)$".
> 
> I don't understand why this binding requires ete name. It's not like it
> is a generic name worth preserving. Also, the recommended suffix for
> names is with '-'.
> 
The number in the ete name should be the same as the number of the CPU.
So we can know which CPU this ete belongs to from the name.

I will update the binding in arm,embedded-trace-extension.yaml.

Thanks
Jinlong Mao
> 
> Best regards,
> Krzysztof
>
  
Krzysztof Kozlowski Dec. 20, 2023, 3:50 p.m. UTC | #5
On 20/12/2023 14:40, Jinlong Mao wrote:
> 
> 
> On 12/20/2023 9:21 PM, Krzysztof Kozlowski wrote:
>> On 20/12/2023 14:07, Jinlong Mao wrote:
>>>
>>>
>>> On 12/20/2023 8:46 PM, Krzysztof Kozlowski wrote:
>>>> On 20/12/2023 13:40, Mao Jinlong wrote:
>>>>> Add coresight components on Qualcomm SM8450 Soc. The components include
>>>>> TMC ETF/ETR, ETE, STM, TPDM, CTI.
>>>>>
>>>>> Signed-off-by: Mao Jinlong <quic_jinlmao@quicinc.com>
>>>>> ---
>>>>>    arch/arm64/boot/dts/qcom/sm8450.dtsi | 742 +++++++++++++++++++++++++++
>>>>>    1 file changed, 742 insertions(+)
>>>>>
>>>>> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
>>>>> index 1783fa78bdbc..112b5a069c94 100644
>>>>> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
>>>>> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
>>>>> @@ -285,6 +285,192 @@ CLUSTER_SLEEP_1: cluster-sleep-1 {
>>>>>    		};
>>>>>    	};
>>>>>    
>>>>> +	ete0 {
>>>>
>>>> ete-0
>>> Thanks for the review.
>>>
>>> In arm,embedded-trace-extension.yaml, the node name pattern is
>>> "^ete([0-9a-f]+)$".
>>
>> I don't understand why this binding requires ete name. It's not like it
>> is a generic name worth preserving. Also, the recommended suffix for
>> names is with '-'.
>>
> The number in the ete name should be the same as the number of the CPU.

My question was why "ete" is needed.

> So we can know which CPU this ete belongs to from the name.

Wait, what? Why? Node names should not be for that.

> 
> I will update the binding in arm,embedded-trace-extension.yaml.

No, wait, please finish this discussion first. You need to give people
chance to respond...

Best regards,
Krzysztof
  

Patch

diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index 1783fa78bdbc..112b5a069c94 100644
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -285,6 +285,192 @@  CLUSTER_SLEEP_1: cluster-sleep-1 {
 		};
 	};
 
+	ete0 {
+		compatible = "arm,embedded-trace-extension";
+		cpu = <&CPU0>;
+
+		out-ports {
+			port {
+				ete0_out_funnel_ete: endpoint {
+				remote-endpoint = <&funnel_ete_in_ete0>;
+				};
+			};
+		};
+	};
+
+	ete1 {
+		compatible = "arm,embedded-trace-extension";
+		cpu = <&CPU1>;
+
+		out-ports {
+			port {
+				ete1_out_funnel_ete: endpoint {
+				remote-endpoint = <&funnel_ete_in_ete1>;
+				};
+			};
+		};
+	};
+
+	ete2 {
+		compatible = "arm,embedded-trace-extension";
+		cpu = <&CPU2>;
+
+		out-ports {
+			port {
+				ete2_out_funnel_ete: endpoint {
+				remote-endpoint = <&funnel_ete_in_ete2>;
+				};
+			};
+		};
+	};
+
+	ete3 {
+		compatible = "arm,embedded-trace-extension";
+		cpu = <&CPU3>;
+
+		out-ports {
+			port {
+				ete3_out_funnel_ete: endpoint {
+				remote-endpoint = <&funnel_ete_in_ete3>;
+				};
+			};
+		};
+	};
+
+	ete4 {
+		compatible = "arm,embedded-trace-extension";
+		cpu = <&CPU4>;
+
+		out-ports {
+			port {
+				ete4_out_funnel_ete: endpoint {
+				remote-endpoint = <&funnel_ete_in_ete4>;
+				};
+			};
+		};
+	};
+
+	ete5 {
+		compatible = "arm,embedded-trace-extension";
+		cpu = <&CPU5>;
+
+		out-ports {
+			port {
+				ete5_out_funnel_ete: endpoint {
+				remote-endpoint = <&funnel_ete_in_ete5>;
+				};
+			};
+		};
+	};
+
+	ete6 {
+		compatible = "arm,embedded-trace-extension";
+		cpu = <&CPU6>;
+
+		out-ports {
+			port {
+				ete6_out_funnel_ete: endpoint {
+				remote-endpoint = <&funnel_ete_in_ete6>;
+				};
+			};
+		};
+	};
+
+	ete7 {
+		compatible = "arm,embedded-trace-extension";
+		cpu = <&CPU7>;
+
+		out-ports {
+			port {
+				ete7_out_funnel_ete: endpoint {
+				remote-endpoint = <&funnel_ete_in_ete7>;
+				};
+			};
+		};
+	};
+
+	funnel_ete {
+		compatible = "arm,coresight-static-funnel";
+
+		out-ports {
+			port {
+				funnel_ete_out_funnel_apss: endpoint {
+					remote-endpoint =
+					<&funnel_apss_in_funnel_ete>;
+				};
+			};
+		};
+
+		in-ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+				funnel_ete_in_ete0: endpoint {
+					remote-endpoint =
+					<&ete0_out_funnel_ete>;
+				};
+			};
+
+			port@1 {
+				reg = <1>;
+				funnel_ete_in_ete1: endpoint {
+				remote-endpoint =
+					<&ete1_out_funnel_ete>;
+				};
+			};
+
+			port@2 {
+				reg = <2>;
+				funnel_ete_in_ete2: endpoint {
+				remote-endpoint =
+					<&ete2_out_funnel_ete>;
+				};
+			};
+
+			port@3 {
+				reg = <3>;
+				funnel_ete_in_ete3: endpoint {
+				remote-endpoint =
+					<&ete3_out_funnel_ete>;
+				};
+			};
+
+			port@4 {
+				reg = <4>;
+				funnel_ete_in_ete4: endpoint {
+				remote-endpoint =
+					<&ete4_out_funnel_ete>;
+				};
+			};
+
+			port@5 {
+				reg = <5>;
+				funnel_ete_in_ete5: endpoint {
+					remote-endpoint =
+					<&ete5_out_funnel_ete>;
+				};
+			};
+
+			port@6 {
+				reg = <6>;
+				funnel_ete_in_ete6: endpoint {
+					remote-endpoint =
+					<&ete6_out_funnel_ete>;
+				};
+			};
+
+			port@7 {
+				reg = <7>;
+				funnel_ete_in_ete7: endpoint {
+					remote-endpoint =
+					<&ete7_out_funnel_ete>;
+				};
+			};
+		};
+	};
+
 	firmware {
 		scm: scm {
 			compatible = "qcom,scm-sm8450", "qcom,scm";
@@ -3791,6 +3977,562 @@  data-pins {
 			};
 		};
 
+		stm@10002000 {
+			compatible = "arm,coresight-stm", "arm,primecell";
+			reg = <0x0 0x10002000 0x0 0x1000>,
+				<0x0 0x16280000 0x0 0x180000>;
+			reg-names = "stm-base", "stm-stimulus-base";
+
+			clocks = <&aoss_qmp>;
+			clock-names = "apb_pclk";
+
+			out-ports {
+				port {
+					stm_out_funnel_in0: endpoint {
+						remote-endpoint =
+						<&funnel_in0_in_stm>;
+					};
+				};
+			};
+		};
+
+		funnel@10041000 {
+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
+			reg = <0x0 0x10041000 0x0 0x1000>;
+
+			clocks = <&aoss_qmp>;
+			clock-names = "apb_pclk";
+
+			in-ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@7 {
+					reg = <7>;
+					funnel_in0_in_stm: endpoint {
+						remote-endpoint =
+						<&stm_out_funnel_in0>;
+					};
+				};
+
+			};
+
+			out-ports {
+				port {
+					funnel_in0_out_funnel_qdss: endpoint {
+						remote-endpoint =
+						<&funnel_qdss_in_funnel_in0>;
+					};
+				};
+
+			};
+		};
+
+		funnel@10042000 {
+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
+
+			reg = <0x0 0x10042000 0x0 0x1000>;
+
+			clocks = <&aoss_qmp>;
+			clock-names = "apb_pclk";
+
+			in-ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@4 {
+					reg = <4>;
+					funnel_in1_in_funnel_apss: endpoint {
+						remote-endpoint =
+						<&funnel_apss_out_funnel_in1>;
+					};
+				};
+
+				port@6 {
+					reg = <6>;
+					funnel_in1_in_funnel_dl_center: endpoint {
+						remote-endpoint =
+						<&funnel_dl_center_out_funnel_in1>;
+					};
+				};
+
+			};
+
+			out-ports {
+				port {
+					funnel_in1_out_funnel_qdss: endpoint {
+						remote-endpoint =
+						<&funnel_qdss_in_funnel_in1>;
+					};
+				};
+
+			};
+		};
+
+		funnel@10045000 {
+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
+			reg = <0x0 0x10045000 0x0 0x1000>;
+
+			clocks = <&aoss_qmp>;
+			clock-names = "apb_pclk";
+
+			in-ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+					funnel_qdss_in_funnel_in0: endpoint {
+						remote-endpoint =
+						<&funnel_in0_out_funnel_qdss>;
+					};
+				};
+
+				port@1 {
+					reg = <1>;
+					funnel_qdss_in_funnel_in1: endpoint {
+						remote-endpoint =
+						<&funnel_in1_out_funnel_qdss>;
+					};
+				};
+
+			};
+
+			out-ports {
+				port {
+					funnel_qdss_out_funnel_aoss: endpoint {
+						remote-endpoint =
+						<&funnel_aoss_in_funnel_qdss>;
+					};
+				};
+
+			};
+		};
+
+		replicator@10046000 {
+			compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
+			reg = <0x0 0x10046000 0x0 0x1000>;
+
+			clocks = <&aoss_qmp>;
+			clock-names = "apb_pclk";
+
+			in-ports {
+				port {
+					replicator_qdss_in_replicator_swao: endpoint {
+						remote-endpoint =
+						<&replicator_swao_out_replicator_qdss>;
+					};
+				};
+			};
+
+			out-ports {
+
+				port {
+					replicator_qdss_out_replicator_etr: endpoint {
+						remote-endpoint =
+						<&replicator_etr_in_replicator_qdss>;
+					};
+				};
+			};
+		};
+
+		tmc_etr: tmc@10048000 {
+			compatible = "arm,coresight-tmc", "arm,primecell";
+			reg = <0x0 0x10048000 0x0 0x1000>;
+
+			iommus = <&apps_smmu 0x0600 0>;
+			arm,buffer-size = <0x10000>;
+
+			arm,scatter-gather;
+			clocks = <&aoss_qmp>;
+			clock-names = "apb_pclk";
+
+			in-ports {
+				port {
+					tmc_etr_in_replicator_etr: endpoint {
+						remote-endpoint =
+						<&replicator_etr_out_tmc_etr>;
+					};
+				};
+			};
+		};
+
+		replicator@1004e000 {
+			compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
+			reg = <0x0 0x1004e000 0x0 0x1000>;
+
+			clocks = <&aoss_qmp>;
+			clock-names = "apb_pclk";
+
+			in-ports {
+				port {
+					replicator_etr_in_replicator_qdss: endpoint {
+						remote-endpoint =
+						<&replicator_qdss_out_replicator_etr>;
+					};
+				};
+			};
+
+			out-ports {
+
+				port {
+
+					replicator_etr_out_tmc_etr: endpoint {
+						remote-endpoint =
+						<&tmc_etr_in_replicator_etr>;
+					};
+				};
+			};
+		};
+
+		funnel@10b04000 {
+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
+
+			reg = <0x0 0x10b04000 0x0 0x1000>;
+
+			clocks = <&aoss_qmp>;
+			clock-names = "apb_pclk";
+
+			in-ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@6 {
+					reg = <6>;
+					funnel_aoss_in_tpda_aoss: endpoint {
+						remote-endpoint =
+						<&tpda_aoss_out_funnel_aoss>;
+					};
+				};
+
+				port@7 {
+					reg = <7>;
+					funnel_aoss_in_funnel_qdss: endpoint {
+						remote-endpoint =
+						<&funnel_qdss_out_funnel_aoss>;
+					};
+				};
+			};
+
+			out-ports {
+				port {
+					funnel_aoss_out_tmc_etf: endpoint {
+						remote-endpoint =
+						<&tmc_etf_in_funnel_aoss>;
+					};
+				};
+
+			};
+		};
+
+		tmc@10b05000 {
+			compatible = "arm,coresight-tmc", "arm,primecell";
+			reg = <0x0 0x10b05000 0x0 0x1000>;
+
+			clocks = <&aoss_qmp>;
+			clock-names = "apb_pclk";
+
+			in-ports {
+				port {
+					tmc_etf_in_funnel_aoss: endpoint {
+						remote-endpoint =
+						<&funnel_aoss_out_tmc_etf>;
+					};
+				};
+			};
+
+			out-ports {
+				port {
+					tmc_etf_out_replicator_swao: endpoint {
+						remote-endpoint =
+						<&replicator_swao_in_tmc_etf>;
+					};
+				};
+			};
+		};
+
+		replicator@10b06000 {
+			compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
+			reg = <0x0 0x10b06000 0x0 0x1000>;
+
+			qcom,replicator-loses-context;
+			clocks = <&aoss_qmp>;
+			clock-names = "apb_pclk";
+
+			in-ports {
+				port {
+					replicator_swao_in_tmc_etf: endpoint {
+						remote-endpoint =
+						<&tmc_etf_out_replicator_swao>;
+					};
+				};
+			};
+
+			out-ports {
+
+				port {
+					replicator_swao_out_replicator_qdss: endpoint {
+						remote-endpoint =
+						<&replicator_qdss_in_replicator_swao>;
+					};
+				};
+
+			};
+		};
+
+		tpda@10b08000 {
+			compatible = "qcom,coresight-tpda", "arm,primecell";
+
+			reg = <0x0 0x10b08000 0x0 0x1000>;
+
+			clocks = <&aoss_qmp>;
+			clock-names = "apb_pclk";
+
+			in-ports {
+
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+					tpda_aoss_in_tpdm_swao_prio_0: endpoint {
+						remote-endpoint =
+						<&tpdm_swao_prio_0_out_tpda_aoss>;
+					};
+				};
+
+				port@4 {
+					reg = <4>;
+					tpda_aoss_in_tpdm_swao: endpoint {
+						remote-endpoint =
+						<&tpdm_swao_out_tpda_aoss>;
+					};
+				};
+
+			};
+
+			out-ports {
+
+				port {
+					tpda_aoss_out_funnel_aoss: endpoint {
+						remote-endpoint =
+						<&funnel_aoss_in_tpda_aoss>;
+					};
+				};
+
+			};
+		};
+
+		tpdm@10b09000 {
+			compatible = "qcom,coresight-tpdm", "arm,primecell";
+			reg = <0x0 0x10b09000 0x0 0x1000>;
+
+
+			clocks = <&aoss_qmp>;
+			clock-names = "apb_pclk";
+
+			out-ports {
+				port {
+					tpdm_swao_prio_0_out_tpda_aoss: endpoint {
+						remote-endpoint =
+						<&tpda_aoss_in_tpdm_swao_prio_0>;
+					};
+				};
+			};
+		};
+
+		tpdm@10b0d000 {
+			compatible = "qcom,coresight-tpdm", "arm,primecell";
+			reg = <0x0 0x10b0d000 0x0 0x1000>;
+
+			clocks = <&aoss_qmp>;
+			clock-names = "apb_pclk";
+
+			out-ports {
+				port {
+					tpdm_swao_out_tpda_aoss: endpoint {
+						remote-endpoint =
+						<&tpda_aoss_in_tpdm_swao>;
+					};
+				};
+			};
+		};
+
+		tpdm@10c28000 {
+			compatible = "qcom,coresight-tpdm", "arm,primecell";
+			reg = <0x0 0x10c28000 0x0 0x1000>;
+
+			clocks = <&aoss_qmp>;
+			clock-names = "apb_pclk";
+
+			out-ports {
+				port {
+					tpdm_dlct_out_tpda_dl_center_26: endpoint {
+						remote-endpoint =
+						<&tpda_dl_center_26_in_tpdm_dlct>;
+					};
+				};
+			};
+		};
+
+		tpdm@10c29000 {
+			compatible = "qcom,coresight-tpdm", "arm,primecell";
+			reg = <0x0 0x10c29000 0x0 0x1000>;
+
+			clocks = <&aoss_qmp>;
+			clock-names = "apb_pclk";
+
+			out-ports {
+				port {
+					tpdm_ipcc_out_tpda_dl_center_27: endpoint {
+						remote-endpoint =
+						<&tpda_dl_center_27_in_tpdm_ipcc>;
+					};
+				};
+			};
+		};
+
+		cti@10c2a000 {
+			compatible = "arm,coresight-cti", "arm,primecell";
+			reg = <0x0 0x10c2a000 0x0 0x1000>;
+
+			clocks = <&aoss_qmp>;
+			clock-names = "apb_pclk";
+		};
+
+		cti@10c2b000 {
+			compatible = "arm,coresight-cti", "arm,primecell";
+			reg = <0x0 0x10c2b000 0x0 0x1000>;
+
+			clocks = <&aoss_qmp>;
+			clock-names = "apb_pclk";
+		};
+
+		tpda@10c2e000 {
+			compatible = "qcom,coresight-tpda", "arm,primecell";
+			reg = <0x0 0x10c2e000 0x0 0x1000>;
+
+			clocks = <&aoss_qmp>;
+			clock-names = "apb_pclk";
+
+			in-ports {
+
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@1a {
+					reg = <26>;
+					tpda_dl_center_26_in_tpdm_dlct: endpoint {
+						remote-endpoint =
+						<&tpdm_dlct_out_tpda_dl_center_26>;
+					};
+				};
+
+				port@1b {
+					reg = <27>;
+					tpda_dl_center_27_in_tpdm_ipcc: endpoint {
+						remote-endpoint =
+						<&tpdm_ipcc_out_tpda_dl_center_27>;
+					};
+				};
+
+			};
+
+			out-ports {
+
+				port {
+					tpda_dl_center_out_funnel_dl_center: endpoint {
+						remote-endpoint =
+						<&funnel_dl_center_in_tpda_dl_center>;
+					};
+				};
+
+			};
+		};
+
+		funnel@10c2f000 {
+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
+			reg = <0x0 0x10c2f000 0x0 0x1000>;
+
+			clocks = <&aoss_qmp>;
+			clock-names = "apb_pclk";
+
+			in-ports {
+
+				port {
+					funnel_dl_center_in_tpda_dl_center: endpoint {
+						remote-endpoint =
+						<&tpda_dl_center_out_funnel_dl_center>;
+					};
+				};
+
+			};
+
+			out-ports {
+				port {
+					funnel_dl_center_out_funnel_in1: endpoint {
+						remote-endpoint =
+						<&funnel_in1_in_funnel_dl_center>;
+					};
+				};
+
+			};
+		};
+
+		funnel@13810000 {
+			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
+
+			reg = <0x0 0x13810000 0x0 0x1000>;
+
+			clocks = <&aoss_qmp>;
+			clock-names = "apb_pclk";
+
+			in-ports {
+
+				port {
+					funnel_apss_in_funnel_ete: endpoint {
+						remote-endpoint =
+						<&funnel_ete_out_funnel_apss>;
+					};
+				};
+
+			};
+
+			out-ports {
+				port {
+					funnel_apss_out_funnel_in1: endpoint {
+						remote-endpoint =
+						<&funnel_in1_in_funnel_apss>;
+					};
+				};
+
+			};
+		};
+
+		cti@138e0000 {
+			compatible = "arm,coresight-cti", "arm,primecell";
+			reg = <0x0 0x138e0000 0x0 0x1000>;
+
+			clocks = <&aoss_qmp>;
+			clock-names = "apb_pclk";
+		};
+
+		cti@138f0000 {
+			compatible = "arm,coresight-cti", "arm,primecell";
+			reg = <0x0 0x138f0000 0x0 0x1000>;
+
+			clocks = <&aoss_qmp>;
+			clock-names = "apb_pclk";
+		};
+
+		cti@13900000 {
+			compatible = "arm,coresight-cti", "arm,primecell";
+			reg = <0x0 0x13900000 0x0 0x1000>;
+
+			clocks = <&aoss_qmp>;
+			clock-names = "apb_pclk";
+		};
+
 		sram@146aa000 {
 			compatible = "qcom,sm8450-imem", "syscon", "simple-mfd";
 			reg = <0 0x146aa000 0 0x1000>;