Message ID | c6e55781245dd3e8e9b8debd6130fc5449dfbd55.1665031170.git.research_trasio@irq.a4lg.com |
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State | Accepted, archived |
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[2620:52:3:1:0:246e:9693:128c]) by mx.google.com with ESMTPS id fd16-20020a056402389000b00458ebd62c70si10075216edb.32.2022.10.05.21.41.01 for <ouuuleilei@gmail.com> (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 05 Oct 2022 21:41:01 -0700 (PDT) Received-SPF: pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) client-ip=2620:52:3:1:0:246e:9693:128c; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=D5uYjd1e; spf=pass (google.com: domain of binutils-bounces+ouuuleilei=gmail.com@sourceware.org designates 2620:52:3:1:0:246e:9693:128c as permitted sender) smtp.mailfrom="binutils-bounces+ouuuleilei=gmail.com@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id EDF80384D16E for <ouuuleilei@gmail.com>; Thu, 6 Oct 2022 04:40:53 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org EDF80384D16E DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1665031254; bh=/vCTF/G4QVs7ROme/TFeEqos4+xs1uuKLN+Z6Zsnsus=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=D5uYjd1eVTtEJZFREh8hGFkUiZUWsV6pUEpX/1/5KbWjw3pDTpVwbTbbzs3xMwgIx xMtGa62Qfm94gCJCWYufB5drMBvDbReg1iD+LScJPiePhGmvsGE/bKu6X+eanLx6Ua X9YWYISYKg73vX1ByAxDwdOLJa2HG2sMy+0huaEg= X-Original-To: binutils@sourceware.org Delivered-To: binutils@sourceware.org Received: from mail-sender-0.a4lg.com (mail-sender-0.a4lg.com [IPv6:2401:2500:203:30b:4000:6bfe:4757:0]) by sourceware.org (Postfix) with ESMTPS id 7A34A384D14E for <binutils@sourceware.org>; Thu, 6 Oct 2022 04:40:46 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 7A34A384D14E Received: from [127.0.0.1] (localhost [127.0.0.1]) by mail-sender-0.a4lg.com (Postfix) with ESMTPSA id CC7DF300089; Thu, 6 Oct 2022 04:40:44 +0000 (UTC) To: Tsukasa OI <research_trasio@irq.a4lg.com>, Nelson Chu <nelson@rivosinc.com>, Kito Cheng <kito.cheng@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com> Subject: [PATCH v2 2/2] RISC-V: Improve "bits undefined" diagnostics Date: Thu, 6 Oct 2022 04:40:16 +0000 Message-Id: <c6e55781245dd3e8e9b8debd6130fc5449dfbd55.1665031170.git.research_trasio@irq.a4lg.com> In-Reply-To: <cover.1665031170.git.research_trasio@irq.a4lg.com> References: <cover.1657338656.git.research_trasio@irq.a4lg.com> <cover.1665031170.git.research_trasio@irq.a4lg.com> Mime-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-12.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, GIT_PATCH_0, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Binutils mailing list <binutils.sourceware.org> List-Unsubscribe: <https://sourceware.org/mailman/options/binutils>, <mailto:binutils-request@sourceware.org?subject=unsubscribe> List-Archive: <https://sourceware.org/pipermail/binutils/> List-Post: <mailto:binutils@sourceware.org> List-Help: <mailto:binutils-request@sourceware.org?subject=help> List-Subscribe: <https://sourceware.org/mailman/listinfo/binutils>, <mailto:binutils-request@sourceware.org?subject=subscribe> From: Tsukasa OI via Binutils <binutils@sourceware.org> Reply-To: Tsukasa OI <research_trasio@irq.a4lg.com> Cc: binutils@sourceware.org Errors-To: binutils-bounces+ouuuleilei=gmail.com@sourceware.org Sender: "Binutils" <binutils-bounces+ouuuleilei=gmail.com@sourceware.org> X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1745911799964221706?= X-GMAIL-MSGID: =?utf-8?q?1745911819903752076?= |
Series |
RISC-V: Improve "bits undefined" diagnostics
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Checks
Context | Check | Description |
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snail/binutils-gdb-check | success | Github commit url |
Commit Message
Tsukasa OI
Oct. 6, 2022, 4:40 a.m. UTC
This commit improves internal error message "internal: bad RISC-V opcode (bits 0x%lx undefined): %s %s" to display actual unused bits (excluding non-instruction bits). gas/ChangeLog: * config/tc-riscv.c (validate_riscv_insn): Exclude non- instruction bits from displaying internal diagnostics. Change error message slightly. --- gas/config/tc-riscv.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
Comments
On 06.10.2022 06:40, Tsukasa OI via Binutils wrote: > --- a/gas/config/tc-riscv.c > +++ b/gas/config/tc-riscv.c > @@ -1312,8 +1312,8 @@ validate_riscv_insn (const struct riscv_opcode *opc, int length) > if (used_bits != required_bits) > { > as_bad (_("internal: bad RISC-V opcode " > - "(bits 0x%lx undefined): %s %s"), > - ~(unsigned long)(used_bits & required_bits), > + "(bits 0x%llx undefined or invalid): %s %s"), > + (unsigned long long)(used_bits ^ required_bits), May I encourage the use of the # format modifier in cases like this one (i.e. %#llx here), for producing a one character shorter string literal? Iirc a respective adjustment was done pretty recently to some other parts of binutils. Jan
On 2022/10/06 17:26, Jan Beulich wrote: > On 06.10.2022 06:40, Tsukasa OI via Binutils wrote: >> --- a/gas/config/tc-riscv.c >> +++ b/gas/config/tc-riscv.c >> @@ -1312,8 +1312,8 @@ validate_riscv_insn (const struct riscv_opcode *opc, int length) >> if (used_bits != required_bits) >> { >> as_bad (_("internal: bad RISC-V opcode " >> - "(bits 0x%lx undefined): %s %s"), >> - ~(unsigned long)(used_bits & required_bits), >> + "(bits 0x%llx undefined or invalid): %s %s"), >> + (unsigned long long)(used_bits ^ required_bits), > > May I encourage the use of the # format modifier in cases like this > one (i.e. %#llx here), for producing a one character shorter string > literal? Iirc a respective adjustment was done pretty recently to > some other parts of binutils. I would disagree if it was a part of the core disassembling portion but... seems okay here (as exact formatting is not important). It would have changed the behavior if (used_bits ^ required_bits) is not zero (e.g. with "%#x": "0" (0), "0x1" (1)...) but here, (used_bits ^ required_bits) cannot be zero. So, the behavior won't change either. Thanks, Tsukasa > > Jan >
On 06.10.2022 10:34, Tsukasa OI wrote: > On 2022/10/06 17:26, Jan Beulich wrote: >> On 06.10.2022 06:40, Tsukasa OI via Binutils wrote: >>> --- a/gas/config/tc-riscv.c >>> +++ b/gas/config/tc-riscv.c >>> @@ -1312,8 +1312,8 @@ validate_riscv_insn (const struct riscv_opcode *opc, int length) >>> if (used_bits != required_bits) >>> { >>> as_bad (_("internal: bad RISC-V opcode " >>> - "(bits 0x%lx undefined): %s %s"), >>> - ~(unsigned long)(used_bits & required_bits), >>> + "(bits 0x%llx undefined or invalid): %s %s"), >>> + (unsigned long long)(used_bits ^ required_bits), >> >> May I encourage the use of the # format modifier in cases like this >> one (i.e. %#llx here), for producing a one character shorter string >> literal? Iirc a respective adjustment was done pretty recently to >> some other parts of binutils. > > I would disagree if it was a part of the core disassembling portion > but... Sure - typically in disassembly you want to output leading zeros, and in that case using # isn't desirable. (I've observed RISC-V disassembly to omit leading zeros in certain cases though, which personally I find confusing.) Jan > seems okay here (as exact formatting is not important). It would > have changed the behavior if (used_bits ^ required_bits) is not zero > (e.g. with "%#x": "0" (0), "0x1" (1)...) but here, (used_bits ^ > required_bits) cannot be zero. So, the behavior won't change either. > > Thanks, > Tsukasa
diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c index 2e41cec5c9f..34973d7803c 100644 --- a/gas/config/tc-riscv.c +++ b/gas/config/tc-riscv.c @@ -1312,8 +1312,8 @@ validate_riscv_insn (const struct riscv_opcode *opc, int length) if (used_bits != required_bits) { as_bad (_("internal: bad RISC-V opcode " - "(bits 0x%lx undefined): %s %s"), - ~(unsigned long)(used_bits & required_bits), + "(bits 0x%llx undefined or invalid): %s %s"), + (unsigned long long)(used_bits ^ required_bits), opc->name, opc->args); return false; }