[v2,3/3] riscv: dts: sophgo: add rtc dt node for CV1800

Message ID 20231217110952.78784-4-qiujingbao.dlmu@gmail.com
State New
Headers
Series riscv: rtc: sophgo: add rtc support for CV1800 |

Commit Message

Jingbao Qiu Dec. 17, 2023, 11:09 a.m. UTC
  Add the rtc device tree node to cv1800 SoC.

Signed-off-by: Jingbao Qiu <qiujingbao.dlmu@gmail.com>
---
 arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)
  

Comments

Conor Dooley Dec. 17, 2023, 8:47 p.m. UTC | #1
On Sun, Dec 17, 2023 at 07:09:52PM +0800, Jingbao Qiu wrote:
> Add the rtc device tree node to cv1800 SoC.
> 
> Signed-off-by: Jingbao Qiu <qiujingbao.dlmu@gmail.com>
> ---
>  arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 7 +++++++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> index df40e87ee063..429bee76f677 100644
> --- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> +++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> @@ -119,5 +119,12 @@ clint: timer@74000000 {
>  			reg = <0x74000000 0x10000>;
>  			interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>;
>  		};
> +
> +		rtc@5025000 {
> +			compatible = "sophgo,cv1800-rtc";

This is a cv1800b, not a cv1800.

> +			reg = <0x5025000 0x1000>, <0x5026000 0x1000>;
> +			clocks = <&osc>;
> +			interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
> +		};
>  	};
>  };
> -- 
> 2.25.1
>
  
Jingbao Qiu Dec. 18, 2023, 2:05 a.m. UTC | #2
On Mon, Dec 18, 2023 at 4:48 AM Conor Dooley <conor@kernel.org> wrote:
>
> On Sun, Dec 17, 2023 at 07:09:52PM +0800, Jingbao Qiu wrote:
> > Add the rtc device tree node to cv1800 SoC.
> >
> > Signed-off-by: Jingbao Qiu <qiujingbao.dlmu@gmail.com>
> > ---
> >  arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 7 +++++++
> >  1 file changed, 7 insertions(+)
> >
> > diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> > index df40e87ee063..429bee76f677 100644
> > --- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> > +++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> > @@ -119,5 +119,12 @@ clint: timer@74000000 {
> >                       reg = <0x74000000 0x10000>;
> >                       interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>;
> >               };
> > +
> > +             rtc@5025000 {
> > +                     compatible = "sophgo,cv1800-rtc";
>
> This is a cv1800b, not a cv1800.
>

Thanks, I will fix it.

Best regards,
Jingbao Qiu

> > +                     reg = <0x5025000 0x1000>, <0x5026000 0x1000>;
> > +                     clocks = <&osc>;
> > +                     interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
> > +             };
> >       };
> >  };
> > --
> > 2.25.1
> >
  

Patch

diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
index df40e87ee063..429bee76f677 100644
--- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
+++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
@@ -119,5 +119,12 @@  clint: timer@74000000 {
 			reg = <0x74000000 0x10000>;
 			interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>;
 		};
+
+		rtc@5025000 {
+			compatible = "sophgo,cv1800-rtc";
+			reg = <0x5025000 0x1000>, <0x5026000 0x1000>;
+			clocks = <&osc>;
+			interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
+		};
 	};
 };