Message ID | 20231206114659.13009-1-quic_nitirawa@quicinc.com |
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State | New |
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Bottomley" <jejb@linux.ibm.com>, "Martin K. Petersen" <martin.petersen@oracle.com>, Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>, Manivannan Sadhasivam <mani@kernel.org> Cc: linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org, quic_cang@quicinc.com, Nitin Rawat <quic_nitirawa@quicinc.com>, Manish Pandey <quic_mapa@quicinc.com> Subject: [PATCH V2] scsi: ufs: core: store min and max clk freq from OPP table Date: Wed, 6 Dec 2023 17:16:59 +0530 Message-Id: <20231206114659.13009-1-quic_nitirawa@quicinc.com> X-Mailer: git-send-email 2.17.1 X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: ZJ9AZol17sQe52LRjs98Bha33N4sBAY_ X-Proofpoint-ORIG-GUID: ZJ9AZol17sQe52LRjs98Bha33N4sBAY_ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-12-06_09,2023-12-06_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 clxscore=1015 priorityscore=1501 bulkscore=0 phishscore=0 adultscore=0 impostorscore=0 lowpriorityscore=0 spamscore=0 malwarescore=0 suspectscore=0 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311290000 definitions=main-2312060098 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on groat.vger.email Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (groat.vger.email [0.0.0.0]); Wed, 06 Dec 2023 03:52:27 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1784533281894385856 X-GMAIL-MSGID: 1784533281894385856 |
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[V2] scsi: ufs: core: store min and max clk freq from OPP table
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Commit Message
Nitin Rawat
Dec. 6, 2023, 11:46 a.m. UTC
OPP support added by commit 72208ebe181e ("scsi: ufs: core: Add support for parsing OPP") doesn't update the min_freq and max_freq of each clocks in 'struct ufs_clk_info'. But these values are used by the vendor host drivers internally for controller configuration. When the OPP support is enabled in devicetree, these values will be 0, causing boot issues on the respective platforms. So add support to parse the min_freq and max_freq of all clocks while parsing the OPP table. Fixes: 72208ebe181e ("scsi: ufs: core: Add support for parsing OPP") Co-developed-by: Manish Pandey <quic_mapa@quicinc.com> Signed-off-by: Manish Pandey <quic_mapa@quicinc.com> Signed-off-by: Nitin Rawat <quic_nitirawa@quicinc.com> --- Changes from v1: As per Manivannan's comment: - Updated commmit description - Sort include file alphabetically - Added missing dev_pm_opp_put - updated function name and documention - removed ret variable --- drivers/ufs/host/ufshcd-pltfrm.c | 53 ++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) -- 2.17.1
Comments
On Wed, Dec 06, 2023 at 05:16:59PM +0530, Nitin Rawat wrote: > OPP support added by commit 72208ebe181e ("scsi: ufs: core: Add support > for parsing OPP") doesn't update the min_freq and max_freq of each clocks > in 'struct ufs_clk_info'. > > But these values are used by the vendor host drivers internally for > controller configuration. When the OPP support is enabled in devicetree, > these values will be 0, causing boot issues on the respective platforms. > > So add support to parse the min_freq and max_freq of all clocks while > parsing the OPP table. > > Fixes: 72208ebe181e ("scsi: ufs: core: Add support for parsing OPP") > Co-developed-by: Manish Pandey <quic_mapa@quicinc.com> > Signed-off-by: Manish Pandey <quic_mapa@quicinc.com> > Signed-off-by: Nitin Rawat <quic_nitirawa@quicinc.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Martin, please queue this patch for 6.7-rcS. - Mani > --- > Changes from v1: > As per Manivannan's comment: > - Updated commmit description > - Sort include file alphabetically > - Added missing dev_pm_opp_put > - updated function name and documention > - removed ret variable > --- > drivers/ufs/host/ufshcd-pltfrm.c | 53 ++++++++++++++++++++++++++++++++ > 1 file changed, 53 insertions(+) > > diff --git a/drivers/ufs/host/ufshcd-pltfrm.c b/drivers/ufs/host/ufshcd-pltfrm.c > index da2558e274b4..409efa0db8fa 100644 > --- a/drivers/ufs/host/ufshcd-pltfrm.c > +++ b/drivers/ufs/host/ufshcd-pltfrm.c > @@ -8,6 +8,7 @@ > * Vinayak Holikatti <h.vinayak@samsung.com> > */ > > +#include <linux/clk.h> > #include <linux/module.h> > #include <linux/platform_device.h> > #include <linux/pm_opp.h> > @@ -213,6 +214,54 @@ static void ufshcd_init_lanes_per_dir(struct ufs_hba *hba) > } > } > > +/** > + * ufshcd_parse_clock_min_max_freq - Parse MIN and MAX clocks freq > + * @hba: per adapter instance > + * > + * This function parses MIN and MAX frequencies of all clocks required > + * by the vendor host drivers. > + * > + * Returns 0 for success and non-zero for failure > + */ > +static int ufshcd_parse_clock_min_max_freq(struct ufs_hba *hba) > +{ > + struct list_head *head = &hba->clk_list_head; > + struct ufs_clk_info *clki; > + struct dev_pm_opp *opp; > + unsigned long freq; > + u8 idx = 0; > + > + list_for_each_entry(clki, head, list) { > + if (!clki->name) > + continue; > + > + clki->clk = devm_clk_get(hba->dev, clki->name); > + if (!IS_ERR(clki->clk)) { > + /* Find Max Freq */ > + freq = ULONG_MAX; > + opp = dev_pm_opp_find_freq_floor_indexed(hba->dev, &freq, idx); > + if (IS_ERR(opp)) { > + dev_err(hba->dev, "Failed to find OPP for MAX frequency\n"); > + return PTR_ERR(opp); > + } > + clki->max_freq = dev_pm_opp_get_freq_indexed(opp, idx); > + dev_pm_opp_put(opp); > + > + /* Find Min Freq */ > + freq = 0; > + opp = dev_pm_opp_find_freq_ceil_indexed(hba->dev, &freq, idx++); > + if (IS_ERR(opp)) { > + dev_err(hba->dev, "Failed to find OPP for MIN frequency\n"); > + return PTR_ERR(opp); > + } > + clki->min_freq = dev_pm_opp_get_freq_indexed(opp, idx); > + dev_pm_opp_put(opp); > + } > + } > + > + return 0; > +} > + > static int ufshcd_parse_operating_points(struct ufs_hba *hba) > { > struct device *dev = hba->dev; > @@ -279,6 +328,10 @@ static int ufshcd_parse_operating_points(struct ufs_hba *hba) > return ret; > } > > + ret = ufshcd_parse_clock_min_max_freq(hba); > + if (ret) > + return ret; > + > hba->use_pm_opp = true; > > return 0; > -- > 2.17.1 >
On 12/6/2023 5:32 PM, Manivannan Sadhasivam wrote: > On Wed, Dec 06, 2023 at 05:16:59PM +0530, Nitin Rawat wrote: >> OPP support added by commit 72208ebe181e ("scsi: ufs: core: Add support >> for parsing OPP") doesn't update the min_freq and max_freq of each clocks >> in 'struct ufs_clk_info'. >> >> But these values are used by the vendor host drivers internally for >> controller configuration. When the OPP support is enabled in devicetree, >> these values will be 0, causing boot issues on the respective platforms. >> >> So add support to parse the min_freq and max_freq of all clocks while >> parsing the OPP table. >> >> Fixes: 72208ebe181e ("scsi: ufs: core: Add support for parsing OPP") >> Co-developed-by: Manish Pandey <quic_mapa@quicinc.com> >> Signed-off-by: Manish Pandey <quic_mapa@quicinc.com> >> Signed-off-by: Nitin Rawat <quic_nitirawa@quicinc.com> > > Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Hi Mani, Pushed new patchset v3 with minor change. Please can you review that. Regards, Nitin > > Martin, please queue this patch for 6.7-rcS. > > - Mani > >> --- >> Changes from v1: >> As per Manivannan's comment: >> - Updated commmit description >> - Sort include file alphabetically >> - Added missing dev_pm_opp_put >> - updated function name and documention >> - removed ret variable >> --- >> drivers/ufs/host/ufshcd-pltfrm.c | 53 ++++++++++++++++++++++++++++++++ >> 1 file changed, 53 insertions(+) >> >> diff --git a/drivers/ufs/host/ufshcd-pltfrm.c b/drivers/ufs/host/ufshcd-pltfrm.c >> index da2558e274b4..409efa0db8fa 100644 >> --- a/drivers/ufs/host/ufshcd-pltfrm.c >> +++ b/drivers/ufs/host/ufshcd-pltfrm.c >> @@ -8,6 +8,7 @@ >> * Vinayak Holikatti <h.vinayak@samsung.com> >> */ >> >> +#include <linux/clk.h> >> #include <linux/module.h> >> #include <linux/platform_device.h> >> #include <linux/pm_opp.h> >> @@ -213,6 +214,54 @@ static void ufshcd_init_lanes_per_dir(struct ufs_hba *hba) >> } >> } >> >> +/** >> + * ufshcd_parse_clock_min_max_freq - Parse MIN and MAX clocks freq >> + * @hba: per adapter instance >> + * >> + * This function parses MIN and MAX frequencies of all clocks required >> + * by the vendor host drivers. >> + * >> + * Returns 0 for success and non-zero for failure >> + */ >> +static int ufshcd_parse_clock_min_max_freq(struct ufs_hba *hba) >> +{ >> + struct list_head *head = &hba->clk_list_head; >> + struct ufs_clk_info *clki; >> + struct dev_pm_opp *opp; >> + unsigned long freq; >> + u8 idx = 0; >> + >> + list_for_each_entry(clki, head, list) { >> + if (!clki->name) >> + continue; >> + >> + clki->clk = devm_clk_get(hba->dev, clki->name); >> + if (!IS_ERR(clki->clk)) { >> + /* Find Max Freq */ >> + freq = ULONG_MAX; >> + opp = dev_pm_opp_find_freq_floor_indexed(hba->dev, &freq, idx); >> + if (IS_ERR(opp)) { >> + dev_err(hba->dev, "Failed to find OPP for MAX frequency\n"); >> + return PTR_ERR(opp); >> + } >> + clki->max_freq = dev_pm_opp_get_freq_indexed(opp, idx); >> + dev_pm_opp_put(opp); >> + >> + /* Find Min Freq */ >> + freq = 0; >> + opp = dev_pm_opp_find_freq_ceil_indexed(hba->dev, &freq, idx++); >> + if (IS_ERR(opp)) { >> + dev_err(hba->dev, "Failed to find OPP for MIN frequency\n"); >> + return PTR_ERR(opp); >> + } >> + clki->min_freq = dev_pm_opp_get_freq_indexed(opp, idx); >> + dev_pm_opp_put(opp); >> + } >> + } >> + >> + return 0; >> +} >> + >> static int ufshcd_parse_operating_points(struct ufs_hba *hba) >> { >> struct device *dev = hba->dev; >> @@ -279,6 +328,10 @@ static int ufshcd_parse_operating_points(struct ufs_hba *hba) >> return ret; >> } >> >> + ret = ufshcd_parse_clock_min_max_freq(hba); >> + if (ret) >> + return ret; >> + >> hba->use_pm_opp = true; >> >> return 0; >> -- >> 2.17.1 >> >
On Wed, Dec 06, 2023 at 05:16:59PM +0530, Nitin Rawat wrote:
> But these values are used by the vendor host drivers internally for
There is no such thing as a "vendor" driver. Please be precise with
your wording.
diff --git a/drivers/ufs/host/ufshcd-pltfrm.c b/drivers/ufs/host/ufshcd-pltfrm.c index da2558e274b4..409efa0db8fa 100644 --- a/drivers/ufs/host/ufshcd-pltfrm.c +++ b/drivers/ufs/host/ufshcd-pltfrm.c @@ -8,6 +8,7 @@ * Vinayak Holikatti <h.vinayak@samsung.com> */ +#include <linux/clk.h> #include <linux/module.h> #include <linux/platform_device.h> #include <linux/pm_opp.h> @@ -213,6 +214,54 @@ static void ufshcd_init_lanes_per_dir(struct ufs_hba *hba) } } +/** + * ufshcd_parse_clock_min_max_freq - Parse MIN and MAX clocks freq + * @hba: per adapter instance + * + * This function parses MIN and MAX frequencies of all clocks required + * by the vendor host drivers. + * + * Returns 0 for success and non-zero for failure + */ +static int ufshcd_parse_clock_min_max_freq(struct ufs_hba *hba) +{ + struct list_head *head = &hba->clk_list_head; + struct ufs_clk_info *clki; + struct dev_pm_opp *opp; + unsigned long freq; + u8 idx = 0; + + list_for_each_entry(clki, head, list) { + if (!clki->name) + continue; + + clki->clk = devm_clk_get(hba->dev, clki->name); + if (!IS_ERR(clki->clk)) { + /* Find Max Freq */ + freq = ULONG_MAX; + opp = dev_pm_opp_find_freq_floor_indexed(hba->dev, &freq, idx); + if (IS_ERR(opp)) { + dev_err(hba->dev, "Failed to find OPP for MAX frequency\n"); + return PTR_ERR(opp); + } + clki->max_freq = dev_pm_opp_get_freq_indexed(opp, idx); + dev_pm_opp_put(opp); + + /* Find Min Freq */ + freq = 0; + opp = dev_pm_opp_find_freq_ceil_indexed(hba->dev, &freq, idx++); + if (IS_ERR(opp)) { + dev_err(hba->dev, "Failed to find OPP for MIN frequency\n"); + return PTR_ERR(opp); + } + clki->min_freq = dev_pm_opp_get_freq_indexed(opp, idx); + dev_pm_opp_put(opp); + } + } + + return 0; +} + static int ufshcd_parse_operating_points(struct ufs_hba *hba) { struct device *dev = hba->dev; @@ -279,6 +328,10 @@ static int ufshcd_parse_operating_points(struct ufs_hba *hba) return ret; } + ret = ufshcd_parse_clock_min_max_freq(hba); + if (ret) + return ret; + hba->use_pm_opp = true; return 0;