Message ID | 20231206053628.32169-1-quic_nitirawa@quicinc.com |
---|---|
State | New |
Headers |
Return-Path: <linux-kernel-owner@vger.kernel.org> Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:bcd1:0:b0:403:3b70:6f57 with SMTP id r17csp3898682vqy; Tue, 5 Dec 2023 21:41:13 -0800 (PST) X-Google-Smtp-Source: AGHT+IFRmmb/B9KHZpRTWgnRHzmhKBRw7UY47k6CT+7KNngiJKCAxKddstiN4aId+QojlIvJGNEN X-Received: by 2002:a05:6358:7e12:b0:170:53d4:71cc with SMTP id o18-20020a0563587e1200b0017053d471ccmr510936rwm.60.1701841272842; Tue, 05 Dec 2023 21:41:12 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1701841272; cv=none; d=google.com; s=arc-20160816; b=jS/DMoICbmo694c4DUm6rsL4ddCtnMbyWz0NgyjqtqR83YzVvGshP1mDcvXWwzH+bc oA3LN1/wEKGYh7oKOl139iatF8HTqYblQVKVVCo7/99zsDjEdHC6hNI/Aae4D3RVh2bO xciH0ql7JZCpYgyvOPTRmSxVwy6vkvrZRQfcArBJX0lFLrwYbTiYfRLv+krOhaF6NStM BHyArDoqrKDqIy5GD3f2F+HyKAMkUqWQyYl7zf8YTikQkzBSTkX+P9Zxbh8LF0GnQkrd KMAaPFFEbH9vb1yUWrAIQsDiM0BWq8/XGi/kqi8ssCY4yp2q1Hb2mbT3YX1lHGF0iI1k z9jw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:message-id:date:subject:cc:to:from :dkim-signature; bh=DSEsi6ha8d2Dap2LNtqekCrbHlg2RMsuNLxo/jOQbS4=; fh=Yw7ZIGrFxFXItwbvndCTcj+AhRcQ0jtIB0zibqWSKD4=; b=KErAWcNl1WqPX0HgMROslsc/UKQS+2liarHucm/E+sykGqS3jpg6khtrNd6DlI7Ks7 O0CXau2B6a1B1t3SInQY8UYuxjs1qR6DJf6ZGTHkN5/pDhszPK6iGkTdYxGBc3yuxqE3 Pdpt8TuF5hg0yFlNlXCwRVhPsgXgKwqtCq0FV01A7fa1NqIqc4sMMrAmmhrjHjdwCJy2 wZjcMhriH26xues4l5ZWhY518atDgh47tM56Bf/CCKLxgujWit55pV4pvskXs/tBatvV WH0P+BlIfV4n8Ou2xoyRjrzlaMylNHdsISHgKnhfZZPWI2wSx16rnYMThlHTH2QnX2h5 QJtg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=HUTmrx+n; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:2 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from agentk.vger.email (agentk.vger.email. [2620:137:e000::3:2]) by mx.google.com with ESMTPS id il6-20020a17090b164600b002747da1ef66si10946515pjb.53.2023.12.05.21.41.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 Dec 2023 21:41:12 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:2 as permitted sender) client-ip=2620:137:e000::3:2; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=HUTmrx+n; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:2 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by agentk.vger.email (Postfix) with ESMTP id E1C7C803FC18; Tue, 5 Dec 2023 21:41:08 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at agentk.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1376689AbjLFFk7 (ORCPT <rfc822;chrisfriedt@gmail.com> + 99 others); Wed, 6 Dec 2023 00:40:59 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55280 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230121AbjLFFk6 (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Wed, 6 Dec 2023 00:40:58 -0500 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 81522D3; Tue, 5 Dec 2023 21:41:04 -0800 (PST) Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 3B64lO5A014334; Wed, 6 Dec 2023 05:36:41 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id; s=qcppdkim1; bh=DSEsi6ha8d2Dap2LNtqekCrbHlg2RMsuNLxo/jOQbS4=; b=HUTmrx+ngT2R2pX+clnkwa8QshV9gvXuYR3aNBQeXdQF8XbjgpbyMIVpXZSYciofkhu/ tbjpvN8TycYCUtxIMRF8sw+ZFz/JroVzsHq+dVRecwhknQez72X50IU3o+xDOic7eU8K e1eeKnf9Awujf1tH1C8q3RNlB3ZmqSGkX/+14qhWue7N2T/ST7zCD5DAH6xSJ/uHykEp acyik2seAgNu/w74BVxkeDDWqnSr7GTBgbPQDSeCNz+iPSkF7hE34DD1KmrLRn/70v1Y ec+XmyLWb6GVfHDnWJhz2eJwPDkr4hZBRyIWT6A8UtynTmXds2A6ujn7sBUi8yesNfz/ Ng== Received: from apblrppmta02.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3utd1n0p7h-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 06 Dec 2023 05:36:40 +0000 Received: from pps.filterd (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTP id 3B65ablv009558; Wed, 6 Dec 2023 05:36:37 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTP id 3uqwnkryxu-1; Wed, 06 Dec 2023 05:36:37 +0000 Received: from APBLRPPMTA02.qualcomm.com (APBLRPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 3B65abDk009553; Wed, 6 Dec 2023 05:36:37 GMT Received: from hu-maiyas-hyd.qualcomm.com (hu-nitirawa-hyd.qualcomm.com [10.213.109.152]) by APBLRPPMTA02.qualcomm.com (PPS) with ESMTP id 3B65aaCt009552; Wed, 06 Dec 2023 05:36:37 +0000 Received: by hu-maiyas-hyd.qualcomm.com (Postfix, from userid 2342877) id C868D5000B1; Wed, 6 Dec 2023 11:06:35 +0530 (+0530) From: Nitin Rawat <quic_nitirawa@quicinc.com> To: "James E.J. Bottomley" <jejb@linux.ibm.com>, "Martin K. Petersen" <martin.petersen@oracle.com>, Matthias Brugger <matthias.bgg@gmail.com>, AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>, Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>, Manivannan Sadhasivam <mani@kernel.org> Cc: linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, quic_cang@quicinc.com, Nitin Rawat <quic_nitirawa@quicinc.com>, Manish Pandey <quic_mapa@quicinc.com> Subject: [PATCH V1] scsi: ufs: core: store min and max clk freq from OPP table Date: Wed, 6 Dec 2023 11:06:28 +0530 Message-Id: <20231206053628.32169-1-quic_nitirawa@quicinc.com> X-Mailer: git-send-email 2.17.1 X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: JcWSzxgYC0qjNSj5G2k8Q-T0vKclwx2B X-Proofpoint-GUID: JcWSzxgYC0qjNSj5G2k8Q-T0vKclwx2B X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-12-06_04,2023-12-05_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 lowpriorityscore=0 suspectscore=0 clxscore=1015 impostorscore=0 priorityscore=1501 adultscore=0 bulkscore=0 mlxscore=0 mlxlogscore=999 phishscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311290000 definitions=main-2312060045 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Tue, 05 Dec 2023 21:41:09 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1784509914119904408 X-GMAIL-MSGID: 1784509914119904408 |
Series |
[V1] scsi: ufs: core: store min and max clk freq from OPP table
|
|
Commit Message
Nitin Rawat
Dec. 6, 2023, 5:36 a.m. UTC
OPP support will make use of OPP table in device tree and removes freq-table-hz property from device tree. With OPP enabled in devicetree, clki->min_freq and clki->maxfreq currently is not getting updated and the value is set to 0. Soc vendors like qcom, mediatek uses clki->minfreq and clki->maxfreq in vendor specific file. These frequencies values are used to update vendor specific configurations. Since the value is 0, it is causing functional issue. Add code to store the min and max ufs clk frequency from OPP table. Fixes: 72208ebe181e ("scsi: ufs: core: Add support for parsing OPP") Co-developed-by: Manish Pandey <quic_mapa@quicinc.com> Signed-off-by: Manish Pandey <quic_mapa@quicinc.com> Signed-off-by: Nitin Rawat <quic_nitirawa@quicinc.com> --- drivers/ufs/host/ufshcd-pltfrm.c | 56 ++++++++++++++++++++++++++++++++ 1 file changed, 56 insertions(+) -- 2.17.1
Comments
On Wed, Dec 06, 2023 at 11:06:28AM +0530, Nitin Rawat wrote: > OPP support will make use of OPP table in device tree and removes > freq-table-hz property from device tree. > > With OPP enabled in devicetree, clki->min_freq and clki->maxfreq > currently is not getting updated and the value is set to 0. > > Soc vendors like qcom, mediatek uses clki->minfreq and clki->maxfreq > in vendor specific file. These frequencies values are used to update > vendor specific configurations. Since the value is 0, it is causing > functional issue. How about, "OPP support added by commit 72208ebe181e ("scsi: ufs: core: Add support for parsing OPP") doesn't update the min_freq and max_freq of each clocks in 'struct ufs_clk_info'. But these values are used by the vendor host drivers internally for controller configuration. When the OPP support is enabled in devicetree, these values will be 0, causing boot issues on the respective platforms. So let's parse the min_freq and max_freq of all clocks while parsing the OPP table." > > Add code to store the min and max ufs clk frequency from OPP table. > > Fixes: 72208ebe181e ("scsi: ufs: core: Add support for parsing OPP") > Co-developed-by: Manish Pandey <quic_mapa@quicinc.com> > Signed-off-by: Manish Pandey <quic_mapa@quicinc.com> > Signed-off-by: Nitin Rawat <quic_nitirawa@quicinc.com> > --- > drivers/ufs/host/ufshcd-pltfrm.c | 56 ++++++++++++++++++++++++++++++++ > 1 file changed, 56 insertions(+) > > diff --git a/drivers/ufs/host/ufshcd-pltfrm.c b/drivers/ufs/host/ufshcd-pltfrm.c > index da2558e274b4..12fa6f7d6a97 100644 > --- a/drivers/ufs/host/ufshcd-pltfrm.c > +++ b/drivers/ufs/host/ufshcd-pltfrm.c > @@ -13,6 +13,7 @@ > #include <linux/pm_opp.h> > #include <linux/pm_runtime.h> > #include <linux/of.h> > +#include <linux/clk.h> Sort includes alphabetically. > > #include <ufs/ufshcd.h> > #include "ufshcd-pltfrm.h" > @@ -213,6 +214,55 @@ static void ufshcd_init_lanes_per_dir(struct ufs_hba *hba) > } > } > > +/** > + * ufshcd_config_min_max_clk_freq - update min and max freq "ufshcd_parse_clock_min_max_freq - Parse MIN and MAX frequencies of clocks" > + * @hba: per adapter instance > + * > + * This function store min and max freq for all the clocks. > + * "This function parses MIN and MAX frequencies of all clocks required by the vendor host drivers." > + * Returns 0 for success and non-zero for failure > + */ > +static int ufshcd_config_min_max_clk_freq(struct ufs_hba *hba) > +{ > + struct list_head *head = &hba->clk_list_head; > + struct dev_pm_opp *opp; > + struct ufs_clk_info *clki; Please maintain reverse Xmas tree order. It's not a rule for this driver, but my own preference. > + unsigned long freq; > + u8 idx = 0; > + int ret; This won't be needed if all the return values are directly returned as I shared below. > + > + list_for_each_entry(clki, head, list) { > + if (!clki->name) > + continue; > + > + clki->clk = devm_clk_get(hba->dev, clki->name); > + if (!IS_ERR_OR_NULL(clki->clk)) { This function won't return NULL, so IS_ERR() is sufficient. > + /* Find Max Freq */ > + freq = ULONG_MAX; > + opp = dev_pm_opp_find_freq_floor_indexed(hba->dev, &freq, idx); Use idx++ and get rid of the increment at the end of the 'if' condition. > + if (IS_ERR(opp)) { > + dev_err(hba->dev, "failed to find dev_pm_opp\n"); "Failed to find OPP for MAX frequency" > + ret = PTR_ERR(opp); return PTR_ERR(opp); > + return ret; > + } > + clki->max_freq = dev_pm_opp_get_freq_indexed(opp, idx); > + Missing dev_pm_opp_put() > + /* Find Min Freq */ > + freq = 0; > + opp = dev_pm_opp_find_freq_ceil_indexed(hba->dev, &freq, idx); > + if (IS_ERR(opp)) { > + dev_err(hba->dev, "failed to find dev_pm_opp\n"); "Failed to find OPP for MIN frequency" > + ret = PTR_ERR(opp); return PTR_ERR(opp); > + return ret; > + } > + clki->min_freq = dev_pm_opp_get_freq_indexed(opp, idx); Missing dev_pm_opp_put() > + idx++; > + } > + } > + > + return 0; > +} > + > static int ufshcd_parse_operating_points(struct ufs_hba *hba) > { > struct device *dev = hba->dev; > @@ -279,6 +329,12 @@ static int ufshcd_parse_operating_points(struct ufs_hba *hba) > return ret; > } > > + ret = ufshcd_config_min_max_clk_freq(hba); > + if (ret) { > + dev_err(dev, "Failed to get min max freq: %d\n", ret); Since we already print error message inside the function, no need to do the same here. - Mani > + return ret; > + } > + > hba->use_pm_opp = true; > > return 0; > -- > 2.17.1 >
On 12/6/2023 1:24 PM, Manivannan Sadhasivam wrote: > On Wed, Dec 06, 2023 at 11:06:28AM +0530, Nitin Rawat wrote: >> OPP support will make use of OPP table in device tree and removes >> freq-table-hz property from device tree. >> >> With OPP enabled in devicetree, clki->min_freq and clki->maxfreq >> currently is not getting updated and the value is set to 0. >> >> Soc vendors like qcom, mediatek uses clki->minfreq and clki->maxfreq >> in vendor specific file. These frequencies values are used to update >> vendor specific configurations. Since the value is 0, it is causing >> functional issue. > > How about, > > "OPP support added by commit 72208ebe181e ("scsi: ufs: core: Add support > for parsing OPP") doesn't update the min_freq and max_freq of each clocks > in 'struct ufs_clk_info'. > > But these values are used by the vendor host drivers internally for controller > configuration. When the OPP support is enabled in devicetree, these values will > be 0, causing boot issues on the respective platforms. > > So let's parse the min_freq and max_freq of all clocks while parsing the OPP > table." > >> >> Add code to store the min and max ufs clk frequency from OPP table. Sure. Will update in next patchset. >> >> Fixes: 72208ebe181e ("scsi: ufs: core: Add support for parsing OPP") >> Co-developed-by: Manish Pandey <quic_mapa@quicinc.com> >> Signed-off-by: Manish Pandey <quic_mapa@quicinc.com> >> Signed-off-by: Nitin Rawat <quic_nitirawa@quicinc.com> >> --- >> drivers/ufs/host/ufshcd-pltfrm.c | 56 ++++++++++++++++++++++++++++++++ >> 1 file changed, 56 insertions(+) >> >> diff --git a/drivers/ufs/host/ufshcd-pltfrm.c b/drivers/ufs/host/ufshcd-pltfrm.c >> index da2558e274b4..12fa6f7d6a97 100644 >> --- a/drivers/ufs/host/ufshcd-pltfrm.c >> +++ b/drivers/ufs/host/ufshcd-pltfrm.c >> @@ -13,6 +13,7 @@ >> #include <linux/pm_opp.h> >> #include <linux/pm_runtime.h> >> #include <linux/of.h> >> +#include <linux/clk.h> > > Sort includes alphabetically. Sure. Will update in next patchset > >> >> #include <ufs/ufshcd.h> >> #include "ufshcd-pltfrm.h" >> @@ -213,6 +214,55 @@ static void ufshcd_init_lanes_per_dir(struct ufs_hba *hba) >> } >> } >> >> +/** >> + * ufshcd_config_min_max_clk_freq - update min and max freq > > "ufshcd_parse_clock_min_max_freq - Parse MIN and MAX frequencies of clocks" > >> + * @hba: per adapter instance >> + * >> + * This function store min and max freq for all the clocks. >> + * > > "This function parses MIN and MAX frequencies of all clocks required by the > vendor host drivers." > >> + * Returns 0 for success and non-zero for failure >> + */ >> +static int ufshcd_config_min_max_clk_freq(struct ufs_hba *hba) >> +{ >> + struct list_head *head = &hba->clk_list_head; >> + struct dev_pm_opp *opp; >> + struct ufs_clk_info *clki; > > Please maintain reverse Xmas tree order. It's not a rule for this driver, but my > own preference. > >> + unsigned long freq; >> + u8 idx = 0; >> + int ret; > > This won't be needed if all the return values are directly returned as I shared > below. Will Addressed all ret comments in next patchset. > >> + >> + list_for_each_entry(clki, head, list) { >> + if (!clki->name) >> + continue; >> + >> + clki->clk = devm_clk_get(hba->dev, clki->name); >> + if (!IS_ERR_OR_NULL(clki->clk)) { > > This function won't return NULL, so IS_ERR() is sufficient. > >> + /* Find Max Freq */ >> + freq = ULONG_MAX; >> + opp = dev_pm_opp_find_freq_floor_indexed(hba->dev, &freq, idx); > > Use idx++ and get rid of the increment at the end of the 'if' condition. If we increment idx++ here, dev_pm_opp_find_freq_ceil_indexed will use incremented idx which is not correct. Hence i added at end after both the call. > >> + if (IS_ERR(opp)) { >> + dev_err(hba->dev, "failed to find dev_pm_opp\n"); > > "Failed to find OPP for MAX frequency" > >> + ret = PTR_ERR(opp); > > return PTR_ERR(opp); > >> + return ret; >> + } >> + clki->max_freq = dev_pm_opp_get_freq_indexed(opp, idx); >> + > > Missing dev_pm_opp_put() Thanks. Will update in next patchset. > >> + /* Find Min Freq */ >> + freq = 0; >> + opp = dev_pm_opp_find_freq_ceil_indexed(hba->dev, &freq, idx); >> + if (IS_ERR(opp)) { >> + dev_err(hba->dev, "failed to find dev_pm_opp\n"); > > "Failed to find OPP for MIN frequency" > >> + ret = PTR_ERR(opp); > > return PTR_ERR(opp); > >> + return ret; >> + } >> + clki->min_freq = dev_pm_opp_get_freq_indexed(opp, idx); > > Missing dev_pm_opp_put() > >> + idx++; >> + } >> + } >> + >> + return 0; >> +} >> + >> static int ufshcd_parse_operating_points(struct ufs_hba *hba) >> { >> struct device *dev = hba->dev; >> @@ -279,6 +329,12 @@ static int ufshcd_parse_operating_points(struct ufs_hba *hba) >> return ret; >> } >> >> + ret = ufshcd_config_min_max_clk_freq(hba); >> + if (ret) { >> + dev_err(dev, "Failed to get min max freq: %d\n", ret); > > Since we already print error message inside the function, no need to do the same > here. Sure. Will update in next patchset > > - Mani > >> + return ret; >> + } >> + >> hba->use_pm_opp = true; >> >> return 0; >> -- >> 2.17.1 >> > Thanks, Nitin
On Wed, Dec 06, 2023 at 04:35:24PM +0530, Nitin Rawat wrote: > > > On 12/6/2023 1:24 PM, Manivannan Sadhasivam wrote: > > On Wed, Dec 06, 2023 at 11:06:28AM +0530, Nitin Rawat wrote: > > > OPP support will make use of OPP table in device tree and removes > > > freq-table-hz property from device tree. > > > > > > With OPP enabled in devicetree, clki->min_freq and clki->maxfreq > > > currently is not getting updated and the value is set to 0. > > > > > > Soc vendors like qcom, mediatek uses clki->minfreq and clki->maxfreq > > > in vendor specific file. These frequencies values are used to update > > > vendor specific configurations. Since the value is 0, it is causing > > > functional issue. > > > > How about, > > > > "OPP support added by commit 72208ebe181e ("scsi: ufs: core: Add support > > for parsing OPP") doesn't update the min_freq and max_freq of each clocks > > in 'struct ufs_clk_info'. > > > > But these values are used by the vendor host drivers internally for controller > > configuration. When the OPP support is enabled in devicetree, these values will > > be 0, causing boot issues on the respective platforms. > > > > So let's parse the min_freq and max_freq of all clocks while parsing the OPP > > table." > > > > > > > > Add code to store the min and max ufs clk frequency from OPP table. > > Sure. Will update in next patchset. > > > > > > > Fixes: 72208ebe181e ("scsi: ufs: core: Add support for parsing OPP") > > > Co-developed-by: Manish Pandey <quic_mapa@quicinc.com> > > > Signed-off-by: Manish Pandey <quic_mapa@quicinc.com> > > > Signed-off-by: Nitin Rawat <quic_nitirawa@quicinc.com> > > > --- > > > drivers/ufs/host/ufshcd-pltfrm.c | 56 ++++++++++++++++++++++++++++++++ > > > 1 file changed, 56 insertions(+) > > > > > > diff --git a/drivers/ufs/host/ufshcd-pltfrm.c b/drivers/ufs/host/ufshcd-pltfrm.c > > > index da2558e274b4..12fa6f7d6a97 100644 > > > --- a/drivers/ufs/host/ufshcd-pltfrm.c > > > +++ b/drivers/ufs/host/ufshcd-pltfrm.c > > > @@ -13,6 +13,7 @@ > > > #include <linux/pm_opp.h> > > > #include <linux/pm_runtime.h> > > > #include <linux/of.h> > > > +#include <linux/clk.h> > > > > Sort includes alphabetically. > > Sure. Will update in next patchset > > > > > > > > > #include <ufs/ufshcd.h> > > > #include "ufshcd-pltfrm.h" > > > @@ -213,6 +214,55 @@ static void ufshcd_init_lanes_per_dir(struct ufs_hba *hba) > > > } > > > } > > > > > > +/** > > > + * ufshcd_config_min_max_clk_freq - update min and max freq > > > > "ufshcd_parse_clock_min_max_freq - Parse MIN and MAX frequencies of clocks" > > > > > + * @hba: per adapter instance > > > + * > > > + * This function store min and max freq for all the clocks. > > > + * > > > > "This function parses MIN and MAX frequencies of all clocks required by the > > vendor host drivers." > > > > > + * Returns 0 for success and non-zero for failure > > > + */ > > > +static int ufshcd_config_min_max_clk_freq(struct ufs_hba *hba) > > > +{ > > > + struct list_head *head = &hba->clk_list_head; > > > + struct dev_pm_opp *opp; > > > + struct ufs_clk_info *clki; > > > > Please maintain reverse Xmas tree order. It's not a rule for this driver, but my > > own preference. > > > > > + unsigned long freq; > > > + u8 idx = 0; > > > + int ret; > > > > This won't be needed if all the return values are directly returned as I shared > > below. > > > Will Addressed all ret comments in next patchset. > > > > > + > > > + list_for_each_entry(clki, head, list) { > > > + if (!clki->name) > > > + continue; > > > + > > > + clki->clk = devm_clk_get(hba->dev, clki->name); > > > + if (!IS_ERR_OR_NULL(clki->clk)) { > > > > This function won't return NULL, so IS_ERR() is sufficient. > > > > > + /* Find Max Freq */ > > > + freq = ULONG_MAX; > > > + opp = dev_pm_opp_find_freq_floor_indexed(hba->dev, &freq, idx); > > > > Use idx++ and get rid of the increment at the end of the 'if' condition. > > If we increment idx++ here, dev_pm_opp_find_freq_ceil_indexed will use > incremented idx which is not correct. Hence i added at end after both the > call. Ah, right. Please increment it in dev_pm_opp_find_freq_ceil_indexed() instead. - Mani
On Wed, Dec 06, 2023 at 01:24:47PM +0530, Manivannan Sadhasivam wrote: > But these values are used by the vendor host drivers internally for controller > configuration. When the OPP support is enabled in devicetree, these values will There is no such thing as a "vendor" driver.
diff --git a/drivers/ufs/host/ufshcd-pltfrm.c b/drivers/ufs/host/ufshcd-pltfrm.c index da2558e274b4..12fa6f7d6a97 100644 --- a/drivers/ufs/host/ufshcd-pltfrm.c +++ b/drivers/ufs/host/ufshcd-pltfrm.c @@ -13,6 +13,7 @@ #include <linux/pm_opp.h> #include <linux/pm_runtime.h> #include <linux/of.h> +#include <linux/clk.h> #include <ufs/ufshcd.h> #include "ufshcd-pltfrm.h" @@ -213,6 +214,55 @@ static void ufshcd_init_lanes_per_dir(struct ufs_hba *hba) } } +/** + * ufshcd_config_min_max_clk_freq - update min and max freq + * @hba: per adapter instance + * + * This function store min and max freq for all the clocks. + * + * Returns 0 for success and non-zero for failure + */ +static int ufshcd_config_min_max_clk_freq(struct ufs_hba *hba) +{ + struct list_head *head = &hba->clk_list_head; + struct dev_pm_opp *opp; + struct ufs_clk_info *clki; + unsigned long freq; + u8 idx = 0; + int ret; + + list_for_each_entry(clki, head, list) { + if (!clki->name) + continue; + + clki->clk = devm_clk_get(hba->dev, clki->name); + if (!IS_ERR_OR_NULL(clki->clk)) { + /* Find Max Freq */ + freq = ULONG_MAX; + opp = dev_pm_opp_find_freq_floor_indexed(hba->dev, &freq, idx); + if (IS_ERR(opp)) { + dev_err(hba->dev, "failed to find dev_pm_opp\n"); + ret = PTR_ERR(opp); + return ret; + } + clki->max_freq = dev_pm_opp_get_freq_indexed(opp, idx); + + /* Find Min Freq */ + freq = 0; + opp = dev_pm_opp_find_freq_ceil_indexed(hba->dev, &freq, idx); + if (IS_ERR(opp)) { + dev_err(hba->dev, "failed to find dev_pm_opp\n"); + ret = PTR_ERR(opp); + return ret; + } + clki->min_freq = dev_pm_opp_get_freq_indexed(opp, idx); + idx++; + } + } + + return 0; +} + static int ufshcd_parse_operating_points(struct ufs_hba *hba) { struct device *dev = hba->dev; @@ -279,6 +329,12 @@ static int ufshcd_parse_operating_points(struct ufs_hba *hba) return ret; } + ret = ufshcd_config_min_max_clk_freq(hba); + if (ret) { + dev_err(dev, "Failed to get min max freq: %d\n", ret); + return ret; + } + hba->use_pm_opp = true; return 0;