[08/15] tty: serial: qcom-geni-serial: split out the FIFO tx code
Commit Message
From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
qcom_geni_serial_handle_tx() is pretty big, let's move the code that
handles the actual writing of data to a separate function which makes
sense in preparation for introducing a dma variant of handle_tx().
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
---
drivers/tty/serial/qcom_geni_serial.c | 60 +++++++++++++++------------
1 file changed, 33 insertions(+), 27 deletions(-)
Comments
On 18/11/2022 13:25, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
>
> qcom_geni_serial_handle_tx() is pretty big, let's move the code that
> handles the actual writing of data to a separate function which makes
> sense in preparation for introducing a dma variant of handle_tx().
>
> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Konrad
> drivers/tty/serial/qcom_geni_serial.c | 60 +++++++++++++++------------
> 1 file changed, 33 insertions(+), 27 deletions(-)
>
> diff --git a/drivers/tty/serial/qcom_geni_serial.c b/drivers/tty/serial/qcom_geni_serial.c
> index 39041538e5d2..4b155ca0ac74 100644
> --- a/drivers/tty/serial/qcom_geni_serial.c
> +++ b/drivers/tty/serial/qcom_geni_serial.c
> @@ -701,19 +701,48 @@ static void qcom_geni_serial_start_rx(struct uart_port *uport)
> writel(irq_en, uport->membase + SE_GENI_M_IRQ_EN);
> }
>
> +static int qcom_geni_serial_send_chunk_fifo(struct uart_port *uport,
> + unsigned int chunk)
> +{
> + struct qcom_geni_serial_port *port = to_dev_port(uport);
> + struct circ_buf *xmit = &uport->state->xmit;
> + size_t remaining = chunk;
> + int i, tail = xmit->tail;
> +
> + for (i = 0; i < chunk; ) {
> + unsigned int tx_bytes;
> + u8 buf[sizeof(u32)];
> + int c;
> +
> + memset(buf, 0, sizeof(buf));
> + tx_bytes = min_t(size_t, remaining, BYTES_PER_FIFO_WORD);
> +
> + for (c = 0; c < tx_bytes ; c++) {
> + buf[c] = xmit->buf[tail++];
> + tail &= UART_XMIT_SIZE - 1;
> + }
> +
> + iowrite32_rep(uport->membase + SE_GENI_TX_FIFOn, buf, 1);
> +
> + i += tx_bytes;
> + uport->icount.tx += tx_bytes;
> + remaining -= tx_bytes;
> + port->tx_remaining -= tx_bytes;
> + }
> +
> + return tail;
> +}
> +
> static void qcom_geni_serial_handle_tx(struct uart_port *uport, bool done,
> bool active)
> {
> struct qcom_geni_serial_port *port = to_dev_port(uport);
> struct circ_buf *xmit = &uport->state->xmit;
> size_t avail;
> - size_t remaining;
> size_t pending;
> - int i;
> u32 status;
> u32 irq_en;
> unsigned int chunk;
> - int tail;
>
> status = readl(uport->membase + SE_GENI_TX_FIFO_STATUS);
>
> @@ -732,7 +761,6 @@ static void qcom_geni_serial_handle_tx(struct uart_port *uport, bool done,
> avail = port->tx_fifo_depth - (status & TX_FIFO_WC);
> avail *= BYTES_PER_FIFO_WORD;
>
> - tail = xmit->tail;
> chunk = min(avail, pending);
> if (!chunk)
> goto out_write_wakeup;
> @@ -747,29 +775,7 @@ static void qcom_geni_serial_handle_tx(struct uart_port *uport, bool done,
> uport->membase + SE_GENI_M_IRQ_EN);
> }
>
> - remaining = chunk;
> - for (i = 0; i < chunk; ) {
> - unsigned int tx_bytes;
> - u8 buf[sizeof(u32)];
> - int c;
> -
> - memset(buf, 0, sizeof(buf));
> - tx_bytes = min_t(size_t, remaining, BYTES_PER_FIFO_WORD);
> -
> - for (c = 0; c < tx_bytes ; c++) {
> - buf[c] = xmit->buf[tail++];
> - tail &= UART_XMIT_SIZE - 1;
> - }
> -
> - iowrite32_rep(uport->membase + SE_GENI_TX_FIFOn, buf, 1);
> -
> - i += tx_bytes;
> - uport->icount.tx += tx_bytes;
> - remaining -= tx_bytes;
> - port->tx_remaining -= tx_bytes;
> - }
> -
> - xmit->tail = tail;
> + xmit->tail = qcom_geni_serial_send_chunk_fifo(uport, chunk);
>
> /*
> * The tx fifo watermark is level triggered and latched. Though we had
On Fri, 18 Nov 2022, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
>
> qcom_geni_serial_handle_tx() is pretty big, let's move the code that
> handles the actual writing of data to a separate function which makes
> sense in preparation for introducing a dma variant of handle_tx().
>
> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
> ---
> drivers/tty/serial/qcom_geni_serial.c | 60 +++++++++++++++------------
> 1 file changed, 33 insertions(+), 27 deletions(-)
>
> diff --git a/drivers/tty/serial/qcom_geni_serial.c b/drivers/tty/serial/qcom_geni_serial.c
> index 39041538e5d2..4b155ca0ac74 100644
> --- a/drivers/tty/serial/qcom_geni_serial.c
> +++ b/drivers/tty/serial/qcom_geni_serial.c
> @@ -701,19 +701,48 @@ static void qcom_geni_serial_start_rx(struct uart_port *uport)
> writel(irq_en, uport->membase + SE_GENI_M_IRQ_EN);
> }
>
> +static int qcom_geni_serial_send_chunk_fifo(struct uart_port *uport,
> + unsigned int chunk)
> +{
Some of the comments I have for this function you might want to implement
in a different patch than this simple move to own function.
> + struct qcom_geni_serial_port *port = to_dev_port(uport);
> + struct circ_buf *xmit = &uport->state->xmit;
> + size_t remaining = chunk;
> + int i, tail = xmit->tail;
Why there's remaining and i variables, both seem to provide a chunk sized
limit? Couldn't one be dropped?
You could drop local tail handling, it doesn't seem to add much value.
> + for (i = 0; i < chunk; ) {
> + unsigned int tx_bytes;
> + u8 buf[sizeof(u32)];
> + int c;
> +
> + memset(buf, 0, sizeof(buf));
> + tx_bytes = min_t(size_t, remaining, BYTES_PER_FIFO_WORD);
It's a bit confusing to mix sizeof(u32) and BYTES_PER_FIFO_WORD for the
same purpose, no?
> + for (c = 0; c < tx_bytes ; c++) {
> + buf[c] = xmit->buf[tail++];
> + tail &= UART_XMIT_SIZE - 1;
If you drop the local tail, this becomes:
buf[c] = xmit->buf[xmit->tail];
uart_xmit_advance(uport, 1);
> + }
> +
> + iowrite32_rep(uport->membase + SE_GENI_TX_FIFOn, buf, 1);
> +
> + i += tx_bytes;
> + uport->icount.tx += tx_bytes;
With uart_xmit_advance, this is to be dropped.
> + remaining -= tx_bytes;
> + port->tx_remaining -= tx_bytes;
> + }
> +
> + return tail;
> +}
> +
> static void qcom_geni_serial_handle_tx(struct uart_port *uport, bool done,
> bool active)
> {
> struct qcom_geni_serial_port *port = to_dev_port(uport);
> struct circ_buf *xmit = &uport->state->xmit;
> size_t avail;
> - size_t remaining;
> size_t pending;
> - int i;
> u32 status;
> u32 irq_en;
> unsigned int chunk;
> - int tail;
>
> status = readl(uport->membase + SE_GENI_TX_FIFO_STATUS);
>
> @@ -732,7 +761,6 @@ static void qcom_geni_serial_handle_tx(struct uart_port *uport, bool done,
> avail = port->tx_fifo_depth - (status & TX_FIFO_WC);
> avail *= BYTES_PER_FIFO_WORD;
>
> - tail = xmit->tail;
> chunk = min(avail, pending);
> if (!chunk)
> goto out_write_wakeup;
> @@ -747,29 +775,7 @@ static void qcom_geni_serial_handle_tx(struct uart_port *uport, bool done,
> uport->membase + SE_GENI_M_IRQ_EN);
> }
>
> - remaining = chunk;
> - for (i = 0; i < chunk; ) {
> - unsigned int tx_bytes;
> - u8 buf[sizeof(u32)];
> - int c;
> -
> - memset(buf, 0, sizeof(buf));
> - tx_bytes = min_t(size_t, remaining, BYTES_PER_FIFO_WORD);
> -
> - for (c = 0; c < tx_bytes ; c++) {
> - buf[c] = xmit->buf[tail++];
> - tail &= UART_XMIT_SIZE - 1;
> - }
> -
> - iowrite32_rep(uport->membase + SE_GENI_TX_FIFOn, buf, 1);
> -
> - i += tx_bytes;
> - uport->icount.tx += tx_bytes;
> - remaining -= tx_bytes;
> - port->tx_remaining -= tx_bytes;
> - }
> -
> - xmit->tail = tail;
> + xmit->tail = qcom_geni_serial_send_chunk_fifo(uport, chunk);
Why you want to assign to xmit->tail here?
>
> /*
> * The tx fifo watermark is level triggered and latched. Though we had
>
@@ -701,19 +701,48 @@ static void qcom_geni_serial_start_rx(struct uart_port *uport)
writel(irq_en, uport->membase + SE_GENI_M_IRQ_EN);
}
+static int qcom_geni_serial_send_chunk_fifo(struct uart_port *uport,
+ unsigned int chunk)
+{
+ struct qcom_geni_serial_port *port = to_dev_port(uport);
+ struct circ_buf *xmit = &uport->state->xmit;
+ size_t remaining = chunk;
+ int i, tail = xmit->tail;
+
+ for (i = 0; i < chunk; ) {
+ unsigned int tx_bytes;
+ u8 buf[sizeof(u32)];
+ int c;
+
+ memset(buf, 0, sizeof(buf));
+ tx_bytes = min_t(size_t, remaining, BYTES_PER_FIFO_WORD);
+
+ for (c = 0; c < tx_bytes ; c++) {
+ buf[c] = xmit->buf[tail++];
+ tail &= UART_XMIT_SIZE - 1;
+ }
+
+ iowrite32_rep(uport->membase + SE_GENI_TX_FIFOn, buf, 1);
+
+ i += tx_bytes;
+ uport->icount.tx += tx_bytes;
+ remaining -= tx_bytes;
+ port->tx_remaining -= tx_bytes;
+ }
+
+ return tail;
+}
+
static void qcom_geni_serial_handle_tx(struct uart_port *uport, bool done,
bool active)
{
struct qcom_geni_serial_port *port = to_dev_port(uport);
struct circ_buf *xmit = &uport->state->xmit;
size_t avail;
- size_t remaining;
size_t pending;
- int i;
u32 status;
u32 irq_en;
unsigned int chunk;
- int tail;
status = readl(uport->membase + SE_GENI_TX_FIFO_STATUS);
@@ -732,7 +761,6 @@ static void qcom_geni_serial_handle_tx(struct uart_port *uport, bool done,
avail = port->tx_fifo_depth - (status & TX_FIFO_WC);
avail *= BYTES_PER_FIFO_WORD;
- tail = xmit->tail;
chunk = min(avail, pending);
if (!chunk)
goto out_write_wakeup;
@@ -747,29 +775,7 @@ static void qcom_geni_serial_handle_tx(struct uart_port *uport, bool done,
uport->membase + SE_GENI_M_IRQ_EN);
}
- remaining = chunk;
- for (i = 0; i < chunk; ) {
- unsigned int tx_bytes;
- u8 buf[sizeof(u32)];
- int c;
-
- memset(buf, 0, sizeof(buf));
- tx_bytes = min_t(size_t, remaining, BYTES_PER_FIFO_WORD);
-
- for (c = 0; c < tx_bytes ; c++) {
- buf[c] = xmit->buf[tail++];
- tail &= UART_XMIT_SIZE - 1;
- }
-
- iowrite32_rep(uport->membase + SE_GENI_TX_FIFOn, buf, 1);
-
- i += tx_bytes;
- uport->icount.tx += tx_bytes;
- remaining -= tx_bytes;
- port->tx_remaining -= tx_bytes;
- }
-
- xmit->tail = tail;
+ xmit->tail = qcom_geni_serial_send_chunk_fifo(uport, chunk);
/*
* The tx fifo watermark is level triggered and latched. Though we had