diff mbox series

opcodes/riscv: style csr names as registers

Message ID 20221003101328.1790113-1-aburgess@redhat.com
State Accepted, archived
Headers
Series opcodes/riscv: style csr names as registers |

Checks

Context Check Description
snail/binutils-gdb-check success Github commit url

Commit Message

Andrew Burgess Oct. 3, 2022, 10:13 a.m. UTC 
  While reviewing another patch I noticed that RISC-V CSR names are
given the text style, not the register style.  This patch fixes this
mistake.
---
 opcodes/riscv-dis.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

Comments

Tsukasa OI Oct. 3, 2022, 10:52 a.m. UTC | #1 
On 2022/10/03 19:13, Andrew Burgess via Binutils wrote:
> While reviewing another patch I noticed that RISC-V CSR names are
> given the text style, not the register style.  This patch fixes this
> mistake.

LGTM, from the author of "another patch".

I felt it's not obvious as the rest and did not include in the first
batch of my patchset.  But I can definitely say that it is worth
discussing about it and I agree with the change.

Thanks,
Tsukasa

> ---
>  opcodes/riscv-dis.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c
> index 6ac69490b78..031c19334fa 100644
> --- a/opcodes/riscv-dis.c
> +++ b/opcodes/riscv-dis.c
> @@ -547,7 +547,8 @@ print_insn_args (const char *oparg, insn_t l, bfd_vma pc, disassemble_info *info
>  	      }
>  
>  	    if (riscv_csr_hash[csr] != NULL)
> -	      print (info->stream, dis_style_text, "%s", riscv_csr_hash[csr]);
> +	      print (info->stream, dis_style_register, "%s",
> +		     riscv_csr_hash[csr]);
>  	    else
>  	      print (info->stream, dis_style_text, "0x%x", csr);
>  	    break;
Nelson Chu Oct. 4, 2022, 1:10 a.m. UTC | #2 
Please commit, thanks.

Nelson

On Mon, Oct 3, 2022 at 6:14 PM Andrew Burgess via Binutils
<binutils@sourceware.org> wrote:
>
> While reviewing another patch I noticed that RISC-V CSR names are
> given the text style, not the register style.  This patch fixes this
> mistake.
> ---
>  opcodes/riscv-dis.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c
> index 6ac69490b78..031c19334fa 100644
> --- a/opcodes/riscv-dis.c
> +++ b/opcodes/riscv-dis.c
> @@ -547,7 +547,8 @@ print_insn_args (const char *oparg, insn_t l, bfd_vma pc, disassemble_info *info
>               }
>
>             if (riscv_csr_hash[csr] != NULL)
> -             print (info->stream, dis_style_text, "%s", riscv_csr_hash[csr]);
> +             print (info->stream, dis_style_register, "%s",
> +                    riscv_csr_hash[csr]);
>             else
>               print (info->stream, dis_style_text, "0x%x", csr);
>             break;
> --
> 2.25.4
>
Andrew Burgess Oct. 4, 2022, 8:53 a.m. UTC | #3 
Nelson Chu <nelson@rivosinc.com> writes:

> Please commit, thanks.
>

Pushed.

Thanks,
Andrew

> Nelson
>
> On Mon, Oct 3, 2022 at 6:14 PM Andrew Burgess via Binutils
> <binutils@sourceware.org> wrote:
>>
>> While reviewing another patch I noticed that RISC-V CSR names are
>> given the text style, not the register style.  This patch fixes this
>> mistake.
>> ---
>>  opcodes/riscv-dis.c | 3 ++-
>>  1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c
>> index 6ac69490b78..031c19334fa 100644
>> --- a/opcodes/riscv-dis.c
>> +++ b/opcodes/riscv-dis.c
>> @@ -547,7 +547,8 @@ print_insn_args (const char *oparg, insn_t l, bfd_vma pc, disassemble_info *info
>>               }
>>
>>             if (riscv_csr_hash[csr] != NULL)
>> -             print (info->stream, dis_style_text, "%s", riscv_csr_hash[csr]);
>> +             print (info->stream, dis_style_register, "%s",
>> +                    riscv_csr_hash[csr]);
>>             else
>>               print (info->stream, dis_style_text, "0x%x", csr);
>>             break;
>> --
>> 2.25.4
>>
diff mbox series

Patch

diff --git a/opcodes/riscv-dis.c b/opcodes/riscv-dis.c
index 6ac69490b78..031c19334fa 100644
--- a/opcodes/riscv-dis.c
+++ b/opcodes/riscv-dis.c
@@ -547,7 +547,8 @@  print_insn_args (const char *oparg, insn_t l, bfd_vma pc, disassemble_info *info
 	      }
 
 	    if (riscv_csr_hash[csr] != NULL)
-	      print (info->stream, dis_style_text, "%s", riscv_csr_hash[csr]);
+	      print (info->stream, dis_style_register, "%s",
+		     riscv_csr_hash[csr]);
 	    else
 	      print (info->stream, dis_style_text, "0x%x", csr);
 	    break;