[v2,20/21] MIPS: generic: Add support for Mobileye EyeQ5
Commit Message
Introduce support for the MIPS based Mobileye EyeQ5 SoCs.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
---
arch/mips/configs/generic/board-eyeq5.config | 43 ++++++++++++++++++++
arch/mips/generic/Kconfig | 15 +++++++
arch/mips/generic/Platform | 2 +
arch/mips/generic/board-epm5.its.S | 24 +++++++++++
4 files changed, 84 insertions(+)
create mode 100644 arch/mips/configs/generic/board-eyeq5.config
create mode 100644 arch/mips/generic/board-epm5.its.S
Comments
在2023年11月23日十一月 下午3:26,Gregory CLEMENT写道:
> Introduce support for the MIPS based Mobileye EyeQ5 SoCs.
>
> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
> ---
[...]
> diff --git a/arch/mips/generic/Kconfig b/arch/mips/generic/Kconfig
> index 7dc5b3821cc6e..04e1fc6f789b5 100644
> --- a/arch/mips/generic/Kconfig
> +++ b/arch/mips/generic/Kconfig
> @@ -48,6 +48,13 @@ config SOC_VCOREIII
> config MSCC_OCELOT
> bool
>
> +config SOC_EYEQ5
> + select ARM_AMBA
> + select WEAK_ORDERING
> + select WEAK_REORDERING_BEYOND_LLSC
> + select PHYSICAL_START_BOOL
> + bool
^ I believe WEAK_ORDERING is already selected by MIPS_CPS,
and WEAK_REORDERING_BEYOND_LLSC should be selected by MIPS_CPS as well.
Thanks
"Jiaxun Yang" <jiaxun.yang@flygoat.com> writes:
> 在2023年11月23日十一月 下午3:26,Gregory CLEMENT写道:
>> Introduce support for the MIPS based Mobileye EyeQ5 SoCs.
>>
>> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
>> ---
> [...]
>> diff --git a/arch/mips/generic/Kconfig b/arch/mips/generic/Kconfig
>> index 7dc5b3821cc6e..04e1fc6f789b5 100644
>> --- a/arch/mips/generic/Kconfig
>> +++ b/arch/mips/generic/Kconfig
>> @@ -48,6 +48,13 @@ config SOC_VCOREIII
>> config MSCC_OCELOT
>> bool
>>
>> +config SOC_EYEQ5
>> + select ARM_AMBA
>> + select WEAK_ORDERING
>> + select WEAK_REORDERING_BEYOND_LLSC
>> + select PHYSICAL_START_BOOL
>> + bool
>
> ^ I believe WEAK_ORDERING is already selected by MIPS_CPS,
But MIPS_CPS can be disabled: it is not selected by
MIPS_GENERIC_KERNEL.
> and WEAK_REORDERING_BEYOND_LLSC should be selected by MIPS_CPS as well.
WEAK_REORDERING_BEYOND_LLSC is only selected by CPU_LOONGSON64 for
now not by MIPS_CPS
Thanks,
Gregory
>
> Thanks
> --
> - Jiaxun
在2023年12月1日十二月 上午10:34,Gregory CLEMENT写道:
> "Jiaxun Yang" <jiaxun.yang@flygoat.com> writes:
>
>> 在2023年11月23日十一月 下午3:26,Gregory CLEMENT写道:
>>> Introduce support for the MIPS based Mobileye EyeQ5 SoCs.
>>>
>>> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
>>> ---
>> [...]
>>> diff --git a/arch/mips/generic/Kconfig b/arch/mips/generic/Kconfig
>>> index 7dc5b3821cc6e..04e1fc6f789b5 100644
>>> --- a/arch/mips/generic/Kconfig
>>> +++ b/arch/mips/generic/Kconfig
>>> @@ -48,6 +48,13 @@ config SOC_VCOREIII
>>> config MSCC_OCELOT
>>> bool
>>>
>>> +config SOC_EYEQ5
>>> + select ARM_AMBA
>>> + select WEAK_ORDERING
>>> + select WEAK_REORDERING_BEYOND_LLSC
>>> + select PHYSICAL_START_BOOL
>>> + bool
>>
>> ^ I believe WEAK_ORDERING is already selected by MIPS_CPS,
>
> But MIPS_CPS can be disabled: it is not selected by
> MIPS_GENERIC_KERNEL.
IMO if MIPS_CPS is not select then there is no SMP support on this platform.
WEAK_ORDERING only make sense for SMP system.
>
>> and WEAK_REORDERING_BEYOND_LLSC should be selected by MIPS_CPS as well.
>
> WEAK_REORDERING_BEYOND_LLSC is only selected by CPU_LOONGSON64 for
> now not by MIPS_CPS
I believe this applies to all SMP cores from MTI, I'll check with hardware
folks.
Thanks
- Jiaxun
>
> Thanks,
>
> Gregory
>>
>> Thanks
>> --
>> - Jiaxun
>
> --
> Gregory Clement, Bootlin
> Embedded Linux and Kernel engineering
> http://bootlin.com
new file mode 100644
@@ -0,0 +1,43 @@
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_TASKSTATS=y
+CONFIG_FIT_IMAGE_FDT_EPM5=y
+CONFIG_BOARD_EYEQ5=y
+CONFIG_USE_XKPHYS=y
+CONFIG_PHYSICAL_START=0xa800000808000000
+CONFIG_ZBOOT_LOAD_ADDRESS=0xA800000080480000
+CONFIG_CPU_HAS_MSA=y
+CONFIG_NET_KEY=y
+CONFIG_CAN=y
+CONFIG_PCI=y
+CONFIG_PCI_MSI=y
+CONFIG_PCI_DEBUG=y
+CONFIG_PCI_ENDPOINT=y
+CONFIG_CONNECTOR=y
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_RAM=y
+CONFIG_MTD_ROM=y
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_PHYSMAP_OF=y
+CONFIG_MTD_BLOCK2MTD=y
+CONFIG_MTD_UBI=y
+CONFIG_MTD_UBI_BLOCK=y
+CONFIG_NETDEVICES=y
+CONFIG_MACVLAN=y
+CONFIG_IPVLAN=y
+CONFIG_MACB=y
+CONFIG_MARVELL_PHY=y
+CONFIG_MICREL_PHY=y
+CONFIG_CAN_M_CAN=y
+CONFIG_SERIAL_AMBA_PL011=y
+CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
+CONFIG_PINCTRL=y
+CONFIG_MMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_CADENCE=y
+CONFIG_RESET_CONTROLLER=y
+CONFIG_FANOTIFY=y
+CONFIG_ROMFS_FS=y
+CONFIG_ROMFS_BACKED_BY_BOTH=y
+CONFIG_PAGE_SIZE_16KB=y
\ No newline at end of file
@@ -48,6 +48,13 @@ config SOC_VCOREIII
config MSCC_OCELOT
bool
+config SOC_EYEQ5
+ select ARM_AMBA
+ select WEAK_ORDERING
+ select WEAK_REORDERING_BEYOND_LLSC
+ select PHYSICAL_START_BOOL
+ bool
+
comment "FIT/UHI Boards"
config FIT_IMAGE_FDT_BOSTON
@@ -124,4 +131,12 @@ config VIRT_BOARD_RANCHU
Android emulator. Android emulator is based on Qemu, and contains
the support for the same set of virtual devices.
+config FIT_IMAGE_FDT_EPM5
+ bool "Include FDT for Mobileye EyeQ5 development platforms"
+ select SOC_EYEQ5
+ default n
+ help
+ Enable this to include the FDT for the EyeQ5 development platforms
+ from Mobileye in the FIT kernel image.
+ This requires u-boot on the platform.
endif
@@ -24,3 +24,5 @@ its-$(CONFIG_FIT_IMAGE_FDT_JAGUAR2) += board-jaguar2.its.S
its-$(CONFIG_FIT_IMAGE_FDT_SERVAL) += board-serval.its.S
its-$(CONFIG_FIT_IMAGE_FDT_XILFPGA) += board-xilfpga.its.S
its-$(CONFIG_FIT_IMAGE_FDT_MARDUK) += board-marduk.its.S
+its-$(CONFIG_FIT_IMAGE_FDT_EPM5) += board-epm5.its.S
+
new file mode 100644
@@ -0,0 +1,24 @@
+/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
+/ {
+ images {
+ fdt-mobileye-epm5 {
+ description = "Mobileeye MP5 Device Tree";
+ data = /incbin/("boot/dts/mobileye/eyeq5-epm5.dtb");
+ type = "flat_dt";
+ arch = "mips";
+ compression = "none";
+ hash {
+ algo = "sha1";
+ };
+ };
+ };
+
+ configurations {
+ default = "conf-1";
+ conf-1 {
+ description = "Mobileye EPM5 Linux kernel";
+ kernel = "kernel";
+ fdt = "fdt-mobileye-epm5";
+ };
+ };
+};