Message ID | 20231127131651.476795-2-rui.zhang@intel.com |
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State | New |
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[23.128.96.32]) by mx.google.com with ESMTPS id s14-20020a056a00178e00b006cba6b43d88si10074567pfg.265.2023.11.27.05.17.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Nov 2023 05:17:25 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.32 as permitted sender) client-ip=23.128.96.32; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=Arx0+kEC; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.32 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by agentk.vger.email (Postfix) with ESMTP id ED8E0805E441; Mon, 27 Nov 2023 05:17:20 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at agentk.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233434AbjK0NRF (ORCPT <rfc822;toshivichauhan@gmail.com> + 99 others); Mon, 27 Nov 2023 08:17:05 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56914 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233371AbjK0NRD (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Mon, 27 Nov 2023 08:17:03 -0500 Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.88]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 693821A1; Mon, 27 Nov 2023 05:17:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1701091030; x=1732627030; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=hlesYW8rOy1XULs0ORzCaeEOdp4ntoGv7wHs6RrOTq4=; b=Arx0+kECHD7iU2ss0hRNKmOwUZNDhXuYU7O6+Arq95nIwECR5753Loiu jUJIHz3uBBrnlFytOYeyWLxjIT/dNiwFaSsmsWX02nY1PEjVbRQmjPg5a hFDyDZwrSX/IibocZxRF2hds0lvmU1yffwiQWonijwm/I0lMLnEfSoObz Hl0qjbMoVDG6M9YgyFfp1/f2oHMxj6xE930mAWLgyzORyl0TOHEqmzVCL hffvMvFSKG3bWwGm9dztS3p2u+UR4dVUdc/3iEDMHrYHpOLfTQKbb/Mdv Rfj/ao0Snuf+1is6mUBHFBQCBizNRmEc4EftyFulQhRCyMW9dI91j4hRP Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10906"; a="423833674" X-IronPort-AV: E=Sophos;i="6.04,230,1695711600"; d="scan'208";a="423833674" Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Nov 2023 05:17:10 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10906"; a="718031609" X-IronPort-AV: E=Sophos;i="6.04,230,1695711600"; d="scan'208";a="718031609" Received: from zhipengw-mobl1.ccr.corp.intel.com (HELO rzhang1-mobl7.ccr.corp.intel.com) ([10.255.29.237]) by orsmga003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Nov 2023 05:17:07 -0800 From: Zhang Rui <rui.zhang@intel.com> To: linux@roeck-us.net, jdelvare@suse.com Cc: fenghua.yu@intel.com, linux-hwmon@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/3] hwmon: (coretemp) Introduce enum for attr index Date: Mon, 27 Nov 2023 21:16:49 +0800 Message-Id: <20231127131651.476795-2-rui.zhang@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231127131651.476795-1-rui.zhang@intel.com> References: <20231127131651.476795-1-rui.zhang@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Mon, 27 Nov 2023 05:17:21 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1783723244523574275 X-GMAIL-MSGID: 1783723244523574275 |
Series |
hwmon: (coretemp) Fix core count limitation
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Commit Message
Zhang, Rui
Nov. 27, 2023, 1:16 p.m. UTC
Introduce enum coretemp_attr_index to better describe the index of each
sensor attribute and the maximum number of basic/possible attributes.
No functional change.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
---
drivers/hwmon/coretemp.c | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
Comments
On Mon, Nov 27, 2023 at 09:16:49PM +0800, Zhang Rui wrote: > Introduce enum coretemp_attr_index to better describe the index of each > sensor attribute and the maximum number of basic/possible attributes. > > No functional change. > > Signed-off-by: Zhang Rui <rui.zhang@intel.com> > --- > drivers/hwmon/coretemp.c | 12 ++++++++++-- > 1 file changed, 10 insertions(+), 2 deletions(-) > > diff --git a/drivers/hwmon/coretemp.c b/drivers/hwmon/coretemp.c > index ba82d1e79c13..6053ed3761c2 100644 > --- a/drivers/hwmon/coretemp.c > +++ b/drivers/hwmon/coretemp.c > @@ -43,10 +43,18 @@ MODULE_PARM_DESC(tjmax, "TjMax value in degrees Celsius"); > #define BASE_SYSFS_ATTR_NO 2 /* Sysfs Base attr no for coretemp */ > #define NUM_REAL_CORES 128 /* Number of Real cores per cpu */ > #define CORETEMP_NAME_LENGTH 28 /* String Length of attrs */ > -#define MAX_CORE_ATTRS 4 /* Maximum no of basic attrs */ > -#define TOTAL_ATTRS (MAX_CORE_ATTRS + 1) > #define MAX_CORE_DATA (NUM_REAL_CORES + BASE_SYSFS_ATTR_NO) > > +enum coretemp_attr_index { > + ATTR_LABEL, > + ATTR_CRIT_ALARM, > + ATTR_TEMP, > + ATTR_TJMAX, > + ATTR_TTARGET, > + TOTAL_ATTRS, /* Maximum no of possible attrs */ > + MAX_CORE_ATTRS = ATTR_TJMAX + 1 /* Maximum no of basic attrs */ This seems odd. TOTAL_ATTRS being the last entry seems fine, but defining a MAX_CORE_ATTR the way above sounds a bit hacky. > +}; > + > #ifdef CONFIG_SMP > #define for_each_sibling(i, cpu) \ > for_each_cpu(i, topology_sibling_cpumask(cpu)) > -- > 2.34.1 >
On 11/30/23 13:51, Ashok Raj wrote: > On Mon, Nov 27, 2023 at 09:16:49PM +0800, Zhang Rui wrote: >> Introduce enum coretemp_attr_index to better describe the index of each >> sensor attribute and the maximum number of basic/possible attributes. >> >> No functional change. >> >> Signed-off-by: Zhang Rui <rui.zhang@intel.com> >> --- >> drivers/hwmon/coretemp.c | 12 ++++++++++-- >> 1 file changed, 10 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/hwmon/coretemp.c b/drivers/hwmon/coretemp.c >> index ba82d1e79c13..6053ed3761c2 100644 >> --- a/drivers/hwmon/coretemp.c >> +++ b/drivers/hwmon/coretemp.c >> @@ -43,10 +43,18 @@ MODULE_PARM_DESC(tjmax, "TjMax value in degrees Celsius"); >> #define BASE_SYSFS_ATTR_NO 2 /* Sysfs Base attr no for coretemp */ >> #define NUM_REAL_CORES 128 /* Number of Real cores per cpu */ >> #define CORETEMP_NAME_LENGTH 28 /* String Length of attrs */ >> -#define MAX_CORE_ATTRS 4 /* Maximum no of basic attrs */ >> -#define TOTAL_ATTRS (MAX_CORE_ATTRS + 1) >> #define MAX_CORE_DATA (NUM_REAL_CORES + BASE_SYSFS_ATTR_NO) >> >> +enum coretemp_attr_index { >> + ATTR_LABEL, >> + ATTR_CRIT_ALARM, >> + ATTR_TEMP, >> + ATTR_TJMAX, >> + ATTR_TTARGET, >> + TOTAL_ATTRS, /* Maximum no of possible attrs */ >> + MAX_CORE_ATTRS = ATTR_TJMAX + 1 /* Maximum no of basic attrs */ > > This seems odd. TOTAL_ATTRS being the last entry seems fine, but defining a > MAX_CORE_ATTR the way above sounds a bit hacky. > Complaining is easy. What do you suggest that would be better ? Guenter >> +}; >> + >> #ifdef CONFIG_SMP >> #define for_each_sibling(i, cpu) \ >> for_each_cpu(i, topology_sibling_cpumask(cpu)) >> -- >> 2.34.1 >> >
On Thu, Nov 30, 2023 at 08:14:48PM -0800, Guenter Roeck wrote: > On 11/30/23 13:51, Ashok Raj wrote: > > On Mon, Nov 27, 2023 at 09:16:49PM +0800, Zhang Rui wrote: > > > Introduce enum coretemp_attr_index to better describe the index of each > > > sensor attribute and the maximum number of basic/possible attributes. > > > > > > No functional change. > > > > > > Signed-off-by: Zhang Rui <rui.zhang@intel.com> > > > --- > > > drivers/hwmon/coretemp.c | 12 ++++++++++-- > > > 1 file changed, 10 insertions(+), 2 deletions(-) > > > > > > diff --git a/drivers/hwmon/coretemp.c b/drivers/hwmon/coretemp.c > > > index ba82d1e79c13..6053ed3761c2 100644 > > > --- a/drivers/hwmon/coretemp.c > > > +++ b/drivers/hwmon/coretemp.c > > > @@ -43,10 +43,18 @@ MODULE_PARM_DESC(tjmax, "TjMax value in degrees Celsius"); > > > #define BASE_SYSFS_ATTR_NO 2 /* Sysfs Base attr no for coretemp */ > > > #define NUM_REAL_CORES 128 /* Number of Real cores per cpu */ > > > #define CORETEMP_NAME_LENGTH 28 /* String Length of attrs */ > > > -#define MAX_CORE_ATTRS 4 /* Maximum no of basic attrs */ > > > -#define TOTAL_ATTRS (MAX_CORE_ATTRS + 1) > > > #define MAX_CORE_DATA (NUM_REAL_CORES + BASE_SYSFS_ATTR_NO) > > > +enum coretemp_attr_index { > > > + ATTR_LABEL, > > > + ATTR_CRIT_ALARM, > > > + ATTR_TEMP, > > > + ATTR_TJMAX, > > > + ATTR_TTARGET, > > > + TOTAL_ATTRS, /* Maximum no of possible attrs */ > > > + MAX_CORE_ATTRS = ATTR_TJMAX + 1 /* Maximum no of basic attrs */ > > > > This seems odd. TOTAL_ATTRS being the last entry seems fine, but defining a > > MAX_CORE_ATTR the way above sounds a bit hacky. > > > > Complaining is easy. What do you suggest that would be better ? > Fair enough. How about ATTR_LABEL, ATTR_CRIT_ALARM, ATTR_TEMP, ATTR_TJMAX, MAX_CORE_ATTRS, /* One more than TJMAX */ ATTR_TTARGET = MAX_CORE_ATTRS, TOTAL_ATTRS Each enum can be assigned any value, but this way they are just increasing order.
On Thu, 2023-11-30 at 20:47 -0800, Ashok Raj wrote: > On Thu, Nov 30, 2023 at 08:14:48PM -0800, Guenter Roeck wrote: > > On 11/30/23 13:51, Ashok Raj wrote: > > > On Mon, Nov 27, 2023 at 09:16:49PM +0800, Zhang Rui wrote: > > > > Introduce enum coretemp_attr_index to better describe the index > > > > of each > > > > sensor attribute and the maximum number of basic/possible > > > > attributes. > > > > > > > > No functional change. > > > > > > > > Signed-off-by: Zhang Rui <rui.zhang@intel.com> > > > > --- > > > > drivers/hwmon/coretemp.c | 12 ++++++++++-- > > > > 1 file changed, 10 insertions(+), 2 deletions(-) > > > > > > > > diff --git a/drivers/hwmon/coretemp.c > > > > b/drivers/hwmon/coretemp.c > > > > index ba82d1e79c13..6053ed3761c2 100644 > > > > --- a/drivers/hwmon/coretemp.c > > > > +++ b/drivers/hwmon/coretemp.c > > > > @@ -43,10 +43,18 @@ MODULE_PARM_DESC(tjmax, "TjMax value in > > > > degrees Celsius"); > > > > #define BASE_SYSFS_ATTR_NO 2 /* Sysfs Base attr no > > > > for coretemp */ > > > > #define NUM_REAL_CORES 128 /* Number of > > > > Real cores per cpu */ > > > > #define CORETEMP_NAME_LENGTH 28 /* String Length of > > > > attrs */ > > > > -#define MAX_CORE_ATTRS 4 /* Maximum no of basic > > > > attrs */ > > > > -#define TOTAL_ATTRS (MAX_CORE_ATTRS + 1) > > > > #define MAX_CORE_DATA (NUM_REAL_CORES + > > > > BASE_SYSFS_ATTR_NO) > > > > +enum coretemp_attr_index { > > > > + ATTR_LABEL, > > > > + ATTR_CRIT_ALARM, > > > > + ATTR_TEMP, > > > > + ATTR_TJMAX, > > > > + ATTR_TTARGET, > > > > + TOTAL_ATTRS, /* Maximum no of > > > > possible attrs */ > > > > + MAX_CORE_ATTRS = ATTR_TJMAX + 1 /* Maximum no of basic > > > > attrs */ > > > > > > This seems odd. TOTAL_ATTRS being the last entry seems fine, but > > > defining a > > > MAX_CORE_ATTR the way above sounds a bit hacky. > > > > > > > Complaining is easy. What do you suggest that would be better ? > > > Fair enough. > > How about > > ATTR_LABEL, > ATTR_CRIT_ALARM, > ATTR_TEMP, > ATTR_TJMAX, > MAX_CORE_ATTRS, /* One more than TJMAX */ > ATTR_TTARGET = MAX_CORE_ATTRS, > TOTAL_ATTRS > > Each enum can be assigned any value, but this way they are just > increasing > order. ATTR_TTARGET is the next attribute after ATTR_TJMAX so it should be right after ATTR_TJMAX. MAX_CORE_ATTRS is the number of basic attributes so it should be ATTR_TJMAX + 1. TOTAL_ATTRS is the number of possible attributes so it should be ATTR_TTARGET + 1 ATTR_LABEL, // 0 ATTR_CRIT_ALARM, // 1 ATTR_TEMP, // 2 ATTR_TJMAX, // 3 ATTR_TTARGET, // 4 MAX_CORE_ATTRS = ATTR_TJMAX + 1, // 4 TOTAL_ATTRS = ATTR_TTARGET + 1, // 5 How about this one? thanks, rui
On Fri, Dec 01, 2023 at 09:29:24AM -0800, Zhang, Rui wrote: [snip] > > > > How about > > > > ATTR_LABEL, > > ATTR_CRIT_ALARM, > > ATTR_TEMP, > > ATTR_TJMAX, > > MAX_CORE_ATTRS, /* One more than TJMAX */ > > ATTR_TTARGET = MAX_CORE_ATTRS, > > TOTAL_ATTRS > > > > Each enum can be assigned any value, but this way they are just > > increasing > > order. > > ATTR_TTARGET is the next attribute after ATTR_TJMAX so it should be > right after ATTR_TJMAX. > MAX_CORE_ATTRS is the number of basic attributes so it should be > ATTR_TJMAX + 1. > TOTAL_ATTRS is the number of possible attributes so it should be > ATTR_TTARGET + 1 > > ATTR_LABEL, // 0 > ATTR_CRIT_ALARM, // 1 > ATTR_TEMP, // 2 > ATTR_TJMAX, // 3 > ATTR_TTARGET, // 4 > MAX_CORE_ATTRS = ATTR_TJMAX + 1, // 4 > TOTAL_ATTRS = ATTR_TTARGET + 1, // 5 > > How about this one? Sorry for the delay... yes, this sounds fine.
diff --git a/drivers/hwmon/coretemp.c b/drivers/hwmon/coretemp.c index ba82d1e79c13..6053ed3761c2 100644 --- a/drivers/hwmon/coretemp.c +++ b/drivers/hwmon/coretemp.c @@ -43,10 +43,18 @@ MODULE_PARM_DESC(tjmax, "TjMax value in degrees Celsius"); #define BASE_SYSFS_ATTR_NO 2 /* Sysfs Base attr no for coretemp */ #define NUM_REAL_CORES 128 /* Number of Real cores per cpu */ #define CORETEMP_NAME_LENGTH 28 /* String Length of attrs */ -#define MAX_CORE_ATTRS 4 /* Maximum no of basic attrs */ -#define TOTAL_ATTRS (MAX_CORE_ATTRS + 1) #define MAX_CORE_DATA (NUM_REAL_CORES + BASE_SYSFS_ATTR_NO) +enum coretemp_attr_index { + ATTR_LABEL, + ATTR_CRIT_ALARM, + ATTR_TEMP, + ATTR_TJMAX, + ATTR_TTARGET, + TOTAL_ATTRS, /* Maximum no of possible attrs */ + MAX_CORE_ATTRS = ATTR_TJMAX + 1 /* Maximum no of basic attrs */ +}; + #ifdef CONFIG_SMP #define for_each_sibling(i, cpu) \ for_each_cpu(i, topology_sibling_cpumask(cpu))