[v2,2/6] dt-bindings: i2c: qcom-geni: document I2C Master Hub serial I2C engine
Commit Message
The I2C Master Hub is a stripped down version of the GENI Serial Engine
QUP Wrapper Controller but only supporting I2C serial engines without
DMA support.
Document the I2C Serial Engine variant used within the I2C Master
Hub Wrapper.
This serial engine variant lacks DMA support, requires a core clock,
and since DMA support is lacking the memory interconnect path isn't
needed.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
.../bindings/i2c/qcom,i2c-geni-qcom.yaml | 64 ++++++++++++++++++----
1 file changed, 54 insertions(+), 10 deletions(-)
Comments
On 18/11/2022 09:45, Neil Armstrong wrote:
> The I2C Master Hub is a stripped down version of the GENI Serial Engine
> QUP Wrapper Controller but only supporting I2C serial engines without
> DMA support.
>
> Document the I2C Serial Engine variant used within the I2C Master
> Hub Wrapper.
>
> This serial engine variant lacks DMA support, requires a core clock,
> and since DMA support is lacking the memory interconnect path isn't
> needed.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
@@ -10,18 +10,19 @@ maintainers:
- Andy Gross <agross@kernel.org>
- Bjorn Andersson <bjorn.andersson@linaro.org>
-allOf:
- - $ref: /schemas/i2c/i2c-controller.yaml#
-
properties:
compatible:
- const: qcom,geni-i2c
+ enum:
+ - qcom,geni-i2c
+ - qcom,geni-i2c-master-hub
clocks:
- maxItems: 1
+ minItems: 1
+ maxItems: 2
clock-names:
- const: se
+ minItems: 1
+ maxItems: 2
clock-frequency:
default: 100000
@@ -35,13 +36,12 @@ properties:
- const: rx
interconnects:
+ minItems: 2
maxItems: 3
interconnect-names:
- items:
- - const: qup-core
- - const: qup-config
- - const: qup-memory
+ minItems: 2
+ maxItems: 3
interrupts:
maxItems: 1
@@ -71,6 +71,50 @@ required:
- clock-names
- reg
+allOf:
+ - $ref: /schemas/i2c/i2c-controller.yaml#
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: qcom,geni-i2c-master-hub
+ then:
+ properties:
+ clocks:
+ minItems: 2
+
+ clock-names:
+ items:
+ - const: se
+ - const: core
+
+ dmas: false
+ dma-names: false
+
+ interconnects:
+ maxItems: 2
+
+ interconnect-names:
+ items:
+ - const: qup-core
+ - const: qup-config
+ else:
+ properties:
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ const: se
+
+ interconnects:
+ minItems: 3
+
+ interconnect-names:
+ items:
+ - const: qup-core
+ - const: qup-config
+ - const: qup-memory
+
unevaluatedProperties: false
examples: