diff mbox series

[v4,5/5] ARM: dts: omap4-embt2ws: enable 32K clock on WLAN

Message ID 20230916100515.1650336-6-andreas@kemnade.info
State New
Headers
Series ARM: omap: omap4-embt2ws: 32K clock for WLAN |

Commit Message

Andreas Kemnade Sept. 16, 2023, 10:05 a.m. UTC 
  WLAN did only work if clock was left enabled by the original system,
so make it fully enable the needed resources itself.

Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
---
 arch/arm/boot/dts/ti/omap/omap4-epson-embt2ws.dts | 8 ++++++++
 1 file changed, 8 insertions(+)

Comments

Tony Lindgren Oct. 7, 2023, 6:53 a.m. UTC | #1 
* Andreas Kemnade <andreas@kemnade.info> [230916 13:05]:
> WLAN did only work if clock was left enabled by the original system,
> so make it fully enable the needed resources itself.

Seems applying this dts change before the clock patch is applied
would break wlan so please let me know when this is safe to apply.

Regards,

Tony
Tony Lindgren Nov. 30, 2023, 12:03 p.m. UTC | #2 
* Tony Lindgren <tony@atomide.com> [231007 06:53]:
> * Andreas Kemnade <andreas@kemnade.info> [230916 13:05]:
> > WLAN did only work if clock was left enabled by the original system,
> > so make it fully enable the needed resources itself.
> 
> Seems applying this dts change before the clock patch is applied
> would break wlan so please let me know when this is safe to apply.

Applying into omap-for-v6.8/dt thanks.

Tony
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/ti/omap/omap4-epson-embt2ws.dts b/arch/arm/boot/dts/ti/omap/omap4-epson-embt2ws.dts
index ee86981b2e448..9d2f2d8639496 100644
--- a/arch/arm/boot/dts/ti/omap/omap4-epson-embt2ws.dts
+++ b/arch/arm/boot/dts/ti/omap/omap4-epson-embt2ws.dts
@@ -69,6 +69,12 @@  unknown_supply: unknown-supply {
 		regulator-name = "unknown";
 	};
 
+	wl12xx_pwrseq: wl12xx-pwrseq {
+		compatible = "mmc-pwrseq-simple";
+		clocks = <&twl 1>;
+		clock-names = "ext_clock";
+	};
+
        /* regulator for wl12xx on sdio2 */
 	wl12xx_vmmc: wl12xx-vmmc {
 		pinctrl-names = "default";
@@ -92,6 +98,7 @@  &i2c1 {
 	twl: pmic@48 {
 		compatible = "ti,twl6032";
 		reg = <0x48>;
+		#clock-cells = <1>;
 		/* IRQ# = 7 */
 		interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; /* IRQ_SYS_1N cascaded to gic */
 		interrupt-controller;
@@ -316,6 +323,7 @@  &mmc3 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&wl12xx_pins>;
 	vmmc-supply = <&wl12xx_vmmc>;
+	mmc-pwrseq = <&wl12xx_pwrseq>;
 	interrupts-extended = <&wakeupgen GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH
 			       &omap4_pmx_core 0x12e>;
 	non-removable;