[V3,5/5] dt-bindings: interrupt-controller: qcom,pdc: document pdc on X1E80100

Message ID 20231124100608.29964-6-quic_sibis@quicinc.com
State New
Headers
Series dt-bindings: Document gpi/pdc/scm/smmu for X1E80100 |

Commit Message

Sibi Sankar Nov. 24, 2023, 10:06 a.m. UTC
  The X1E80100 SoC includes a PDC, document it.

Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
---

v3
* Rebased to the latest lnext. [Krzysztof]

 .../devicetree/bindings/interrupt-controller/qcom,pdc.yaml       | 1 +
 1 file changed, 1 insertion(+)
  

Comments

Krzysztof Kozlowski Nov. 24, 2023, 10:18 a.m. UTC | #1
On 24/11/2023 11:06, Sibi Sankar wrote:
> The X1E80100 SoC includes a PDC, document it.
> 
> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
> ---

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof
  
Rob Herring Nov. 27, 2023, 5:55 p.m. UTC | #2
On Fri, Nov 24, 2023 at 03:36:08PM +0530, Sibi Sankar wrote:
> The X1E80100 SoC includes a PDC, document it.
> 
> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
> ---
> 
> v3
> * Rebased to the latest lnext. [Krzysztof]
> 
>  .../devicetree/bindings/interrupt-controller/qcom,pdc.yaml       | 1 +
>  1 file changed, 1 insertion(+)

Applied, thanks.
  

Patch

diff --git a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml
index 8473afffce63..2f7320a5537e 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml
+++ b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml
@@ -42,6 +42,7 @@  properties:
           - qcom,sm8350-pdc
           - qcom,sm8450-pdc
           - qcom,sm8550-pdc
+          - qcom,x1e80100-pdc
       - const: qcom,pdc
 
   reg: