Message ID | 20230328-topic-msgram_mpm-v6-2-682e4855b7e2@linaro.org |
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State | New |
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[178.235.187.180]) by smtp.gmail.com with ESMTPSA id cb8-20020a170906a44800b009fd4583851esm3569253ejb.178.2023.11.25.06.27.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 25 Nov 2023 06:27:16 -0800 (PST) From: Konrad Dybcio <konrad.dybcio@linaro.org> Date: Sat, 25 Nov 2023 15:27:04 +0100 Subject: [PATCH v6 2/2] irqchip: irq-qcom-mpm: Support passing a slice of SRAM as reg space MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20230328-topic-msgram_mpm-v6-2-682e4855b7e2@linaro.org> References: <20230328-topic-msgram_mpm-v6-0-682e4855b7e2@linaro.org> In-Reply-To: <20230328-topic-msgram_mpm-v6-0-682e4855b7e2@linaro.org> To: Andy Gross <agross@kernel.org>, Bjorn Andersson <andersson@kernel.org>, Thomas Gleixner <tglx@linutronix.de>, Marc Zyngier <maz@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Shawn Guo <shawn.guo@linaro.org>, Conor Dooley <conor+dt@kernel.org> Cc: Marijn Suijten <marijn.suijten@somainline.org>, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Konrad Dybcio <konrad.dybcio@linaro.org> X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1700922431; l=2753; i=konrad.dybcio@linaro.org; s=20230215; h=from:subject:message-id; bh=C9jl/qWAOl6wjNdLIwtjlGydPzEtEemM1AEix/NRi+g=; b=QtoC2BFtU8WEQA3FaUGzzwenP8GqsgZoAjavep58j+7Xe7xYs8nBar2m2me6Rpy4DsIoa0wF3 Rm4t4mZXOxaC1SKmjd726QWQTfffqWQ1f0bR+GNiVeYGNpXTX11V9zK X-Developer-Key: i=konrad.dybcio@linaro.org; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Sat, 25 Nov 2023 06:27:30 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1783546552684689147 X-GMAIL-MSGID: 1783546552684689147 |
Series |
Resolve MPM register space situation
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Commit Message
Konrad Dybcio
Nov. 25, 2023, 2:27 p.m. UTC
The MPM hardware is accessible to us from the ARM CPUs through a shared memory region (RPM MSG RAM) that's also concurrently accessed by other kinds of cores on the system (like modem, ADSP etc.). Modeling this relation in a (somewhat) sane manner in the device tree basically requires us to either present the MPM as a child of said memory region (which makes little sense, as a mapped memory carveout is not a bus), define nodes which bleed their register spaces into one another, or passing their slice of the MSG RAM through some kind of a property. Go with the third option and add a way to map a region passed through the "qcom,rpm-msg-ram" property as our register space. The current way of using 'reg' is preserved for ABI reasons. Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> --- drivers/irqchip/irq-qcom-mpm.c | 21 ++++++++++++++++++--- 1 file changed, 18 insertions(+), 3 deletions(-)
Comments
On 25/11/2023 14:27, Konrad Dybcio wrote: > The MPM hardware is accessible to us from the ARM CPUs through a shared > memory region (RPM MSG RAM) that's also concurrently accessed by other > kinds of cores on the system (like modem, ADSP etc.). Modeling this > relation in a (somewhat) sane manner in the device tree basically > requires us to either present the MPM as a child of said memory region > (which makes little sense, as a mapped memory carveout is not a bus), > define nodes which bleed their register spaces into one another, or > passing their slice of the MSG RAM through some kind of a property. > > Go with the third option and add a way to map a region passed through > the "qcom,rpm-msg-ram" property as our register space. > > The current way of using 'reg' is preserved for ABI reasons. > > Acked-by: Shawn Guo <shawn.guo@linaro.org> > Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> > --- > drivers/irqchip/irq-qcom-mpm.c | 21 ++++++++++++++++++--- > 1 file changed, 18 insertions(+), 3 deletions(-) > > diff --git a/drivers/irqchip/irq-qcom-mpm.c b/drivers/irqchip/irq-qcom-mpm.c > index 7124565234a5..7115e3056aa5 100644 > --- a/drivers/irqchip/irq-qcom-mpm.c > +++ b/drivers/irqchip/irq-qcom-mpm.c > @@ -14,6 +14,7 @@ > #include <linux/mailbox_client.h> > #include <linux/module.h> > #include <linux/of.h> > +#include <linux/of_address.h> > #include <linux/of_platform.h> > #include <linux/platform_device.h> > #include <linux/pm_domain.h> > @@ -322,8 +323,10 @@ static int qcom_mpm_init(struct device_node *np, struct device_node *parent) > struct device *dev = &pdev->dev; > struct irq_domain *parent_domain; > struct generic_pm_domain *genpd; > + struct device_node *msgram_np; > struct qcom_mpm_priv *priv; > unsigned int pin_cnt; > + struct resource res; > int i, irq; > int ret; > > @@ -374,9 +377,21 @@ static int qcom_mpm_init(struct device_node *np, struct device_node *parent) > > raw_spin_lock_init(&priv->lock); > > - priv->base = devm_platform_ioremap_resource(pdev, 0); > - if (IS_ERR(priv->base)) > - return PTR_ERR(priv->base); > + /* If we have a handle to an RPM message ram partition, use it. */ > + msgram_np = of_parse_phandle(np, "qcom,rpm-msg-ram", 0); > + if (msgram_np) { > + ret = of_address_to_resource(msgram_np, 0, &res); You are capturing the return value but doing nothing with it. One of if (ret) { of_node_put(msgram_np); return ret; } or just drop the ret = if you are sure of_address_to_resource() can never return an error for your use-case. Once fixed. Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
On 25.11.2023 16:17, Bryan O'Donoghue wrote: > On 25/11/2023 14:27, Konrad Dybcio wrote: >> The MPM hardware is accessible to us from the ARM CPUs through a shared >> memory region (RPM MSG RAM) that's also concurrently accessed by other >> kinds of cores on the system (like modem, ADSP etc.). Modeling this >> relation in a (somewhat) sane manner in the device tree basically >> requires us to either present the MPM as a child of said memory region >> (which makes little sense, as a mapped memory carveout is not a bus), >> define nodes which bleed their register spaces into one another, or >> passing their slice of the MSG RAM through some kind of a property. >> >> Go with the third option and add a way to map a region passed through >> the "qcom,rpm-msg-ram" property as our register space. >> >> The current way of using 'reg' is preserved for ABI reasons. >> >> Acked-by: Shawn Guo <shawn.guo@linaro.org> >> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> >> --- >> drivers/irqchip/irq-qcom-mpm.c | 21 ++++++++++++++++++--- >> 1 file changed, 18 insertions(+), 3 deletions(-) >> >> diff --git a/drivers/irqchip/irq-qcom-mpm.c b/drivers/irqchip/irq-qcom-mpm.c >> index 7124565234a5..7115e3056aa5 100644 >> --- a/drivers/irqchip/irq-qcom-mpm.c >> +++ b/drivers/irqchip/irq-qcom-mpm.c >> @@ -14,6 +14,7 @@ >> #include <linux/mailbox_client.h> >> #include <linux/module.h> >> #include <linux/of.h> >> +#include <linux/of_address.h> >> #include <linux/of_platform.h> >> #include <linux/platform_device.h> >> #include <linux/pm_domain.h> >> @@ -322,8 +323,10 @@ static int qcom_mpm_init(struct device_node *np, struct device_node *parent) >> struct device *dev = &pdev->dev; >> struct irq_domain *parent_domain; >> struct generic_pm_domain *genpd; >> + struct device_node *msgram_np; >> struct qcom_mpm_priv *priv; >> unsigned int pin_cnt; >> + struct resource res; >> int i, irq; >> int ret; >> @@ -374,9 +377,21 @@ static int qcom_mpm_init(struct device_node *np, struct device_node *parent) >> raw_spin_lock_init(&priv->lock); >> - priv->base = devm_platform_ioremap_resource(pdev, 0); >> - if (IS_ERR(priv->base)) >> - return PTR_ERR(priv->base); >> + /* If we have a handle to an RPM message ram partition, use it. */ >> + msgram_np = of_parse_phandle(np, "qcom,rpm-msg-ram", 0); >> + if (msgram_np) { >> + ret = of_address_to_resource(msgram_np, 0, &res); > > You are capturing the return value but doing nothing with it. Oops you're right > > One of > > if (ret) { > of_node_put(msgram_np); > return ret; > } > > or just drop the ret = > > if you are sure of_address_to_resource() can never return an error for your use-case. Never say never! Konrad
diff --git a/drivers/irqchip/irq-qcom-mpm.c b/drivers/irqchip/irq-qcom-mpm.c index 7124565234a5..7115e3056aa5 100644 --- a/drivers/irqchip/irq-qcom-mpm.c +++ b/drivers/irqchip/irq-qcom-mpm.c @@ -14,6 +14,7 @@ #include <linux/mailbox_client.h> #include <linux/module.h> #include <linux/of.h> +#include <linux/of_address.h> #include <linux/of_platform.h> #include <linux/platform_device.h> #include <linux/pm_domain.h> @@ -322,8 +323,10 @@ static int qcom_mpm_init(struct device_node *np, struct device_node *parent) struct device *dev = &pdev->dev; struct irq_domain *parent_domain; struct generic_pm_domain *genpd; + struct device_node *msgram_np; struct qcom_mpm_priv *priv; unsigned int pin_cnt; + struct resource res; int i, irq; int ret; @@ -374,9 +377,21 @@ static int qcom_mpm_init(struct device_node *np, struct device_node *parent) raw_spin_lock_init(&priv->lock); - priv->base = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(priv->base)) - return PTR_ERR(priv->base); + /* If we have a handle to an RPM message ram partition, use it. */ + msgram_np = of_parse_phandle(np, "qcom,rpm-msg-ram", 0); + if (msgram_np) { + ret = of_address_to_resource(msgram_np, 0, &res); + /* Don't use devm_ioremap_resource, as we're accessing a shared region. */ + priv->base = devm_ioremap(dev, res.start, resource_size(&res)); + of_node_put(msgram_np); + if (IS_ERR(priv->base)) + return PTR_ERR(priv->base); + } else { + /* Otherwise, fall back to simple MMIO. */ + priv->base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(priv->base)) + return PTR_ERR(priv->base); + } for (i = 0; i < priv->reg_stride; i++) { qcom_mpm_write(priv, MPM_REG_ENABLE, i, 0);