Message ID | 20221117185942.3896559-1-conor@kernel.org |
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State | New |
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[2620:137:e000::1:20]) by mx.google.com with ESMTP id hq8-20020a1709073f0800b0078334ccc570si1117109ejc.328.2022.11.17.11.10.58; Thu, 17 Nov 2022 11:11:23 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=iZTnGy1V; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235043AbiKQTBZ (ORCPT <rfc822;a1648639935@gmail.com> + 99 others); Thu, 17 Nov 2022 14:01:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53128 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232532AbiKQTBX (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Thu, 17 Nov 2022 14:01:23 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 813E87EC81 for <linux-kernel@vger.kernel.org>; Thu, 17 Nov 2022 11:01:22 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 3B783B82177 for <linux-kernel@vger.kernel.org>; Thu, 17 Nov 2022 19:01:21 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 32F29C433D6; Thu, 17 Nov 2022 19:01:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668711679; bh=J5e/2e2A0QN5e/QvG58jvwr/TirjLnTq6GC/R3sYRoU=; h=From:To:Cc:Subject:Date:From; b=iZTnGy1VC1myIEDI3AGe/Md20ChfqPmH9cCimtVx08ODlpvHuaKXSoM5K8oH+6rNM zU+P9sA0nuir3N14Ip4crIHh5hwgTMKGtRArIMl9mEn73adrtY5y4CR9e2/lBrAqPu V04yljRQtVtb/87LdUNXBnRGCB11TQnzsDG2zWA7VPn4dPWQpNQmW1MFh4hYCy7geV D94M+gMfdGmq7F/uK5zyZAVXbCELx6tf+PQ3UZwz2GZox9WNkikUXD0eKbX/uyiGfj DHwP+oNUo9fHoPIoZvvSiPPgSOG1SH27OGfmZgkIRUVqov/25wUVdO7ZW8nfsBcQb4 Z6/SCRQBTnAdQ== From: Conor Dooley <conor@kernel.org> To: Marc Zyngier <maz@kernel.org> Cc: Thomas Gleixner <tglx@linutronix.de>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Conor Dooley <conor.dooley@microchip.com> Subject: [PATCH] irqchip/sifive-plic: default to enabled Date: Thu, 17 Nov 2022 18:59:43 +0000 Message-Id: <20221117185942.3896559-1-conor@kernel.org> X-Mailer: git-send-email 2.37.2 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749771651767555872?= X-GMAIL-MSGID: =?utf-8?q?1749771651767555872?= |
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irqchip/sifive-plic: default to enabled
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Commit Message
Conor Dooley
Nov. 17, 2022, 6:59 p.m. UTC
From: Conor Dooley <conor.dooley@microchip.com> The SiFive PLIC driver is used by all current implementations, including those that do not have a SiFive PLIC. Default the driver to enabled, with the intention of later removing the current "every SOC selects this" situation in Kconfig.socs at the moment. The speculative "potential others" in the description no longer makes any sense, as the driver is always used. Update the Kconfig symbol's description to reflect the driver's ubiquitous state. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> --- Hey Marc, I recall some discussion when this driver was extended to other PLICs a few months ago: https://lore.kernel.org/linux-riscv/20511a05f39408c8ffbcc98923c4abd2@kernel.org/ Perhaps I got the wrong impression, but it seemed to me that you intend for future implementations to reuse this driver where possible? I'd like to think, and surely will be proven wrong, that ~all future plic implementations should be similar enough to fit that bill. It's kinda on this basis that I figure switching this thing to default y should be okay. It's already only buildable on RISC-V & every implementation uses it, so no difference there. Thanks, Conor. --- drivers/irqchip/Kconfig | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-)
Comments
On Thu, 17 Nov 2022 18:59:43 +0000, Conor Dooley <conor@kernel.org> wrote: > > From: Conor Dooley <conor.dooley@microchip.com> > > The SiFive PLIC driver is used by all current implementations, including > those that do not have a SiFive PLIC. Default the driver to enabled, > with the intention of later removing the current "every SOC selects > this" situation in Kconfig.socs at the moment. > > The speculative "potential others" in the description no longer makes > any sense, as the driver is always used. Update the Kconfig symbol's > description to reflect the driver's ubiquitous state. > > Signed-off-by: Conor Dooley <conor.dooley@microchip.com> > --- > Hey Marc, > > I recall some discussion when this driver was extended to other PLICs a > few months ago: > https://lore.kernel.org/linux-riscv/20511a05f39408c8ffbcc98923c4abd2@kernel.org/ > > Perhaps I got the wrong impression, but it seemed to me that you intend > for future implementations to reuse this driver where possible? Well, within reasons. People seem to have some very liberal interpretations of the architecture spec... > > I'd like to think, and surely will be proven wrong, that ~all future > plic implementations should be similar enough to fit that bill. > It's kinda on this basis that I figure switching this thing to default y > should be okay. It's already only buildable on RISC-V & every > implementation uses it, so no difference there. If you expect this to be present at all times, why isn't this selected by the architecture Kconfig instead? I always find it pretty odd to have something that is 'default y' and yet constrained by a 'depend MYARCH'. A 'select PLIC' would make a lot more sense. And then you can stop making this user selectable. Thanks, M.
On Thu, Nov 17, 2022 at 07:36:57PM +0000, Marc Zyngier wrote: > On Thu, 17 Nov 2022 18:59:43 +0000, > Conor Dooley <conor@kernel.org> wrote: > > > > From: Conor Dooley <conor.dooley@microchip.com> > > > > The SiFive PLIC driver is used by all current implementations, including > > those that do not have a SiFive PLIC. Default the driver to enabled, > > with the intention of later removing the current "every SOC selects > > this" situation in Kconfig.socs at the moment. > > > > The speculative "potential others" in the description no longer makes > > any sense, as the driver is always used. Update the Kconfig symbol's > > description to reflect the driver's ubiquitous state. > > > > Signed-off-by: Conor Dooley <conor.dooley@microchip.com> > > --- > > Hey Marc, > > > > I recall some discussion when this driver was extended to other PLICs a > > few months ago: > > https://lore.kernel.org/linux-riscv/20511a05f39408c8ffbcc98923c4abd2@kernel.org/ > > > > Perhaps I got the wrong impression, but it seemed to me that you intend > > for future implementations to reuse this driver where possible? > > Well, within reasons. People seem to have some very liberal > interpretations of the architecture spec... Yeah, I know.. something something "RISC-V is meant to be extensible" something something. Even if that means doing some "standard" thing your own way apparently. > > I'd like to think, and surely will be proven wrong, that ~all future > > plic implementations should be similar enough to fit that bill. > > It's kinda on this basis that I figure switching this thing to default y > > should be okay. It's already only buildable on RISC-V & every > > implementation uses it, so no difference there. > > If you expect this to be present at all times, why isn't this selected > by the architecture Kconfig instead? Everyone at the moment needs it, but that's not always going to be true. The AIA APLIC that's currently out for review is the "next generation" interrupt controller. When we will actually see one in the wild is another question. > I always find it pretty odd to > have something that is 'default y' and yet constrained by a 'depend > MYARCH'. A 'select PLIC' would make a lot more sense. > > And then you can stop making this user selectable. I was considering moving the select to arch level, but settled for this as while I'd like to stop the individual SOCs doing `select PLIC`, I can see why someone building for a (future) system with the new AIA stuff may not care to build it. Or maybe the overhead of this one driver is nothing to care about? Thanks, Conor.
On Thu, 17 Nov 2022 19:57:17 +0000, Conor Dooley <conor@kernel.org> wrote: > > On Thu, Nov 17, 2022 at 07:36:57PM +0000, Marc Zyngier wrote: > > On Thu, 17 Nov 2022 18:59:43 +0000, > > Conor Dooley <conor@kernel.org> wrote: > > > > > > From: Conor Dooley <conor.dooley@microchip.com> > > > > > > The SiFive PLIC driver is used by all current implementations, including > > > those that do not have a SiFive PLIC. Default the driver to enabled, > > > with the intention of later removing the current "every SOC selects > > > this" situation in Kconfig.socs at the moment. > > > > > > The speculative "potential others" in the description no longer makes > > > any sense, as the driver is always used. Update the Kconfig symbol's > > > description to reflect the driver's ubiquitous state. > > > > > > Signed-off-by: Conor Dooley <conor.dooley@microchip.com> > > > --- > > > Hey Marc, > > > > > > I recall some discussion when this driver was extended to other PLICs a > > > few months ago: > > > https://lore.kernel.org/linux-riscv/20511a05f39408c8ffbcc98923c4abd2@kernel.org/ > > > > > > Perhaps I got the wrong impression, but it seemed to me that you intend > > > for future implementations to reuse this driver where possible? > > > > Well, within reasons. People seem to have some very liberal > > interpretations of the architecture spec... > > Yeah, I know.. something something "RISC-V is meant to be extensible" > something something. Even if that means doing some "standard" thing > your own way apparently. Funny how someone's "extensible" is someone else's "terminally broken". I guess HW folks will eventually learn that, possibly the hard way. > > > > I'd like to think, and surely will be proven wrong, that ~all future > > > plic implementations should be similar enough to fit that bill. > > > It's kinda on this basis that I figure switching this thing to default y > > > should be okay. It's already only buildable on RISC-V & every > > > implementation uses it, so no difference there. > > > > If you expect this to be present at all times, why isn't this selected > > by the architecture Kconfig instead? > > Everyone at the moment needs it, but that's not always going to be true. > The AIA APLIC that's currently out for review is the "next generation" > interrupt controller. When we will actually see one in the wild is > another question. > > > I always find it pretty odd to > > have something that is 'default y' and yet constrained by a 'depend > > MYARCH'. A 'select PLIC' would make a lot more sense. > > > > And then you can stop making this user selectable. > > I was considering moving the select to arch level, but settled for this > as while I'd like to stop the individual SOCs doing `select PLIC`, I can > see why someone building for a (future) system with the new AIA stuff > may not care to build it. > > Or maybe the overhead of this one driver is nothing to care about? In the grand scheme of things, it really doesn't matter. Hardly anyone is configuring their own kernel. People use distro kernels, which will have *everything* enabled. As an example, on the arm64 side we have long decided that some things were not worth the trouble, such as selectable root interrupt controllers and non-SMP support. Life is too short to care about those. M.
diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index 7ef9f5e696d3..6f99919ba66c 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -553,14 +553,15 @@ config RISCV_INTC config SIFIVE_PLIC bool "SiFive Platform-Level Interrupt Controller" depends on RISCV + default y select IRQ_DOMAIN_HIERARCHY select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP help - This enables support for the PLIC chip found in SiFive (and - potentially other) RISC-V systems. The PLIC controls devices - interrupts and connects them to each core's local interrupt - controller. Aside from timer and software interrupts, all other - interrupt sources are subordinate to the PLIC. + This enables support for the PLIC chip found in SiFive & other + RISC-V systems. The PLIC controls devices interrupts and connects + them to each core's local interrupt controller. Aside from timer + and software interrupts, all other interrupt sources are + subordinate to the PLIC. If you don't know what to do here, say Y.