On Fri, Oct 14 2022 at 10:10, Nipun Gupta wrote:
> Since CDX devices are not linked to of node they need a
> separate MSI domain for handling device ID to be provided to
> the GIC ITS domain.
>
> This also introduces APIs to alloc and free IRQs for CDX domain.
This is not really much of an explanation.
> +#include "cdx.h"
> +
> +#define REQ_ID_SHIFT 10
> +
> +/*
> + * Convert an msi_desc to a globaly unique identifier (per-device
> + * reqid + msi_desc position in the msi_list).
> + */
> +static irq_hw_number_t cdx_domain_calc_hwirq(struct cdx_device *dev,
> + struct msi_desc *desc)
> +{
> + return (dev->req_id << REQ_ID_SHIFT) | desc->msi_index;
> +}
> +
> +static void cdx_msi_set_desc(msi_alloc_info_t *arg,
> + struct msi_desc *desc)
> +{
> + arg->desc = desc;
> + arg->hwirq = cdx_domain_calc_hwirq(to_cdx_device(desc->dev), desc);
> +}
> +
> +static void cdx_msi_write_msg(struct irq_data *irq_data,
> + struct msi_msg *msg)
> +{
> + struct msi_desc *msi_desc = irq_data_get_msi_desc(irq_data);
> + struct cdx_device *cdx_dev = to_cdx_device(msi_desc->dev);
> + struct cdx_controller_t *cdx = cdx_dev->cdx;
> + uint64_t addr;
> + int ret;
> +
> + addr = ((uint64_t)(msi_desc->msg.address_hi) << 32) |
> + msi_desc->msg.address_lo;
> +
> + ret = cdx->ops.write_msi(cdx, cdx_dev->bus_num, cdx_dev->dev_num,
> + msi_desc->msi_index, msi_desc->msg.data,
> + addr);
> + if (ret)
> + dev_err(&cdx_dev->dev, "Write MSI failed to CDX controller\n");
> +}
So this is yet another variant of platform-MSI which is about to be
kicked from the planet.
Please check:
https://lore.kernel.org/r/20221111131813.914374272@linutronix.de
https://lore.kernel.org/r/20221111133158.196269823@linutronix.de
and the ARM/GIC conversion in:
https://git.kernel.org/pub/scm/linux/kernel/git/tglx/devel.git/log/?h=devmsi-arm
The latter is WIP, but functional.
I'm sure you replace your yet another magic MSI domain which only
provides a device specific MSI write function with the new
infrastructure trivially.
Thanks,
tglx
@@ -7,6 +7,7 @@
config CDX_BUS
bool "CDX Bus driver"
+ select GENERIC_MSI_IRQ_DOMAIN
help
Driver to enable CDX Bus infrastructure. CDX bus uses
CDX controller and firmware to scan the FPGA based
@@ -5,4 +5,4 @@
# Copyright (C) 2022, Advanced Micro Devices, Inc.
#
-obj-$(CONFIG_CDX_BUS) += cdx.o
+obj-$(CONFIG_CDX_BUS) += cdx.o cdx_msi.o
@@ -56,6 +56,7 @@
*/
#include <linux/init.h>
+#include <linux/irqdomain.h>
#include <linux/kernel.h>
#include <linux/of_device.h>
#include <linux/slab.h>
@@ -449,6 +450,7 @@ int cdx_device_add(struct cdx_dev_params_t *dev_params)
struct cdx_controller_t *cdx = dev_params->cdx;
struct device *parent = cdx->dev;
struct cdx_device *cdx_dev;
+ struct irq_domain *cdx_msi_domain;
int ret;
cdx_dev = kzalloc(sizeof(*cdx_dev), GFP_KERNEL);
@@ -465,6 +467,7 @@ int cdx_device_add(struct cdx_dev_params_t *dev_params)
/* Populate CDX dev params */
cdx_dev->req_id = dev_params->req_id;
+ cdx_dev->num_msi = dev_params->num_msi;
cdx_dev->vendor = dev_params->vendor;
cdx_dev->device = dev_params->device;
cdx_dev->bus_num = dev_params->bus_num;
@@ -483,6 +486,21 @@ int cdx_device_add(struct cdx_dev_params_t *dev_params)
dev_set_name(&cdx_dev->dev, "cdx-%02x:%02x", cdx_dev->bus_num,
cdx_dev->dev_num);
+ /* If CDX MSI domain is not created, create one. */
+ cdx_msi_domain = irq_find_host(parent->of_node);
+ if (!cdx_msi_domain) {
+ cdx_msi_domain = cdx_msi_domain_init(parent);
+ if (!cdx_msi_domain) {
+ dev_err(&cdx_dev->dev,
+ "cdx_msi_domain_init() failed: %d", ret);
+ kfree(cdx_dev);
+ return -ENODEV;
+ }
+ }
+
+ /* Set the MSI domain */
+ dev_set_msi_domain(&cdx_dev->dev, cdx_msi_domain);
+
ret = device_add(&cdx_dev->dev);
if (ret != 0) {
dev_err(&cdx_dev->dev,
@@ -23,6 +23,7 @@
* @res: array of MMIO region entries
* @res_count: number of valid MMIO regions
* @req_id: Requestor ID associated with CDX device
+ * @num_msi: Number of MSI's supported by the device
*/
struct cdx_dev_params_t {
struct cdx_controller_t *cdx;
@@ -35,6 +36,7 @@ struct cdx_dev_params_t {
struct resource res[MAX_CDX_DEV_RESOURCES];
u8 res_count;
u32 req_id;
+ u32 num_msi;
};
/**
@@ -63,4 +65,12 @@ void cdx_unregister_controller(struct cdx_controller_t *cdx);
*/
int cdx_device_add(struct cdx_dev_params_t *dev_params);
+/**
+ * cdx_msi_domain_init - Init the CDX bus MSI domain.
+ * @dev: Device of the CDX bus controller
+ *
+ * Return CDX MSI domain, NULL on failure
+ */
+struct irq_domain *cdx_msi_domain_init(struct device *dev);
+
#endif /* _CDX_H_ */
new file mode 100644
@@ -0,0 +1,161 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * AMD CDX bus driver MSI support
+ *
+ * Copyright (C) 2022, Advanced Micro Devices, Inc.
+ *
+ */
+
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/of_address.h>
+#include <linux/of_irq.h>
+#include <linux/irq.h>
+#include <linux/irqdomain.h>
+#include <linux/msi.h>
+#include <linux/cdx/cdx_bus.h>
+
+#include "cdx.h"
+
+#define REQ_ID_SHIFT 10
+
+/*
+ * Convert an msi_desc to a globaly unique identifier (per-device
+ * reqid + msi_desc position in the msi_list).
+ */
+static irq_hw_number_t cdx_domain_calc_hwirq(struct cdx_device *dev,
+ struct msi_desc *desc)
+{
+ return (dev->req_id << REQ_ID_SHIFT) | desc->msi_index;
+}
+
+static void cdx_msi_set_desc(msi_alloc_info_t *arg,
+ struct msi_desc *desc)
+{
+ arg->desc = desc;
+ arg->hwirq = cdx_domain_calc_hwirq(to_cdx_device(desc->dev), desc);
+}
+
+static void cdx_msi_write_msg(struct irq_data *irq_data,
+ struct msi_msg *msg)
+{
+ struct msi_desc *msi_desc = irq_data_get_msi_desc(irq_data);
+ struct cdx_device *cdx_dev = to_cdx_device(msi_desc->dev);
+ struct cdx_controller_t *cdx = cdx_dev->cdx;
+ uint64_t addr;
+ int ret;
+
+ addr = ((uint64_t)(msi_desc->msg.address_hi) << 32) |
+ msi_desc->msg.address_lo;
+
+ ret = cdx->ops.write_msi(cdx, cdx_dev->bus_num, cdx_dev->dev_num,
+ msi_desc->msi_index, msi_desc->msg.data,
+ addr);
+ if (ret)
+ dev_err(&cdx_dev->dev, "Write MSI failed to CDX controller\n");
+}
+
+int cdx_msi_domain_alloc_irqs(struct device *dev, unsigned int irq_count)
+{
+ int ret;
+
+ ret = msi_setup_device_data(dev);
+ if (ret)
+ return ret;
+
+ msi_lock_descs(dev);
+ if (msi_first_desc(dev, MSI_DESC_ALL))
+ ret = -EINVAL;
+ msi_unlock_descs(dev);
+ if (ret)
+ return ret;
+
+ ret = msi_domain_alloc_irqs(dev, irq_count);
+ if (ret)
+ dev_err(dev, "Failed to allocate IRQs\n");
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(cdx_msi_domain_alloc_irqs);
+
+static struct irq_chip cdx_msi_irq_chip = {
+ .name = "CDX-MSI",
+ .irq_mask = irq_chip_mask_parent,
+ .irq_unmask = irq_chip_unmask_parent,
+ .irq_eoi = irq_chip_eoi_parent,
+ .irq_set_affinity = msi_domain_set_affinity,
+ .irq_write_msi_msg = cdx_msi_write_msg
+};
+
+static int cdx_msi_prepare(struct irq_domain *msi_domain,
+ struct device *dev,
+ int nvec, msi_alloc_info_t *info)
+{
+ struct cdx_device *cdx_dev = to_cdx_device(dev);
+ struct msi_domain_info *msi_info;
+ struct device *parent = dev->parent;
+ u32 dev_id;
+ int ret;
+
+ /* Retrieve device ID from requestor ID using parent device */
+ ret = of_map_id(parent->of_node, cdx_dev->req_id, "msi-map",
+ "msi-map-mask", NULL, &dev_id);
+ if (ret) {
+ dev_err(dev, "of_map_id failed for MSI: %d\n", ret);
+ return ret;
+ }
+
+ /* Set the device Id to be passed to the GIC-ITS */
+ info->scratchpad[0].ul = dev_id;
+
+ msi_info = msi_get_domain_info(msi_domain->parent);
+
+ return msi_info->ops->msi_prepare(msi_domain->parent, dev, nvec, info);
+}
+
+static struct msi_domain_ops cdx_msi_ops __ro_after_init = {
+ .msi_prepare = cdx_msi_prepare,
+ .set_desc = cdx_msi_set_desc
+};
+
+static struct msi_domain_info cdx_msi_domain_info = {
+ .ops = &cdx_msi_ops,
+ .chip = &cdx_msi_irq_chip,
+ .flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS |
+ MSI_FLAG_ALLOC_SIMPLE_MSI_DESCS | MSI_FLAG_FREE_MSI_DESCS
+};
+
+struct irq_domain *cdx_msi_domain_init(struct device *dev)
+{
+ struct irq_domain *parent;
+ struct irq_domain *cdx_msi_domain;
+ struct fwnode_handle *fwnode_handle;
+ struct device_node *parent_node;
+ struct device_node *np = dev->of_node;
+
+ fwnode_handle = of_node_to_fwnode(np);
+
+ parent_node = of_parse_phandle(np, "msi-map", 1);
+ if (!parent_node) {
+ dev_err(dev, "msi-map not present on cdx controller\n");
+ return NULL;
+ }
+
+ parent = irq_find_matching_fwnode(of_node_to_fwnode(parent_node),
+ DOMAIN_BUS_NEXUS);
+ if (!parent || !msi_get_domain_info(parent)) {
+ dev_err(dev, "unable to locate ITS domain\n");
+ return NULL;
+ }
+
+ cdx_msi_domain = msi_create_irq_domain(fwnode_handle,
+ &cdx_msi_domain_info, parent);
+ if (!cdx_msi_domain) {
+ dev_err(dev, "unable to create CDX-MSI domain\n");
+ return NULL;
+ }
+
+ dev_dbg(dev, "CDX-MSI domain created\n");
+
+ return cdx_msi_domain;
+}
@@ -21,14 +21,21 @@ typedef int (*cdx_scan_t)(struct cdx_controller_t *cdx);
typedef int (*cdx_dev_reset_t)(struct cdx_controller_t *cdx,
uint8_t bus_num, uint8_t dev_num);
+typedef int (*cdx_write_msi_msg_t)(struct cdx_controller_t *cdx,
+ uint8_t bus_num, uint8_t dev_num,
+ uint16_t msi_index, uint32_t data,
+ uint64_t addr);
+
/**
* Callbacks supported by CDX controller.
* @scan: scan the devices on the controller
* @reset_dev: reset a CDX device
+ * @write_msi: callback to write the MSI message
*/
struct cdx_ops_t {
cdx_scan_t scan;
cdx_dev_reset_t reset_dev;
+ cdx_write_msi_msg_t write_msi;
};
/**
@@ -57,6 +64,7 @@ struct cdx_controller_t {
* @dma_mask: Default DMA mask
* @flags: CDX device flags
* @req_id: Requestor ID associated with CDX device
+ * @num_msi: Number of MSI's supported by the device
* @driver_override: driver name to force a match; do not set directly,
* because core frees it; use driver_set_override() to
* set or clear it.
@@ -73,6 +81,7 @@ struct cdx_device {
u64 dma_mask;
u16 flags;
u32 req_id;
+ u32 num_msi;
const char *driver_override;
};
@@ -136,4 +145,21 @@ extern struct bus_type cdx_bus_type;
*/
int cdx_dev_reset(struct device *dev);
+/**
+ * cdx_msi_domain_alloc_irqs - Allocate MSI's for the CDX device
+ * @dev: device pointer
+ * @irq_count: Number of MSI's to be allocated
+ *
+ * Return 0 for success, -errno on failure
+ */
+int cdx_msi_domain_alloc_irqs(struct device *dev, unsigned int irq_count);
+
+/**
+ * cdx_msi_domain_free_irqs - Free MSI's for CDX device
+ * @dev: device pointer
+ *
+ * Return 0 for success, -errno on failure
+ */
+#define cdx_msi_domain_free_irqs msi_domain_free_irqs
+
#endif /* _CDX_BUS_H_ */
@@ -1034,6 +1034,7 @@ void msi_domain_free_irqs(struct device *dev)
msi_domain_free_irqs_descs_locked(dev);
msi_unlock_descs(dev);
}
+EXPORT_SYMBOL_GPL(msi_domain_free_irqs);
/**
* msi_get_domain_info - Get the MSI interrupt domain info for @domain