Message ID | 20231121094642.2973795-4-qiujingbao.dlmu@gmail.com |
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State | New |
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Tue, 21 Nov 2023 01:46:57 -0800 (PST) From: Jingbao Qiu <qiujingbao.dlmu@gmail.com> To: a.zummo@towertech.it, alexandre.belloni@bootlin.com, krzysztof.kozlowski+dt@linaro.org, chao.wei@sophgo.com, unicorn_wang@outlook.com, conor+dt@kernel.org, robh+dt@kernel.org, conor@kernel.org, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu Cc: linux-rtc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Jingbao Qiu <qiujingbao.dlmu@gmail.com> Subject: [PATCH 3/3] riscv: dts: sophgo: add rtc dt node for CV1800B Date: Tue, 21 Nov 2023 17:46:42 +0800 Message-Id: <20231121094642.2973795-4-qiujingbao.dlmu@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231121094642.2973795-1-qiujingbao.dlmu@gmail.com> References: <20231121094642.2973795-1-qiujingbao.dlmu@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-0.6 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); 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Series |
riscv: sophgo: add rtc support for CV1800B
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Commit Message
Jingbao Qiu
Nov. 21, 2023, 9:46 a.m. UTC
Add the rtc device tree node to CV1800B SoC.
Signed-off-by: Jingbao Qiu <qiujingbao.dlmu@gmail.com>
---
arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
Comments
On 21/11/2023 10:46, Jingbao Qiu wrote: > Add the rtc device tree node to CV1800B SoC. > > Signed-off-by: Jingbao Qiu <qiujingbao.dlmu@gmail.com> > --- > arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi > index df40e87ee063..89411c75b89a 100644 > --- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi > +++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi > @@ -119,5 +119,13 @@ clint: timer@74000000 { > reg = <0x74000000 0x10000>; > interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>; > }; > + > + rtc: rtc-controller@05026000 { > + compatible = "sophgo,cv800b-rtc"; > + reg = <0x05026000 0x1000>; > + interrupts = <17 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-parent = <&plic>; > + clocks = <&osc>; > + }; It does not look like you tested the DTS against bindings. Please run `make dtbs_check W=1` (see Documentation/devicetree/bindings/writing-schema.rst or https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/ for instructions). Best regards, Krzysztof
On Tue, Nov 21, 2023 at 6:00 PM Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote: > > On 21/11/2023 10:46, Jingbao Qiu wrote: > > Add the rtc device tree node to CV1800B SoC. > > > > Signed-off-by: Jingbao Qiu <qiujingbao.dlmu@gmail.com> > > --- > > arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 8 ++++++++ > > 1 file changed, 8 insertions(+) > > > > diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi > > index df40e87ee063..89411c75b89a 100644 > > --- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi > > +++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi > > @@ -119,5 +119,13 @@ clint: timer@74000000 { > > reg = <0x74000000 0x10000>; > > interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>; > > }; > > + > > + rtc: rtc-controller@05026000 { > > + compatible = "sophgo,cv800b-rtc"; > > + reg = <0x05026000 0x1000>; > > + interrupts = <17 IRQ_TYPE_LEVEL_HIGH>; > > + interrupt-parent = <&plic>; > > + clocks = <&osc>; > > + }; > > It does not look like you tested the DTS against bindings. Please run > `make dtbs_check W=1` (see > Documentation/devicetree/bindings/writing-schema.rst or > https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/ > for instructions). I will check it. > > Best regards, > Krzysztof > Best regards, Jingbao Qiu
diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi index df40e87ee063..89411c75b89a 100644 --- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi +++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi @@ -119,5 +119,13 @@ clint: timer@74000000 { reg = <0x74000000 0x10000>; interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>; }; + + rtc: rtc-controller@05026000 { + compatible = "sophgo,cv800b-rtc"; + reg = <0x05026000 0x1000>; + interrupts = <17 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&plic>; + clocks = <&osc>; + }; }; };