[2/2] pmdomain: amlogic: meson-ee-pwrc: add support for G12A ISP power domain
Commit Message
Add entries for the ISP power domain found in the Amlogic G12B SoC
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
---
drivers/pmdomain/amlogic/meson-ee-pwrc.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
Comments
Hi Neil,
On Tue, Nov 14, 2023 at 11:19 AM Neil Armstrong
<neil.armstrong@linaro.org> wrote:
[...]
> +static struct meson_ee_pwrc_mem_domain g12a_pwrc_mem_isp[] = {
> + { G12A_HHI_ISP_MEM_PD_REG0, GENMASK(31, 0) },
> + { G12A_HHI_ISP_MEM_PD_REG0, GENMASK(31, 0) },
I expected this second line to use G12A_HHI_ISP_MEM_PD_REG1 (note the
number at the end: 0 vs 1)
Is this correct?
Best regards,
Martin
On 20/11/2023 21:15, Martin Blumenstingl wrote:
> Hi Neil,
>
> On Tue, Nov 14, 2023 at 11:19 AM Neil Armstrong
> <neil.armstrong@linaro.org> wrote:
> [...]
>> +static struct meson_ee_pwrc_mem_domain g12a_pwrc_mem_isp[] = {
>> + { G12A_HHI_ISP_MEM_PD_REG0, GENMASK(31, 0) },
>> + { G12A_HHI_ISP_MEM_PD_REG0, GENMASK(31, 0) },
> I expected this second line to use G12A_HHI_ISP_MEM_PD_REG1 (note the
> number at the end: 0 vs 1)
> Is this correct?
Indeed you're right, let me fix it in a v2,
Thanks,
Neil
>
>
> Best regards,
> Martin
@@ -47,6 +47,8 @@
#define G12A_HHI_NANOQ_MEM_PD_REG0 (0x43 << 2)
#define G12A_HHI_NANOQ_MEM_PD_REG1 (0x44 << 2)
+#define G12A_HHI_ISP_MEM_PD_REG0 (0x45 << 2)
+#define G12A_HHI_ISP_MEM_PD_REG1 (0x46 << 2)
struct meson_ee_pwrc;
struct meson_ee_pwrc_domain;
@@ -115,6 +117,13 @@ static struct meson_ee_pwrc_top_domain g12a_pwrc_nna = {
.iso_mask = BIT(16) | BIT(17),
};
+static struct meson_ee_pwrc_top_domain g12a_pwrc_isp = {
+ .sleep_reg = GX_AO_RTI_GEN_PWR_SLEEP0,
+ .sleep_mask = BIT(18) | BIT(19),
+ .iso_reg = GX_AO_RTI_GEN_PWR_ISO0,
+ .iso_mask = BIT(18) | BIT(19),
+};
+
/* Memory PD Domains */
#define VPU_MEMPD(__reg) \
@@ -231,6 +240,11 @@ static struct meson_ee_pwrc_mem_domain g12a_pwrc_mem_nna[] = {
{ G12A_HHI_NANOQ_MEM_PD_REG1, GENMASK(31, 0) },
};
+static struct meson_ee_pwrc_mem_domain g12a_pwrc_mem_isp[] = {
+ { G12A_HHI_ISP_MEM_PD_REG0, GENMASK(31, 0) },
+ { G12A_HHI_ISP_MEM_PD_REG0, GENMASK(31, 0) },
+};
+
#define VPU_PD(__name, __top_pd, __mem, __is_pwr_off, __resets, __clks) \
{ \
.name = __name, \
@@ -269,6 +283,8 @@ static struct meson_ee_pwrc_domain_desc g12a_pwrc_domains[] = {
[PWRC_G12A_ETH_ID] = MEM_PD("ETH", meson_pwrc_mem_eth),
[PWRC_G12A_NNA_ID] = TOP_PD("NNA", &g12a_pwrc_nna, g12a_pwrc_mem_nna,
pwrc_ee_is_powered_off),
+ [PWRC_G12A_ISP_ID] = TOP_PD("ISP", &g12a_pwrc_isp, g12a_pwrc_mem_isp,
+ pwrc_ee_is_powered_off),
};
static struct meson_ee_pwrc_domain_desc gxbb_pwrc_domains[] = {