Message ID | 20231107155532.3747113-4-clabbe@baylibre.com |
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State | New |
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[90.63.244.31]) by smtp.googlemail.com with ESMTPSA id f6-20020a05600c4e8600b003fefb94ccc9sm16579085wmq.11.2023.11.07.07.55.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Nov 2023 07:55:49 -0800 (PST) From: Corentin Labbe <clabbe@baylibre.com> To: davem@davemloft.net, heiko@sntech.de, herbert@gondor.apana.org.au, krzysztof.kozlowski+dt@linaro.org, mturquette@baylibre.com, p.zabel@pengutronix.de, robh+dt@kernel.org, sboyd@kernel.org Cc: ricardo@pardini.net, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Corentin Labbe <clabbe@baylibre.com> Subject: [PATCH 3/6] ARM64: dts: rk3588: add crypto node Date: Tue, 7 Nov 2023 15:55:29 +0000 Message-Id: <20231107155532.3747113-4-clabbe@baylibre.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231107155532.3747113-1-clabbe@baylibre.com> References: <20231107155532.3747113-1-clabbe@baylibre.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (fry.vger.email [0.0.0.0]); Tue, 07 Nov 2023 08:09:59 -0800 (PST) X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on fry.vger.email X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781922246257140764 X-GMAIL-MSGID: 1781922246257140764 |
Series |
crypto: rockchip: add support for rk3588/rk3568
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Commit Message
Corentin LABBE
Nov. 7, 2023, 3:55 p.m. UTC
The rk3588 has a crypto IP handled by the rk3588 crypto driver so adds a
node for it.
Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
---
arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
Comments
Hi, Am Dienstag, 7. November 2023, 16:55:29 CET schrieb Corentin Labbe: > The rk3588 has a crypto IP handled by the rk3588 crypto driver so adds a > node for it. please follow other commits in the subject line, i.e.: "arm64: dts: rockchip: add rk3588 crypto node" Thanks Heiko > > Signed-off-by: Corentin Labbe <clabbe@baylibre.com> > --- > arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > > diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > index 7064c0e9179f..a2ba5ebec38d 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > @@ -1523,6 +1523,18 @@ sdhci: mmc@fe2e0000 { > status = "disabled"; > }; > > + crypto: crypto@fe370000 { > + compatible = "rockchip,rk3588-crypto"; > + reg = <0x0 0xfe370000 0x0 0x2000>; > + interrupts = <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH 0>; > + clocks = <&scmi_clk SCMI_CRYPTO_CORE>, <&scmi_clk SCMI_ACLK_SECURE_NS>, > + <&scmi_clk SCMI_HCLK_SECURE_NS>; > + clock-names = "core", "aclk", "hclk"; > + resets = <&scmi_reset SRST_CRYPTO_CORE>; > + reset-names = "core"; > + status = "okay"; > + }; > + > i2s0_8ch: i2s@fe470000 { > compatible = "rockchip,rk3588-i2s-tdm"; > reg = <0x0 0xfe470000 0x0 0x1000>; >
On 07/11/2023 16:55, Corentin Labbe wrote: > The rk3588 has a crypto IP handled by the rk3588 crypto driver so adds a > node for it. > > Signed-off-by: Corentin Labbe <clabbe@baylibre.com> > --- > arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > > diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > index 7064c0e9179f..a2ba5ebec38d 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > @@ -1523,6 +1523,18 @@ sdhci: mmc@fe2e0000 { > status = "disabled"; > }; > > + crypto: crypto@fe370000 { > + compatible = "rockchip,rk3588-crypto"; > + reg = <0x0 0xfe370000 0x0 0x2000>; > + interrupts = <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH 0>; > + clocks = <&scmi_clk SCMI_CRYPTO_CORE>, <&scmi_clk SCMI_ACLK_SECURE_NS>, > + <&scmi_clk SCMI_HCLK_SECURE_NS>; > + clock-names = "core", "aclk", "hclk"; > + resets = <&scmi_reset SRST_CRYPTO_CORE>; > + reset-names = "core"; > + status = "okay"; Drop. Best regards, Krzysztof
Le Tue, Nov 07, 2023 at 04:59:42PM +0100, Heiko Stübner a écrit : > Hi, > > Am Dienstag, 7. November 2023, 16:55:29 CET schrieb Corentin Labbe: > > The rk3588 has a crypto IP handled by the rk3588 crypto driver so adds a > > node for it. > > please follow other commits in the subject line, i.e.: > > "arm64: dts: rockchip: add rk3588 crypto node" > > > Thanks > Heiko > I will do it Thanks.
Le Tue, Nov 07, 2023 at 05:20:59PM +0100, Krzysztof Kozlowski a écrit : > On 07/11/2023 16:55, Corentin Labbe wrote: > > The rk3588 has a crypto IP handled by the rk3588 crypto driver so adds a > > node for it. > > > > Signed-off-by: Corentin Labbe <clabbe@baylibre.com> > > --- > > arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 12 ++++++++++++ > > 1 file changed, 12 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > > index 7064c0e9179f..a2ba5ebec38d 100644 > > --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > > +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi > > @@ -1523,6 +1523,18 @@ sdhci: mmc@fe2e0000 { > > status = "disabled"; > > }; > > > > + crypto: crypto@fe370000 { > > + compatible = "rockchip,rk3588-crypto"; > > + reg = <0x0 0xfe370000 0x0 0x2000>; > > + interrupts = <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH 0>; > > + clocks = <&scmi_clk SCMI_CRYPTO_CORE>, <&scmi_clk SCMI_ACLK_SECURE_NS>, > > + <&scmi_clk SCMI_HCLK_SECURE_NS>; > > + clock-names = "core", "aclk", "hclk"; > > + resets = <&scmi_reset SRST_CRYPTO_CORE>; > > + reset-names = "core"; > > + status = "okay"; > > Drop. > > Best regards, > Krzysztof > I will do it Thanks.
diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index 7064c0e9179f..a2ba5ebec38d 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -1523,6 +1523,18 @@ sdhci: mmc@fe2e0000 { status = "disabled"; }; + crypto: crypto@fe370000 { + compatible = "rockchip,rk3588-crypto"; + reg = <0x0 0xfe370000 0x0 0x2000>; + interrupts = <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&scmi_clk SCMI_CRYPTO_CORE>, <&scmi_clk SCMI_ACLK_SECURE_NS>, + <&scmi_clk SCMI_HCLK_SECURE_NS>; + clock-names = "core", "aclk", "hclk"; + resets = <&scmi_reset SRST_CRYPTO_CORE>; + reset-names = "core"; + status = "okay"; + }; + i2s0_8ch: i2s@fe470000 { compatible = "rockchip,rk3588-i2s-tdm"; reg = <0x0 0xfe470000 0x0 0x1000>;