Message ID | 20231025142427.2661-3-quic_sibis@quicinc.com |
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State | New |
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Wed, 25 Oct 2023 14:25:10 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 39PEP9xs022718 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 25 Oct 2023 14:25:09 GMT Received: from blr-ubuntu-87.ap.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.39; Wed, 25 Oct 2023 07:25:01 -0700 From: Sibi Sankar <quic_sibis@quicinc.com> To: <andersson@kernel.org>, <konrad.dybcio@linaro.org>, <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>, <catalin.marinas@arm.com>, <ulf.hansson@linaro.org> CC: <agross@kernel.org>, <conor+dt@kernel.org>, <ayan.kumar.halder@amd.com>, <j@jannau.net>, <dmitry.baryshkov@linaro.org>, <nfraprado@collabora.com>, <m.szyprowski@samsung.com>, <u-kumar1@ti.com>, <peng.fan@nxp.com>, <lpieralisi@kernel.org>, <quic_rjendra@quicinc.com>, <abel.vesa@linaro.org>, <linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <quic_tsoni@quicinc.com>, <neil.armstrong@linaro.org>, Sibi Sankar <quic_sibis@quicinc.com> Subject: [PATCH 2/5] dt-bindings: arm: qcom: Document SC8380XP SoC and boards Date: Wed, 25 Oct 2023 19:54:24 +0530 Message-ID: <20231025142427.2661-3-quic_sibis@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20231025142427.2661-1-quic_sibis@quicinc.com> References: <20231025142427.2661-1-quic_sibis@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: KoKZSii8Z64vNSpFNVKeI5iHhxhQKmIt X-Proofpoint-ORIG-GUID: KoKZSii8Z64vNSpFNVKeI5iHhxhQKmIt X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-25_03,2023-10-25_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 suspectscore=0 malwarescore=0 clxscore=1015 adultscore=0 spamscore=0 bulkscore=0 mlxlogscore=967 impostorscore=0 mlxscore=0 phishscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2310170001 definitions=main-2310250124 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); 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Series |
dts: qcom: Introduce SC8380XP platforms device tree
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Commit Message
Sibi Sankar
Oct. 25, 2023, 2:24 p.m. UTC
From: Rajendra Nayak <quic_rjendra@quicinc.com> Document the SC8380XP SoC binding and also the boards using it. Also document the new board id qcp (Qualcomm Compute Platform). Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> --- Documentation/devicetree/bindings/arm/qcom.yaml | 8 ++++++++ 1 file changed, 8 insertions(+)
Comments
On 10/25/23 16:24, Sibi Sankar wrote: > From: Rajendra Nayak <quic_rjendra@quicinc.com> > > Document the SC8380XP SoC binding and also the boards using it. > Also document the new board id qcp (Qualcomm Compute Platform). > > Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> > Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> > --- Looks good, but can you elaborate a bit more on QCP? Is it going to be a new fuse setting for devices that fall into the "compute" category, but aren't necessarily CRDs? Konrad
On 25/10/2023 16:24, Sibi Sankar wrote: > From: Rajendra Nayak <quic_rjendra@quicinc.com> > > Document the SC8380XP SoC binding and also the boards using it. > Also document the new board id qcp (Qualcomm Compute Platform). > > Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> > Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> > --- > Documentation/devicetree/bindings/arm/qcom.yaml | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml > index 88b84035e7b1..6145e9ad340c 100644 > --- a/Documentation/devicetree/bindings/arm/qcom.yaml > +++ b/Documentation/devicetree/bindings/arm/qcom.yaml > @@ -62,6 +62,7 @@ description: | > sc7280 > sc8180x > sc8280xp > + sc8380xp > sda660 > sdm450 > sdm630 > @@ -110,6 +111,7 @@ description: | > liquid > rdp432-c2 > mtp > + qcp > qrd > rb2 > ride > @@ -1044,6 +1046,12 @@ properties: > - qcom,sm8550-qrd > - const: qcom,sm8550 > > + - items: > + - enum: > + - qcom,sc8380xp-crd > + - qcom,sc8380xp-qcp > + - const: qcom,sc8380xp This is some odd placement. Please keep things properly ordered. Best regards, Krzysztof
Hey Konrad, Thanks for taking time to review the series. On 10/26/23 15:54, Konrad Dybcio wrote: > > > On 10/25/23 16:24, Sibi Sankar wrote: >> From: Rajendra Nayak <quic_rjendra@quicinc.com> >> >> Document the SC8380XP SoC binding and also the boards using it. >> Also document the new board id qcp (Qualcomm Compute Platform). >> >> Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> >> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> >> --- > Looks good, but can you elaborate a bit more on QCP? Is it going > to be a new fuse setting for devices that fall into the "compute" > category, but aren't necessarily CRDs? QCP and CRD have different form factors, the former looks like a laptop while the latter isn't. The fuse settings probably won't have any diffs between them but the board schematics will have diffs. -Sibi > > Konrad
Hey Krzysztof, Thanks for taking time to review the series. On 10/27/23 13:46, Krzysztof Kozlowski wrote: > On 25/10/2023 16:24, Sibi Sankar wrote: >> From: Rajendra Nayak <quic_rjendra@quicinc.com> >> >> Document the SC8380XP SoC binding and also the boards using it. >> Also document the new board id qcp (Qualcomm Compute Platform). >> >> Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> >> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> >> --- >> Documentation/devicetree/bindings/arm/qcom.yaml | 8 ++++++++ >> 1 file changed, 8 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml >> index 88b84035e7b1..6145e9ad340c 100644 >> --- a/Documentation/devicetree/bindings/arm/qcom.yaml >> +++ b/Documentation/devicetree/bindings/arm/qcom.yaml >> @@ -62,6 +62,7 @@ description: | >> sc7280 >> sc8180x >> sc8280xp >> + sc8380xp >> sda660 >> sdm450 >> sdm630 >> @@ -110,6 +111,7 @@ description: | >> liquid >> rdp432-c2 >> mtp >> + qcp >> qrd >> rb2 >> ride >> @@ -1044,6 +1046,12 @@ properties: >> - qcom,sm8550-qrd >> - const: qcom,sm8550 >> >> + - items: >> + - enum: >> + - qcom,sc8380xp-crd >> + - qcom,sc8380xp-qcp >> + - const: qcom,sc8380xp > > This is some odd placement. Please keep things properly ordered. will fix this in the next re-spin. -Sibi > > Best regards, > Krzysztof >
diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 88b84035e7b1..6145e9ad340c 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -62,6 +62,7 @@ description: | sc7280 sc8180x sc8280xp + sc8380xp sda660 sdm450 sdm630 @@ -110,6 +111,7 @@ description: | liquid rdp432-c2 mtp + qcp qrd rb2 ride @@ -1044,6 +1046,12 @@ properties: - qcom,sm8550-qrd - const: qcom,sm8550 + - items: + - enum: + - qcom,sc8380xp-crd + - qcom,sc8380xp-qcp + - const: qcom,sc8380xp + # Board compatibles go above qcom,msm-id: