Message ID | 20231114225857.19702-3-jonathan@marek.ca |
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State | New |
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[135.19.110.125]) by smtp.gmail.com with ESMTPSA id u2-20020a05621411a200b00674a45499dcsm25274qvv.88.2023.11.14.15.00.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Nov 2023 15:00:31 -0800 (PST) From: Jonathan Marek <jonathan@marek.ca> To: freedreno@lists.freedesktop.org Cc: Rob Clark <robdclark@gmail.com>, Abhinav Kumar <quic_abhinavk@quicinc.com>, Dmitry Baryshkov <dmitry.baryshkov@linaro.org>, Sean Paul <sean@poorly.run>, Marijn Suijten <marijn.suijten@somainline.org>, David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>, Jessica Zhang <quic_jesszhan@quicinc.com>, Konrad Dybcio <konrad.dybcio@linaro.org>, Jiasheng Jiang <jiasheng@iscas.ac.cn>, linux-arm-msm@vger.kernel.org (open list:DRM DRIVER FOR MSM ADRENO GPU), dri-devel@lists.freedesktop.org (open list:DRM DRIVER FOR MSM ADRENO GPU), linux-kernel@vger.kernel.org (open list) Subject: [PATCH v2 2/6] drm/msm/dsi: set video mode widebus enable bit when widebus is enabled Date: Tue, 14 Nov 2023 17:58:30 -0500 Message-Id: <20231114225857.19702-3-jonathan@marek.ca> X-Mailer: git-send-email 2.26.1 In-Reply-To: <20231114225857.19702-1-jonathan@marek.ca> References: <20231114225857.19702-1-jonathan@marek.ca> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Tue, 14 Nov 2023 15:01:08 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782582219595861078 X-GMAIL-MSGID: 1782582219595861078 |
Series |
drm/msm: DSI DSC video mode fixes
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Commit Message
Jonathan Marek
Nov. 14, 2023, 10:58 p.m. UTC
The value returned by msm_dsi_wide_bus_enabled() doesn't match what the
driver is doing in video mode. Fix that by actually enabling widebus for
video mode.
Fixes: efcbd6f9cdeb ("drm/msm/dsi: Enable widebus for DSI")
Signed-off-by: Jonathan Marek <jonathan@marek.ca>
---
drivers/gpu/drm/msm/dsi/dsi.xml.h | 1 +
drivers/gpu/drm/msm/dsi/dsi_host.c | 2 ++
2 files changed, 3 insertions(+)
Comments
On Wed, 15 Nov 2023 at 01:00, Jonathan Marek <jonathan@marek.ca> wrote: > > The value returned by msm_dsi_wide_bus_enabled() doesn't match what the > driver is doing in video mode. Fix that by actually enabling widebus for > video mode. > > Fixes: efcbd6f9cdeb ("drm/msm/dsi: Enable widebus for DSI") > Signed-off-by: Jonathan Marek <jonathan@marek.ca> > --- > drivers/gpu/drm/msm/dsi/dsi.xml.h | 1 + > drivers/gpu/drm/msm/dsi/dsi_host.c | 2 ++ > 2 files changed, 3 insertions(+) Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
On Wed, 15 Nov 2023 at 01:00, Jonathan Marek <jonathan@marek.ca> wrote: > > The value returned by msm_dsi_wide_bus_enabled() doesn't match what the > driver is doing in video mode. Fix that by actually enabling widebus for > video mode. > > Fixes: efcbd6f9cdeb ("drm/msm/dsi: Enable widebus for DSI") > Signed-off-by: Jonathan Marek <jonathan@marek.ca> > --- > drivers/gpu/drm/msm/dsi/dsi.xml.h | 1 + > drivers/gpu/drm/msm/dsi/dsi_host.c | 2 ++ > 2 files changed, 3 insertions(+) > > diff --git a/drivers/gpu/drm/msm/dsi/dsi.xml.h b/drivers/gpu/drm/msm/dsi/dsi.xml.h > index 2a7d980e12c3..f0b3cdc020a1 100644 > --- a/drivers/gpu/drm/msm/dsi/dsi.xml.h > +++ b/drivers/gpu/drm/msm/dsi/dsi.xml.h > @@ -231,6 +231,7 @@ static inline uint32_t DSI_VID_CFG0_TRAFFIC_MODE(enum dsi_traffic_mode val) > #define DSI_VID_CFG0_HSA_POWER_STOP 0x00010000 > #define DSI_VID_CFG0_HBP_POWER_STOP 0x00100000 > #define DSI_VID_CFG0_HFP_POWER_STOP 0x01000000 > +#define DSI_VID_CFG0_DATABUS_WIDEN 0x02000000 BTW, could you please push this register to mesa? > #define DSI_VID_CFG0_PULSE_MODE_HSA_HE 0x10000000 > > #define REG_DSI_VID_CFG1 0x0000001c
On 2023-11-14 17:58:30, Jonathan Marek wrote: > The value returned by msm_dsi_wide_bus_enabled() doesn't match what the > driver is doing in video mode. Fix that by actually enabling widebus for > video mode. > > Fixes: efcbd6f9cdeb ("drm/msm/dsi: Enable widebus for DSI") > Signed-off-by: Jonathan Marek <jonathan@marek.ca> Conditional r-b assuming this will be submitted to mesa, otherwise it'll disappear when the next person updates and regenerates these bindings. Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org> > --- > drivers/gpu/drm/msm/dsi/dsi.xml.h | 1 + > drivers/gpu/drm/msm/dsi/dsi_host.c | 2 ++ > 2 files changed, 3 insertions(+) > > diff --git a/drivers/gpu/drm/msm/dsi/dsi.xml.h b/drivers/gpu/drm/msm/dsi/dsi.xml.h > index 2a7d980e12c3..f0b3cdc020a1 100644 > --- a/drivers/gpu/drm/msm/dsi/dsi.xml.h > +++ b/drivers/gpu/drm/msm/dsi/dsi.xml.h > @@ -231,6 +231,7 @@ static inline uint32_t DSI_VID_CFG0_TRAFFIC_MODE(enum dsi_traffic_mode val) > #define DSI_VID_CFG0_HSA_POWER_STOP 0x00010000 > #define DSI_VID_CFG0_HBP_POWER_STOP 0x00100000 > #define DSI_VID_CFG0_HFP_POWER_STOP 0x01000000 > +#define DSI_VID_CFG0_DATABUS_WIDEN 0x02000000 > #define DSI_VID_CFG0_PULSE_MODE_HSA_HE 0x10000000 > > #define REG_DSI_VID_CFG1 0x0000001c > diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c > index deeecdfd6c4e..f2c1cbd08d4d 100644 > --- a/drivers/gpu/drm/msm/dsi/dsi_host.c > +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c > @@ -745,6 +745,8 @@ static void dsi_ctrl_enable(struct msm_dsi_host *msm_host, > data |= DSI_VID_CFG0_TRAFFIC_MODE(dsi_get_traffic_mode(flags)); > data |= DSI_VID_CFG0_DST_FORMAT(dsi_get_vid_fmt(mipi_fmt)); > data |= DSI_VID_CFG0_VIRT_CHANNEL(msm_host->channel); > + if (msm_dsi_host_is_wide_bus_enabled(&msm_host->base)) > + data |= DSI_VID_CFG0_DATABUS_WIDEN; > dsi_write(msm_host, REG_DSI_VID_CFG0, data); > > /* Do not swap RGB colors */ > -- > 2.26.1 >
On 11/14/2023 2:58 PM, Jonathan Marek wrote: > The value returned by msm_dsi_wide_bus_enabled() doesn't match what the > driver is doing in video mode. Fix that by actually enabling widebus for > video mode. > > Fixes: efcbd6f9cdeb ("drm/msm/dsi: Enable widebus for DSI") > Signed-off-by: Jonathan Marek <jonathan@marek.ca> > --- > drivers/gpu/drm/msm/dsi/dsi.xml.h | 1 + > drivers/gpu/drm/msm/dsi/dsi_host.c | 2 ++ > 2 files changed, 3 insertions(+) > > diff --git a/drivers/gpu/drm/msm/dsi/dsi.xml.h b/drivers/gpu/drm/msm/dsi/dsi.xml.h > index 2a7d980e12c3..f0b3cdc020a1 100644 > --- a/drivers/gpu/drm/msm/dsi/dsi.xml.h > +++ b/drivers/gpu/drm/msm/dsi/dsi.xml.h > @@ -231,6 +231,7 @@ static inline uint32_t DSI_VID_CFG0_TRAFFIC_MODE(enum dsi_traffic_mode val) > #define DSI_VID_CFG0_HSA_POWER_STOP 0x00010000 > #define DSI_VID_CFG0_HBP_POWER_STOP 0x00100000 > #define DSI_VID_CFG0_HFP_POWER_STOP 0x01000000 > +#define DSI_VID_CFG0_DATABUS_WIDEN 0x02000000 > #define DSI_VID_CFG0_PULSE_MODE_HSA_HE 0x10000000 > > #define REG_DSI_VID_CFG1 0x0000001c > diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c > index deeecdfd6c4e..f2c1cbd08d4d 100644 > --- a/drivers/gpu/drm/msm/dsi/dsi_host.c > +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c > @@ -745,6 +745,8 @@ static void dsi_ctrl_enable(struct msm_dsi_host *msm_host, > data |= DSI_VID_CFG0_TRAFFIC_MODE(dsi_get_traffic_mode(flags)); > data |= DSI_VID_CFG0_DST_FORMAT(dsi_get_vid_fmt(mipi_fmt)); > data |= DSI_VID_CFG0_VIRT_CHANNEL(msm_host->channel); > + if (msm_dsi_host_is_wide_bus_enabled(&msm_host->base)) > + data |= DSI_VID_CFG0_DATABUS_WIDEN; Hi Jonathan, Now that widebus is enabled for video mode, I think you can also drop the TODO here [1]. Other than that, this LGTM. Reviewed-by: Jessica Zhang <quic_jesszhan@quicinc.com> Thanks, Jessica Zhang [1] https://elixir.bootlin.com/linux/v6.7-rc3/source/drivers/gpu/drm/msm/dsi/dsi_host.c#L772 > dsi_write(msm_host, REG_DSI_VID_CFG0, data); > > /* Do not swap RGB colors */ > -- > 2.26.1 >
diff --git a/drivers/gpu/drm/msm/dsi/dsi.xml.h b/drivers/gpu/drm/msm/dsi/dsi.xml.h index 2a7d980e12c3..f0b3cdc020a1 100644 --- a/drivers/gpu/drm/msm/dsi/dsi.xml.h +++ b/drivers/gpu/drm/msm/dsi/dsi.xml.h @@ -231,6 +231,7 @@ static inline uint32_t DSI_VID_CFG0_TRAFFIC_MODE(enum dsi_traffic_mode val) #define DSI_VID_CFG0_HSA_POWER_STOP 0x00010000 #define DSI_VID_CFG0_HBP_POWER_STOP 0x00100000 #define DSI_VID_CFG0_HFP_POWER_STOP 0x01000000 +#define DSI_VID_CFG0_DATABUS_WIDEN 0x02000000 #define DSI_VID_CFG0_PULSE_MODE_HSA_HE 0x10000000 #define REG_DSI_VID_CFG1 0x0000001c diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c index deeecdfd6c4e..f2c1cbd08d4d 100644 --- a/drivers/gpu/drm/msm/dsi/dsi_host.c +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c @@ -745,6 +745,8 @@ static void dsi_ctrl_enable(struct msm_dsi_host *msm_host, data |= DSI_VID_CFG0_TRAFFIC_MODE(dsi_get_traffic_mode(flags)); data |= DSI_VID_CFG0_DST_FORMAT(dsi_get_vid_fmt(mipi_fmt)); data |= DSI_VID_CFG0_VIRT_CHANNEL(msm_host->channel); + if (msm_dsi_host_is_wide_bus_enabled(&msm_host->base)) + data |= DSI_VID_CFG0_DATABUS_WIDEN; dsi_write(msm_host, REG_DSI_VID_CFG0, data); /* Do not swap RGB colors */