Message ID | 20231112184557.3801-1-krzysztof.kozlowski@linaro.org |
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State | New |
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([12.161.6.170]) by smtp.gmail.com with ESMTPSA id o17-20020a258d91000000b00d995a8b956csm1104185ybl.51.2023.11.12.10.46.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 12 Nov 2023 10:46:06 -0800 (PST) From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> To: Andy Gross <agross@kernel.org>, Bjorn Andersson <andersson@kernel.org>, Konrad Dybcio <konrad.dybcio@linaro.org>, Lorenzo Pieralisi <lpieralisi@kernel.org>, =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= <kw@linux.com>, Rob Herring <robh@kernel.org>, Bjorn Helgaas <bhelgaas@google.com>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Manivannan Sadhasivam <mani@kernel.org>, linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Subject: [PATCH 1/2] dt-bindings: PCI: qcom: adjust iommu-map for different SoC Date: Sun, 12 Nov 2023 19:45:56 +0100 Message-Id: <20231112184557.3801-1-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Sun, 12 Nov 2023 10:46:27 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782384993766894532 X-GMAIL-MSGID: 1782384993766894532 |
Series |
[1/2] dt-bindings: PCI: qcom: adjust iommu-map for different SoC
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Commit Message
Krzysztof Kozlowski
Nov. 12, 2023, 6:45 p.m. UTC
The PCIe controller on SDX55 has five entries in its iommu-map, MSM8998
has one and SDM845 has sixteen, so allow wider number of items to fix
dtbs_check warnings like:
qcom-sdx55-mtp.dtb: pcie@1c00000: iommu-map: [[0, 21, 512, 1], [256, 21, 513, 1],
[512, 21, 514, 1], [768, 21, 515, 1], [1024, 21, 516, 1]] is too long
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
Comments
On Sun, Nov 12, 2023 at 07:45:56PM +0100, Krzysztof Kozlowski wrote: > The PCIe controller on SDX55 has five entries in its iommu-map, MSM8998 > has one and SDM845 has sixteen, so allow wider number of items to fix > dtbs_check warnings like: > > qcom-sdx55-mtp.dtb: pcie@1c00000: iommu-map: [[0, 21, 512, 1], [256, 21, 513, 1], > [512, 21, 514, 1], [768, 21, 515, 1], [1024, 21, 516, 1]] is too long > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Thanks, Conor. > --- > Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > index 8bfae8eb79a3..14d25e8a18e4 100644 > --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > @@ -62,7 +62,8 @@ properties: > maxItems: 8 > > iommu-map: > - maxItems: 2 > + minItems: 1 > + maxItems: 16 > > # Common definitions for clocks, clock-names and reset. > # Platform constraints are described later. > -- > 2.34.1 >
On Sun, Nov 12, 2023 at 07:45:56PM +0100, Krzysztof Kozlowski wrote: > The PCIe controller on SDX55 has five entries in its iommu-map, MSM8998 > has one and SDM845 has sixteen, so allow wider number of items to fix > dtbs_check warnings like: > > qcom-sdx55-mtp.dtb: pcie@1c00000: iommu-map: [[0, 21, 512, 1], [256, 21, 513, 1], > [512, 21, 514, 1], [768, 21, 515, 1], [1024, 21, 516, 1]] is too long > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> - Mani > --- > Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > index 8bfae8eb79a3..14d25e8a18e4 100644 > --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml > @@ -62,7 +62,8 @@ properties: > maxItems: 8 > > iommu-map: > - maxItems: 2 > + minItems: 1 > + maxItems: 16 > > # Common definitions for clocks, clock-names and reset. > # Platform constraints are described later. > -- > 2.34.1 >
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml index 8bfae8eb79a3..14d25e8a18e4 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml @@ -62,7 +62,8 @@ properties: maxItems: 8 iommu-map: - maxItems: 2 + minItems: 1 + maxItems: 16 # Common definitions for clocks, clock-names and reset. # Platform constraints are described later.