diff mbox series

[1/5] cpufreq: amd-pstate: cpufreq: amd-pstate: reset MSR_AMD_PERF_CTL register at init

Message ID 20221117024955.3319484-2-Perry.Yuan@amd.com
State New
Headers
Series AMD Pstate driver Urgent Change |

Commit Message

Yuan, Perry Nov. 17, 2022, 2:49 a.m. UTC 
  From: Wyes Karny <wyes.karny@amd.com>

MSR_AMD_PERF_CTL is guaranteed to be 0 on a cold boot. However, on a
kexec boot, for instance, it may have a non-zero value (if the cpu was
in a non-P0 Pstate).  In such cases, the cores with non-P0 Pstates at
boot will never be pushed to P0, let alone boost frequencies.

Kexec is a common workflow for reboot on Linux and this creates a
regression in performance. Fix it by explicitly setting the
MSR_AMD_PERF_CTL to 0 during amd_pstate driver init.

Cc: stable@vger.kernel.org
Signed-off-by: Wyes Karny <wyes.karny@amd.com>
Signed-off-by: Perry Yuan <Perry.Yuan@amd.com>
---
 drivers/cpufreq/amd-pstate.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

Comments

Gautham R. Shenoy Nov. 17, 2022, 4:08 a.m. UTC | #1 
On Thu, Nov 17, 2022 at 10:49:51AM +0800, Perry Yuan wrote:
> From: Wyes Karny <wyes.karny@amd.com>
> 
> MSR_AMD_PERF_CTL is guaranteed to be 0 on a cold boot. However, on a
> kexec boot, for instance, it may have a non-zero value (if the cpu was
> in a non-P0 Pstate).  In such cases, the cores with non-P0 Pstates at
> boot will never be pushed to P0, let alone boost frequencies.
> 
> Kexec is a common workflow for reboot on Linux and this creates a
> regression in performance. Fix it by explicitly setting the
> MSR_AMD_PERF_CTL to 0 during amd_pstate driver init.
> 
> Cc: stable@vger.kernel.org
> Signed-off-by: Wyes Karny <wyes.karny@amd.com>
> Signed-off-by: Perry Yuan <Perry.Yuan@amd.com>

Reviewed-by: Gautham R. Shenoy <gautham.shenoy@amd.com>

> ---
>  drivers/cpufreq/amd-pstate.c | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c
> index ace7d50cf2ac..d844c6f97caf 100644
> --- a/drivers/cpufreq/amd-pstate.c
> +++ b/drivers/cpufreq/amd-pstate.c
> @@ -424,12 +424,22 @@ static void amd_pstate_boost_init(struct amd_cpudata *cpudata)
>  	amd_pstate_driver.boost_enabled = true;
>  }
>  
> +static void amd_perf_ctl_reset(unsigned int cpu)
> +{
> +	wrmsrl_on_cpu(cpu, MSR_AMD_PERF_CTL, 0);
> +}
> +
>  static int amd_pstate_cpu_init(struct cpufreq_policy *policy)
>  {
>  	int min_freq, max_freq, nominal_freq, lowest_nonlinear_freq, ret;
>  	struct device *dev;
>  	struct amd_cpudata *cpudata;
>  
> +	/*
> +	 * Resetting PERF_CTL_MSR will put the CPU in P0 frequency,
> +	 * which is ideal for initialization process.
> +	 */
> +	amd_perf_ctl_reset(policy->cpu);
>  	dev = get_cpu_device(policy->cpu);
>  	if (!dev)
>  		return -ENODEV;
> -- 
> 2.25.1
>
Wyes Karny Nov. 17, 2022, 5:03 a.m. UTC | #2 
On 11/17/2022 8:19 AM, Perry Yuan wrote:
> From: Wyes Karny <wyes.karny@amd.com>
> 
> MSR_AMD_PERF_CTL is guaranteed to be 0 on a cold boot. However, on a
> kexec boot, for instance, it may have a non-zero value (if the cpu was
> in a non-P0 Pstate).  In such cases, the cores with non-P0 Pstates at
> boot will never be pushed to P0, let alone boost frequencies.
> 
> Kexec is a common workflow for reboot on Linux and this creates a
> regression in performance. Fix it by explicitly setting the
> MSR_AMD_PERF_CTL to 0 during amd_pstate driver init.
> 
> Cc: stable@vger.kernel.org
> Signed-off-by: Wyes Karny <wyes.karny@amd.com>
> Signed-off-by: Perry Yuan <Perry.Yuan@amd.com>

Tested-by: Wyes Karny <wyes.karny@amd.com>

> ---
>  drivers/cpufreq/amd-pstate.c | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c
> index ace7d50cf2ac..d844c6f97caf 100644
> --- a/drivers/cpufreq/amd-pstate.c
> +++ b/drivers/cpufreq/amd-pstate.c
> @@ -424,12 +424,22 @@ static void amd_pstate_boost_init(struct amd_cpudata *cpudata)
>  	amd_pstate_driver.boost_enabled = true;
>  }
>  
> +static void amd_perf_ctl_reset(unsigned int cpu)
> +{
> +	wrmsrl_on_cpu(cpu, MSR_AMD_PERF_CTL, 0);
> +}
> +
>  static int amd_pstate_cpu_init(struct cpufreq_policy *policy)
>  {
>  	int min_freq, max_freq, nominal_freq, lowest_nonlinear_freq, ret;
>  	struct device *dev;
>  	struct amd_cpudata *cpudata;
>  
> +	/*
> +	 * Resetting PERF_CTL_MSR will put the CPU in P0 frequency,
> +	 * which is ideal for initialization process.
> +	 */
> +	amd_perf_ctl_reset(policy->cpu);
>  	dev = get_cpu_device(policy->cpu);
>  	if (!dev)
>  		return -ENODEV;
diff mbox series

Patch

diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c
index ace7d50cf2ac..d844c6f97caf 100644
--- a/drivers/cpufreq/amd-pstate.c
+++ b/drivers/cpufreq/amd-pstate.c
@@ -424,12 +424,22 @@  static void amd_pstate_boost_init(struct amd_cpudata *cpudata)
 	amd_pstate_driver.boost_enabled = true;
 }
 
+static void amd_perf_ctl_reset(unsigned int cpu)
+{
+	wrmsrl_on_cpu(cpu, MSR_AMD_PERF_CTL, 0);
+}
+
 static int amd_pstate_cpu_init(struct cpufreq_policy *policy)
 {
 	int min_freq, max_freq, nominal_freq, lowest_nonlinear_freq, ret;
 	struct device *dev;
 	struct amd_cpudata *cpudata;
 
+	/*
+	 * Resetting PERF_CTL_MSR will put the CPU in P0 frequency,
+	 * which is ideal for initialization process.
+	 */
+	amd_perf_ctl_reset(policy->cpu);
 	dev = get_cpu_device(policy->cpu);
 	if (!dev)
 		return -ENODEV;