Message ID | 20231031163104.112469-49-benjamin.gaignard@collabora.com |
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State | New |
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(unknown [IPv6:2a01:e0a:120:3210:c562:2ef4:80c0:92f]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: benjamin.gaignard) by madras.collabora.co.uk (Postfix) with ESMTPSA id E07F766073AE; Tue, 31 Oct 2023 16:32:47 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1698769968; bh=deJM8nlQ4g4jiYxn4KEycstS3ftyfWcamvuNgnfVl08=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=E6HoUQx7s3zVxyNnV1e60Ff5TnXbsdNzcBE8l4v0fMjjeaXDUIsBpeDaZgAQOd5yl lMTT7CQbxafUn0Om8ceDrN6c/z6vsUNM0GROXPkKX0SIKKsXLYqC/NkPRWObPcE5oa Q4ok3Vy4fa0cpewdkkjPGB0g0At4HTJQ01ktbx0l3c9V7ykUDu+FLSGeUrxAlzjK1q wLsGXR6BThyFLi3/ffd3cENSlINOdHPd9hSaXLdzqECPmpDxP5M8G4O7IYOP8BbC8i dHURvJ6oE1YGWCBa06BSiJuIQeOGbJYOVuoZf+HMZKhFx7Mcyi51z9FEsawvi+HFEx menpberQ4M0+Q== From: Benjamin Gaignard <benjamin.gaignard@collabora.com> To: mchehab@kernel.org, tfiga@chromium.org, m.szyprowski@samsung.com, ming.qian@nxp.com, ezequiel@vanguardiasur.com.ar, p.zabel@pengutronix.de, gregkh@linuxfoundation.org, hverkuil-cisco@xs4all.nl, nicolas.dufresne@collabora.com Cc: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-staging@lists.linux.dev, kernel@collabora.com, Benjamin Gaignard <benjamin.gaignard@collabora.com> Subject: [PATCH v14 48/56] media: verisilicon: Store chroma and motion vectors offset Date: Tue, 31 Oct 2023 17:30:56 +0100 Message-Id: <20231031163104.112469-49-benjamin.gaignard@collabora.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231031163104.112469-1-benjamin.gaignard@collabora.com> References: <20231031163104.112469-1-benjamin.gaignard@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on fry.vger.email Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (fry.vger.email [0.0.0.0]); Tue, 31 Oct 2023 09:36:21 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781289685573399234 X-GMAIL-MSGID: 1781289685573399234 |
Series |
Add DELETE_BUF ioctl
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Commit Message
Benjamin Gaignard
Oct. 31, 2023, 4:30 p.m. UTC
Store computed values of chroma and motion vectors offset because
they depends on width and height values which change if the resolution
change.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
CC: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
CC: Philipp Zabel <p.zabel@pengutronix.de>
---
drivers/media/platform/verisilicon/hantro.h | 2 ++
drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c | 6 ++++--
2 files changed, 6 insertions(+), 2 deletions(-)
Comments
W dniu 31.10.2023 o 17:30, Benjamin Gaignard pisze: > Store computed values of chroma and motion vectors offset because > they depends on width and height values which change if the resolution > change. > > Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com> Reviewed-by: Andrzej Pietrasiewicz <andrzej.p@collabora.com> > CC: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> > CC: Philipp Zabel <p.zabel@pengutronix.de> > --- > drivers/media/platform/verisilicon/hantro.h | 2 ++ > drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c | 6 ++++-- > 2 files changed, 6 insertions(+), 2 deletions(-) > > diff --git a/drivers/media/platform/verisilicon/hantro.h b/drivers/media/platform/verisilicon/hantro.h > index 0948b04a9f8d..6f5eb975d0e3 100644 > --- a/drivers/media/platform/verisilicon/hantro.h > +++ b/drivers/media/platform/verisilicon/hantro.h > @@ -328,6 +328,8 @@ struct hantro_vp9_decoded_buffer_info { > /* Info needed when the decoded frame serves as a reference frame. */ > unsigned short width; > unsigned short height; > + size_t chroma_offset; > + size_t mv_offset; > u32 bit_depth : 4; > }; > > diff --git a/drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c b/drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c > index 6fc4b555517f..6db1c32fce4d 100644 > --- a/drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c > +++ b/drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c > @@ -158,9 +158,11 @@ static void config_output(struct hantro_ctx *ctx, > > chroma_addr = luma_addr + chroma_offset(ctx, dec_params); > hantro_write_addr(ctx->dev, G2_OUT_CHROMA_ADDR, chroma_addr); > + dst->vp9.chroma_offset = chroma_offset(ctx, dec_params); > > mv_addr = luma_addr + mv_offset(ctx, dec_params); > hantro_write_addr(ctx->dev, G2_OUT_MV_ADDR, mv_addr); > + dst->vp9.mv_offset = mv_offset(ctx, dec_params); > } > > struct hantro_vp9_ref_reg { > @@ -195,7 +197,7 @@ static void config_ref(struct hantro_ctx *ctx, > luma_addr = hantro_get_dec_buf_addr(ctx, &buf->base.vb.vb2_buf); > hantro_write_addr(ctx->dev, ref_reg->y_base, luma_addr); > > - chroma_addr = luma_addr + chroma_offset(ctx, dec_params); > + chroma_addr = luma_addr + buf->vp9.chroma_offset; > hantro_write_addr(ctx->dev, ref_reg->c_base, chroma_addr); > } > > @@ -238,7 +240,7 @@ static void config_ref_registers(struct hantro_ctx *ctx, > config_ref(ctx, dst, &ref_regs[2], dec_params, dec_params->alt_frame_ts); > > mv_addr = hantro_get_dec_buf_addr(ctx, &mv_ref->base.vb.vb2_buf) + > - mv_offset(ctx, dec_params); > + mv_ref->vp9.mv_offset; > hantro_write_addr(ctx->dev, G2_REF_MV_ADDR(0), mv_addr); > > hantro_reg_write(ctx->dev, &vp9_last_sign_bias,
diff --git a/drivers/media/platform/verisilicon/hantro.h b/drivers/media/platform/verisilicon/hantro.h index 0948b04a9f8d..6f5eb975d0e3 100644 --- a/drivers/media/platform/verisilicon/hantro.h +++ b/drivers/media/platform/verisilicon/hantro.h @@ -328,6 +328,8 @@ struct hantro_vp9_decoded_buffer_info { /* Info needed when the decoded frame serves as a reference frame. */ unsigned short width; unsigned short height; + size_t chroma_offset; + size_t mv_offset; u32 bit_depth : 4; }; diff --git a/drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c b/drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c index 6fc4b555517f..6db1c32fce4d 100644 --- a/drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c +++ b/drivers/media/platform/verisilicon/hantro_g2_vp9_dec.c @@ -158,9 +158,11 @@ static void config_output(struct hantro_ctx *ctx, chroma_addr = luma_addr + chroma_offset(ctx, dec_params); hantro_write_addr(ctx->dev, G2_OUT_CHROMA_ADDR, chroma_addr); + dst->vp9.chroma_offset = chroma_offset(ctx, dec_params); mv_addr = luma_addr + mv_offset(ctx, dec_params); hantro_write_addr(ctx->dev, G2_OUT_MV_ADDR, mv_addr); + dst->vp9.mv_offset = mv_offset(ctx, dec_params); } struct hantro_vp9_ref_reg { @@ -195,7 +197,7 @@ static void config_ref(struct hantro_ctx *ctx, luma_addr = hantro_get_dec_buf_addr(ctx, &buf->base.vb.vb2_buf); hantro_write_addr(ctx->dev, ref_reg->y_base, luma_addr); - chroma_addr = luma_addr + chroma_offset(ctx, dec_params); + chroma_addr = luma_addr + buf->vp9.chroma_offset; hantro_write_addr(ctx->dev, ref_reg->c_base, chroma_addr); } @@ -238,7 +240,7 @@ static void config_ref_registers(struct hantro_ctx *ctx, config_ref(ctx, dst, &ref_regs[2], dec_params, dec_params->alt_frame_ts); mv_addr = hantro_get_dec_buf_addr(ctx, &mv_ref->base.vb.vb2_buf) + - mv_offset(ctx, dec_params); + mv_ref->vp9.mv_offset; hantro_write_addr(ctx->dev, G2_REF_MV_ADDR(0), mv_addr); hantro_reg_write(ctx->dev, &vp9_last_sign_bias,