Message ID | 20231106103259.703417-3-jbrunet@baylibre.com |
---|---|
State | New |
Headers |
Return-Path: <linux-kernel-owner@vger.kernel.org> Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:8f47:0:b0:403:3b70:6f57 with SMTP id j7csp2563807vqu; Mon, 6 Nov 2023 02:33:38 -0800 (PST) X-Google-Smtp-Source: AGHT+IGwRx4rtAUB2OWBD/NxCv5ixQQzuSwgeHGVeGlnsSgSQ1+OM+l5dW6TfE9oV79OR60leXWS X-Received: by 2002:a17:903:11c3:b0:1cc:5549:aabd with SMTP id q3-20020a17090311c300b001cc5549aabdmr21852109plh.8.1699266818346; Mon, 06 Nov 2023 02:33:38 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699266818; cv=none; d=google.com; s=arc-20160816; b=d00DUg077sAkLruJYv2vxoug6K5CG9/OcfV/Bgrkd/WGPd+aQsEpluNj0MnjaWoWff mfw+ikn/USRAT2cZ5CT9TmEce3t9XcHvnnR+ef9VN8XXkqMa3rSIdmEcRASk8tImxAU+ styeaXAvrTWdVLmgKy83FeMZQWSZ2z0qtDoNYSxzn7N2z1DnE5OtfJsx8TM6jljJZjva JlQG6Gg0N3981dPIsiz+rbtiHcdEk88o9QeAIphupb1RH60gQ1Kc/jYM67KejH1YP+Rm Vx0PT4c3H7u2VORFU34QVrkY1QxeNt/5j7SrZlSgmVlsGncXlNsR+ealqWtdBvriBFGv rRhQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=CBQ+A9rHpTWs3KpXp33WW8nDFpcoA+H+EybbPKfpqLY=; fh=njdjvPz/8fUgTR5XHfg4rgXpBE+Eb+Wz3ojami6fduM=; b=JktBHQa1gEx/p9vTm5QNgvMrgKTyFTaQ/Bm+uKwnND9ZvyOglgmUPk+zrOViofDEl5 Ue55DImXKNubROo68wjSipskfHvRKRREbvbKz5fvIXZzEeW4pU7Rt01eDsnX4z23nqp1 VMu8DeQVhnzialMnqcZExicy6m1CNcSth48UcWJPPA+7qff7JQViYV4bIkHrzGgAX4Oh wKf9iA4GbCsPjtIayoe6tyJPd8o1aix4NQKR/l/6AXTW7rGkxjQMm8IxDOvFfhTscq8k JxKI+PObQmafTzuNjuWhuBMgTiJCr95YA4JIawEMKS1G+yHP5srW/o7Fj1WHon/Y1oXw BNIQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20230601.gappssmtp.com header.s=20230601 header.b="mwewnK/A"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from snail.vger.email (snail.vger.email. [23.128.96.37]) by mx.google.com with ESMTPS id lo7-20020a170903434700b001c9af7debbasi7607950plb.520.2023.11.06.02.33.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Nov 2023 02:33:38 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) client-ip=23.128.96.37; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20230601.gappssmtp.com header.s=20230601 header.b="mwewnK/A"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id 8620680658DE; Mon, 6 Nov 2023 02:33:37 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231260AbjKFKde (ORCPT <rfc822;jaysivo@gmail.com> + 36 others); Mon, 6 Nov 2023 05:33:34 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39994 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231171AbjKFKd1 (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Mon, 6 Nov 2023 05:33:27 -0500 Received: from mail-wr1-x435.google.com (mail-wr1-x435.google.com [IPv6:2a00:1450:4864:20::435]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CB2F6134 for <linux-kernel@vger.kernel.org>; Mon, 6 Nov 2023 02:33:22 -0800 (PST) Received: by mail-wr1-x435.google.com with SMTP id ffacd0b85a97d-32f7c80ab33so2591924f8f.0 for <linux-kernel@vger.kernel.org>; Mon, 06 Nov 2023 02:33:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1699266801; x=1699871601; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=CBQ+A9rHpTWs3KpXp33WW8nDFpcoA+H+EybbPKfpqLY=; b=mwewnK/A2XA9c0ngLeYhwiW8sP/L5Jn6gGMZu9z4WhW5l4JvgmqLJmUJa4jE+UDncx aPEvvC0X/nvEulsZNlRRQBhiHdSRVOXzeSOpukfKJq6bMBNHJDpXfjGa0rBglhznMGX8 GDdggr9FcyWuDbQm5q6bAVWPuG5xQxGcDCNaHBcE4Ft7M5y+t4M1+HB46/m0+vlNViDp KcyDorut+PRC91zhqaOyrzw0ld2tFMShvNG3Qt/SOWIoYUS9n6gZQG2sw9xcU76ttefQ uC7oF4F9MovIltpNMAaY4foIP0msnbifeA1EM3enirNJsMkH2DRvRj/0sgQS2KQKtoys 1/OQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699266801; x=1699871601; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=CBQ+A9rHpTWs3KpXp33WW8nDFpcoA+H+EybbPKfpqLY=; b=A79FMieCv9U0iwyVG/woDHn5kUxjSvR/bp9Oi/GxJuQGwm/6HjuTRT7WyO8Y4KheQC eLMMLHhAsX4J4PCx9RqBVDVGQQc3N8OztECIMjiC+j4GvPogTZCUyIET94Fbty8t/ttV v8eVj82h14TtpPhf4qmGX1cz1OSp8L6/C1BLDPLJALu3kYjpua4LmiwQR0LN247lv/tn rUzR08oH0tIhoGSOTxvuJ7N4RKHoior7IZA52W6DTrot14zXvlyGETC7qQf37g26G/fo LJ+4nJHYlgUBiTM1T3wrkhIkYMpAuxERZfJI5FBGY923BzZf7nm+ddwwJuRxztHTQNtQ BObQ== X-Gm-Message-State: AOJu0YxVVdiALgck1GtaNfCThNTGsNs5u62ZWzYAIZVJPnYuWDB9BpW8 HouPl/QMSsjfxu7dhJPDyP1QUg== X-Received: by 2002:adf:ecd0:0:b0:32d:a717:717a with SMTP id s16-20020adfecd0000000b0032da717717amr18098713wro.40.1699266801294; Mon, 06 Nov 2023 02:33:21 -0800 (PST) Received: from toaster.lan ([2a01:e0a:3c5:5fb1:fabf:ec8c:b644:5d3]) by smtp.googlemail.com with ESMTPSA id d1-20020a056000114100b0032415213a6fsm9033602wrx.87.2023.11.06.02.33.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Nov 2023 02:33:21 -0800 (PST) From: Jerome Brunet <jbrunet@baylibre.com> To: Thierry Reding <thierry.reding@gmail.com>, Neil Armstrong <neil.armstrong@linaro.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org> Cc: Jerome Brunet <jbrunet@baylibre.com>, Kevin Hilman <khilman@baylibre.com>, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-pwm@vger.kernel.org, JunYi Zhao <junyi.zhao@amlogic.com> Subject: [PATCH 2/6] dt-bindings: pwm: amlogic: add new compatible for meson8 pwm type Date: Mon, 6 Nov 2023 11:32:49 +0100 Message-ID: <20231106103259.703417-3-jbrunet@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231106103259.703417-1-jbrunet@baylibre.com> References: <20231106103259.703417-1-jbrunet@baylibre.com> MIME-Version: 1.0 X-Patchwork-Bot: notify Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Mon, 06 Nov 2023 02:33:37 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781810403338160301 X-GMAIL-MSGID: 1781810403338160301 |
Series |
pwm: meson: dt-bindings fixup
|
|
Commit Message
Jerome Brunet
Nov. 6, 2023, 10:32 a.m. UTC
Add a new compatible for the pwm found in the meson8 to sm1 Amlogic SoCs.
The previous clock bindings for these SoCs described the driver and not the
HW itself. The clock provided was used to set the parent of the input clock
mux among the possible parents hard-coded in the driver.
The new bindings allows to describe the actual clock inputs of the PWM in
DT, like most bindings do, instead of relying of hard-coded data.
The new bindings make the old one deprecated.
There is enough experience on this HW to know that the PWM is exactly the
same all the supported SoCs. There is no need for a per-SoC compatible.
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
.../devicetree/bindings/pwm/pwm-amlogic.yaml | 35 +++++++++++++++++--
1 file changed, 33 insertions(+), 2 deletions(-)
Comments
On Mon 06 Nov 2023 at 11:32, Jerome Brunet <jbrunet@baylibre.com> wrote: > Add a new compatible for the pwm found in the meson8 to sm1 Amlogic SoCs. > > The previous clock bindings for these SoCs described the driver and not the > HW itself. The clock provided was used to set the parent of the input clock > mux among the possible parents hard-coded in the driver. > > The new bindings allows to describe the actual clock inputs of the PWM in > DT, like most bindings do, instead of relying of hard-coded data. > > The new bindings make the old one deprecated. > > There is enough experience on this HW to know that the PWM is exactly the > same all the supported SoCs. There is no need for a per-SoC compatible. > > Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> > --- > .../devicetree/bindings/pwm/pwm-amlogic.yaml | 35 +++++++++++++++++-- > 1 file changed, 33 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml b/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml > index 754b70fc2db0..3aa522c4cae4 100644 > --- a/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml > +++ b/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml > @@ -22,6 +22,7 @@ properties: > - amlogic,meson-g12a-ao-pwm-ab > - amlogic,meson-g12a-ao-pwm-cd > - amlogic,meson-s4-pwm > + - amlogic,meson8-pwm-v2 > - items: > - const: amlogic,meson-gx-pwm > - const: amlogic,meson-gxbb-pwm > @@ -37,7 +38,7 @@ properties: > > clocks: > minItems: 1 > - maxItems: 2 > + maxItems: 4 > > clock-names: > minItems: 1 > @@ -70,11 +71,14 @@ allOf: > - amlogic,meson-gx-pwm > - amlogic,meson-gx-ao-pwm > then: > - # Historic bindings tied to the driver implementation > + # Obsolete historic bindings tied to the driver implementation > # The clocks provided here are meant to be matched with the input > # known (hard-coded) in the driver and used to select pwm clock > # source. Currently, the linux driver ignores this. > + deprecated: true > properties: > + clocks: > + maxItems: 2 > clock-names: > oneOf: > - items: > @@ -83,6 +87,26 @@ allOf: > - const: clkin0 > - const: clkin1 > > + # Newer binding where clock describe the actual clock inputs of the pwm > + # block. These are necessary but some inputs may be grounded. > + - if: > + properties: > + compatible: > + contains: > + enum: > + - amlogic,meson8b-pwm-v2 Made a mistake here while making a last minute modification it should be meson8, not meson8b Will fix this in v2. > + then: > + properties: > + clocks: > + minItems: 1 > + items: > + - description: input clock 0 of the pwm block > + - description: input clock 1 of the pwm block > + - description: input clock 2 of the pwm block > + - description: input clock 3 of the pwm block > + required: > + - clocks > + > # Newer IP block take a single input per channel, instead of 4 inputs > # for both channels > - if: > @@ -111,6 +135,13 @@ examples: > clock-names = "clkin0", "clkin1"; > #pwm-cells = <3>; > }; > + - | > + pwm@2000 { > + compatible = "amlogic,meson8-pwm-v2"; > + reg = <0x1000 0x10>; > + clocks = <&xtal>, <0>, <&fdiv4>, <&fdiv5>; > + #pwm-cells = <3>; > + }; > - | > pwm@1000 { > compatible = "amlogic,meson-s4-pwm";
On Mon, Nov 06, 2023 at 11:32:49AM +0100, Jerome Brunet wrote: > Add a new compatible for the pwm found in the meson8 to sm1 Amlogic SoCs. > > The previous clock bindings for these SoCs described the driver and not the > HW itself. The clock provided was used to set the parent of the input clock > mux among the possible parents hard-coded in the driver. > > The new bindings allows to describe the actual clock inputs of the PWM in > DT, like most bindings do, instead of relying of hard-coded data. > > The new bindings make the old one deprecated. > > There is enough experience on this HW to know that the PWM is exactly the > same all the supported SoCs. There is no need for a per-SoC compatible. > > Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> > --- > .../devicetree/bindings/pwm/pwm-amlogic.yaml | 35 +++++++++++++++++-- > 1 file changed, 33 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml b/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml > index 754b70fc2db0..3aa522c4cae4 100644 > --- a/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml > +++ b/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml > @@ -22,6 +22,7 @@ properties: > - amlogic,meson-g12a-ao-pwm-ab > - amlogic,meson-g12a-ao-pwm-cd > - amlogic,meson-s4-pwm > + - amlogic,meson8-pwm-v2 > - items: > - const: amlogic,meson-gx-pwm > - const: amlogic,meson-gxbb-pwm > @@ -37,7 +38,7 @@ properties: > > clocks: > minItems: 1 > - maxItems: 2 > + maxItems: 4 > > clock-names: > minItems: 1 > @@ -70,11 +71,14 @@ allOf: > - amlogic,meson-gx-pwm > - amlogic,meson-gx-ao-pwm > then: > - # Historic bindings tied to the driver implementation > + # Obsolete historic bindings tied to the driver implementation > # The clocks provided here are meant to be matched with the input > # known (hard-coded) in the driver and used to select pwm clock > # source. Currently, the linux driver ignores this. > + deprecated: true > properties: > + clocks: > + maxItems: 2 > clock-names: > oneOf: > - items: > @@ -83,6 +87,26 @@ allOf: > - const: clkin0 > - const: clkin1 > > + # Newer binding where clock describe the actual clock inputs of the pwm > + # block. These are necessary but some inputs may be grounded. > + - if: > + properties: > + compatible: > + contains: > + enum: > + - amlogic,meson8b-pwm-v2 > + then: > + properties: > + clocks: > + minItems: 1 > + items: > + - description: input clock 0 of the pwm block > + - description: input clock 1 of the pwm block > + - description: input clock 2 of the pwm block > + - description: input clock 3 of the pwm block > + required: > + - clocks Again, clock-names?
On Wed 08 Nov 2023 at 11:06, Rob Herring <robh@kernel.org> wrote: > On Mon, Nov 06, 2023 at 11:32:49AM +0100, Jerome Brunet wrote: >> Add a new compatible for the pwm found in the meson8 to sm1 Amlogic SoCs. >> >> The previous clock bindings for these SoCs described the driver and not the >> HW itself. The clock provided was used to set the parent of the input clock >> mux among the possible parents hard-coded in the driver. >> >> The new bindings allows to describe the actual clock inputs of the PWM in >> DT, like most bindings do, instead of relying of hard-coded data. >> >> The new bindings make the old one deprecated. >> >> There is enough experience on this HW to know that the PWM is exactly the >> same all the supported SoCs. There is no need for a per-SoC compatible. >> >> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> >> --- >> .../devicetree/bindings/pwm/pwm-amlogic.yaml | 35 +++++++++++++++++-- >> 1 file changed, 33 insertions(+), 2 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml b/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml >> index 754b70fc2db0..3aa522c4cae4 100644 >> --- a/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml >> +++ b/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml >> @@ -22,6 +22,7 @@ properties: >> - amlogic,meson-g12a-ao-pwm-ab >> - amlogic,meson-g12a-ao-pwm-cd >> - amlogic,meson-s4-pwm >> + - amlogic,meson8-pwm-v2 >> - items: >> - const: amlogic,meson-gx-pwm >> - const: amlogic,meson-gxbb-pwm >> @@ -37,7 +38,7 @@ properties: >> >> clocks: >> minItems: 1 >> - maxItems: 2 >> + maxItems: 4 >> >> clock-names: >> minItems: 1 >> @@ -70,11 +71,14 @@ allOf: >> - amlogic,meson-gx-pwm >> - amlogic,meson-gx-ao-pwm >> then: >> - # Historic bindings tied to the driver implementation >> + # Obsolete historic bindings tied to the driver implementation >> # The clocks provided here are meant to be matched with the input >> # known (hard-coded) in the driver and used to select pwm clock >> # source. Currently, the linux driver ignores this. >> + deprecated: true >> properties: >> + clocks: >> + maxItems: 2 >> clock-names: >> oneOf: >> - items: >> @@ -83,6 +87,26 @@ allOf: >> - const: clkin0 >> - const: clkin1 >> >> + # Newer binding where clock describe the actual clock inputs of the pwm >> + # block. These are necessary but some inputs may be grounded. >> + - if: >> + properties: >> + compatible: >> + contains: >> + enum: >> + - amlogic,meson8b-pwm-v2 >> + then: >> + properties: >> + clocks: >> + minItems: 1 >> + items: >> + - description: input clock 0 of the pwm block >> + - description: input clock 1 of the pwm block >> + - description: input clock 2 of the pwm block >> + - description: input clock 3 of the pwm block >> + required: >> + - clocks > > Again, clock-names? yes, same thing
diff --git a/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml b/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml index 754b70fc2db0..3aa522c4cae4 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml +++ b/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml @@ -22,6 +22,7 @@ properties: - amlogic,meson-g12a-ao-pwm-ab - amlogic,meson-g12a-ao-pwm-cd - amlogic,meson-s4-pwm + - amlogic,meson8-pwm-v2 - items: - const: amlogic,meson-gx-pwm - const: amlogic,meson-gxbb-pwm @@ -37,7 +38,7 @@ properties: clocks: minItems: 1 - maxItems: 2 + maxItems: 4 clock-names: minItems: 1 @@ -70,11 +71,14 @@ allOf: - amlogic,meson-gx-pwm - amlogic,meson-gx-ao-pwm then: - # Historic bindings tied to the driver implementation + # Obsolete historic bindings tied to the driver implementation # The clocks provided here are meant to be matched with the input # known (hard-coded) in the driver and used to select pwm clock # source. Currently, the linux driver ignores this. + deprecated: true properties: + clocks: + maxItems: 2 clock-names: oneOf: - items: @@ -83,6 +87,26 @@ allOf: - const: clkin0 - const: clkin1 + # Newer binding where clock describe the actual clock inputs of the pwm + # block. These are necessary but some inputs may be grounded. + - if: + properties: + compatible: + contains: + enum: + - amlogic,meson8b-pwm-v2 + then: + properties: + clocks: + minItems: 1 + items: + - description: input clock 0 of the pwm block + - description: input clock 1 of the pwm block + - description: input clock 2 of the pwm block + - description: input clock 3 of the pwm block + required: + - clocks + # Newer IP block take a single input per channel, instead of 4 inputs # for both channels - if: @@ -111,6 +135,13 @@ examples: clock-names = "clkin0", "clkin1"; #pwm-cells = <3>; }; + - | + pwm@2000 { + compatible = "amlogic,meson8-pwm-v2"; + reg = <0x1000 0x10>; + clocks = <&xtal>, <0>, <&fdiv4>, <&fdiv5>; + #pwm-cells = <3>; + }; - | pwm@1000 { compatible = "amlogic,meson-s4-pwm";