Message ID | 20231106103259.703417-2-jbrunet@baylibre.com |
---|---|
State | New |
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Mon, 06 Nov 2023 02:33:20 -0800 (PST) Received: from toaster.lan ([2a01:e0a:3c5:5fb1:fabf:ec8c:b644:5d3]) by smtp.googlemail.com with ESMTPSA id d1-20020a056000114100b0032415213a6fsm9033602wrx.87.2023.11.06.02.33.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Nov 2023 02:33:20 -0800 (PST) From: Jerome Brunet <jbrunet@baylibre.com> To: Thierry Reding <thierry.reding@gmail.com>, Neil Armstrong <neil.armstrong@linaro.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org> Cc: Jerome Brunet <jbrunet@baylibre.com>, Kevin Hilman <khilman@baylibre.com>, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-pwm@vger.kernel.org, JunYi Zhao <junyi.zhao@amlogic.com> Subject: [PATCH 1/6] dt-bindings: pwm: amlogic: fix s4 bindings Date: Mon, 6 Nov 2023 11:32:48 +0100 Message-ID: <20231106103259.703417-2-jbrunet@baylibre.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231106103259.703417-1-jbrunet@baylibre.com> References: <20231106103259.703417-1-jbrunet@baylibre.com> MIME-Version: 1.0 X-Patchwork-Bot: notify Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on fry.vger.email Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (fry.vger.email [0.0.0.0]); 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Series |
pwm: meson: dt-bindings fixup
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Commit Message
Jerome Brunet
Nov. 6, 2023, 10:32 a.m. UTC
s4 has been added to the compatible list while converting the Amlogic PWM
binding documentation from txt to yaml.
However, on the s4, the clock bindings have different meaning compared to
previous SoCs.
On previous SoCs the clock bindings used to describe which input the PWM
channel multiplexer should pick among its possible parents.
This is very much tied to the driver implementation, instead of describing
the HW for what it is. When support for the Amlogic PWM was first added,
how to deal with clocks through DT was not as clear as it nowadays.
The Linux driver now ignores this DT setting, but still relies on the
hard-coded list of clock sources.
On the s4, the input multiplexer is gone. The clock bindings actually
describe the clock as it exists, not a setting. The property has a
different meaning, even if it is still 2 clocks and it would pass the check
when support is actually added.
Also the s4 cannot work if the clocks are not provided, so the property no
longer optional.
Finally, for once it makes sense to see the input as being numbered
somehow. No need to bother with clock-names on the s4 type of PWM.
Fixes: 43a1c4ff3977 ("dt-bindings: pwm: Convert Amlogic Meson PWM binding")
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
---
.../devicetree/bindings/pwm/pwm-amlogic.yaml | 68 ++++++++++++++++---
1 file changed, 59 insertions(+), 9 deletions(-)
Comments
On Mon, Nov 06, 2023 at 11:32:48AM +0100, Jerome Brunet wrote: > s4 has been added to the compatible list while converting the Amlogic PWM > binding documentation from txt to yaml. > > However, on the s4, the clock bindings have different meaning compared to > previous SoCs. > > On previous SoCs the clock bindings used to describe which input the PWM > channel multiplexer should pick among its possible parents. > > This is very much tied to the driver implementation, instead of describing > the HW for what it is. When support for the Amlogic PWM was first added, > how to deal with clocks through DT was not as clear as it nowadays. > The Linux driver now ignores this DT setting, but still relies on the > hard-coded list of clock sources. > > On the s4, the input multiplexer is gone. The clock bindings actually > describe the clock as it exists, not a setting. The property has a > different meaning, even if it is still 2 clocks and it would pass the check > when support is actually added. > > Also the s4 cannot work if the clocks are not provided, so the property no > longer optional. > > Finally, for once it makes sense to see the input as being numbered > somehow. No need to bother with clock-names on the s4 type of PWM. > > Fixes: 43a1c4ff3977 ("dt-bindings: pwm: Convert Amlogic Meson PWM binding") > Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> > --- > .../devicetree/bindings/pwm/pwm-amlogic.yaml | 68 ++++++++++++++++--- > 1 file changed, 59 insertions(+), 9 deletions(-) > > diff --git a/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml b/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml > index 527864a4d855..754b70fc2db0 100644 > --- a/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml > +++ b/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml > @@ -9,9 +9,6 @@ title: Amlogic PWM > maintainers: > - Heiner Kallweit <hkallweit1@gmail.com> > > -allOf: > - - $ref: pwm.yaml# > - > properties: > compatible: > oneOf: > @@ -43,12 +40,8 @@ properties: > maxItems: 2 > > clock-names: > - oneOf: > - - items: > - - enum: [clkin0, clkin1] > - - items: > - - const: clkin0 > - - const: clkin1 > + minItems: 1 > + maxItems: 2 > > "#pwm-cells": > const: 3 > @@ -57,6 +50,56 @@ required: > - compatible > - reg > > +allOf: > + - $ref: pwm.yaml# > + > + - if: > + properties: > + compatible: > + contains: > + enum: > + - amlogic,meson8-pwm > + - amlogic,meson8b-pwm > + - amlogic,meson-gxbb-pwm > + - amlogic,meson-gxbb-ao-pwm > + - amlogic,meson-axg-ee-pwm > + - amlogic,meson-axg-ao-pwm > + - amlogic,meson-g12a-ee-pwm > + - amlogic,meson-g12a-ao-pwm-ab > + - amlogic,meson-g12a-ao-pwm-cd > + - amlogic,meson-gx-pwm > + - amlogic,meson-gx-ao-pwm > + then: > + # Historic bindings tied to the driver implementation > + # The clocks provided here are meant to be matched with the input > + # known (hard-coded) in the driver and used to select pwm clock > + # source. Currently, the linux driver ignores this. > + properties: > + clock-names: > + oneOf: > + - items: > + - enum: [clkin0, clkin1] > + - items: > + - const: clkin0 > + - const: clkin1 > + > + # Newer IP block take a single input per channel, instead of 4 inputs > + # for both channels > + - if: > + properties: > + compatible: > + contains: > + enum: > + - amlogic,meson-s4-pwm > + then: > + properties: > + clocks: > + items: > + - description: input clock of PWM channel A > + - description: input clock of PWM channel B > + required: > + - clocks What are the 'clock-names' in this case? Because it's still allowed. Rob
On Wed 08 Nov 2023 at 11:04, Rob Herring <robh@kernel.org> wrote: > On Mon, Nov 06, 2023 at 11:32:48AM +0100, Jerome Brunet wrote: >> s4 has been added to the compatible list while converting the Amlogic PWM >> binding documentation from txt to yaml. >> >> However, on the s4, the clock bindings have different meaning compared to >> previous SoCs. >> >> On previous SoCs the clock bindings used to describe which input the PWM >> channel multiplexer should pick among its possible parents. >> >> This is very much tied to the driver implementation, instead of describing >> the HW for what it is. When support for the Amlogic PWM was first added, >> how to deal with clocks through DT was not as clear as it nowadays. >> The Linux driver now ignores this DT setting, but still relies on the >> hard-coded list of clock sources. >> >> On the s4, the input multiplexer is gone. The clock bindings actually >> describe the clock as it exists, not a setting. The property has a >> different meaning, even if it is still 2 clocks and it would pass the check >> when support is actually added. >> >> Also the s4 cannot work if the clocks are not provided, so the property no >> longer optional. >> >> Finally, for once it makes sense to see the input as being numbered >> somehow. No need to bother with clock-names on the s4 type of PWM. >> >> Fixes: 43a1c4ff3977 ("dt-bindings: pwm: Convert Amlogic Meson PWM binding") >> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> >> --- >> .../devicetree/bindings/pwm/pwm-amlogic.yaml | 68 ++++++++++++++++--- >> 1 file changed, 59 insertions(+), 9 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml b/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml >> index 527864a4d855..754b70fc2db0 100644 >> --- a/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml >> +++ b/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml >> @@ -9,9 +9,6 @@ title: Amlogic PWM >> maintainers: >> - Heiner Kallweit <hkallweit1@gmail.com> >> >> -allOf: >> - - $ref: pwm.yaml# >> - >> properties: >> compatible: >> oneOf: >> @@ -43,12 +40,8 @@ properties: >> maxItems: 2 >> >> clock-names: >> - oneOf: >> - - items: >> - - enum: [clkin0, clkin1] >> - - items: >> - - const: clkin0 >> - - const: clkin1 >> + minItems: 1 >> + maxItems: 2 >> >> "#pwm-cells": >> const: 3 >> @@ -57,6 +50,56 @@ required: >> - compatible >> - reg >> >> +allOf: >> + - $ref: pwm.yaml# >> + >> + - if: >> + properties: >> + compatible: >> + contains: >> + enum: >> + - amlogic,meson8-pwm >> + - amlogic,meson8b-pwm >> + - amlogic,meson-gxbb-pwm >> + - amlogic,meson-gxbb-ao-pwm >> + - amlogic,meson-axg-ee-pwm >> + - amlogic,meson-axg-ao-pwm >> + - amlogic,meson-g12a-ee-pwm >> + - amlogic,meson-g12a-ao-pwm-ab >> + - amlogic,meson-g12a-ao-pwm-cd >> + - amlogic,meson-gx-pwm >> + - amlogic,meson-gx-ao-pwm >> + then: >> + # Historic bindings tied to the driver implementation >> + # The clocks provided here are meant to be matched with the input >> + # known (hard-coded) in the driver and used to select pwm clock >> + # source. Currently, the linux driver ignores this. >> + properties: >> + clock-names: >> + oneOf: >> + - items: >> + - enum: [clkin0, clkin1] >> + - items: >> + - const: clkin0 >> + - const: clkin1 >> + >> + # Newer IP block take a single input per channel, instead of 4 inputs >> + # for both channels >> + - if: >> + properties: >> + compatible: >> + contains: >> + enum: >> + - amlogic,meson-s4-pwm >> + then: >> + properties: >> + clocks: >> + items: >> + - description: input clock of PWM channel A >> + - description: input clock of PWM channel B >> + required: >> + - clocks > > What are the 'clock-names' in this case? Because it's still allowed. > Indeed, it should not be. I should add 'clock-names: false' , right ? > Rob
diff --git a/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml b/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml index 527864a4d855..754b70fc2db0 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml +++ b/Documentation/devicetree/bindings/pwm/pwm-amlogic.yaml @@ -9,9 +9,6 @@ title: Amlogic PWM maintainers: - Heiner Kallweit <hkallweit1@gmail.com> -allOf: - - $ref: pwm.yaml# - properties: compatible: oneOf: @@ -43,12 +40,8 @@ properties: maxItems: 2 clock-names: - oneOf: - - items: - - enum: [clkin0, clkin1] - - items: - - const: clkin0 - - const: clkin1 + minItems: 1 + maxItems: 2 "#pwm-cells": const: 3 @@ -57,6 +50,56 @@ required: - compatible - reg +allOf: + - $ref: pwm.yaml# + + - if: + properties: + compatible: + contains: + enum: + - amlogic,meson8-pwm + - amlogic,meson8b-pwm + - amlogic,meson-gxbb-pwm + - amlogic,meson-gxbb-ao-pwm + - amlogic,meson-axg-ee-pwm + - amlogic,meson-axg-ao-pwm + - amlogic,meson-g12a-ee-pwm + - amlogic,meson-g12a-ao-pwm-ab + - amlogic,meson-g12a-ao-pwm-cd + - amlogic,meson-gx-pwm + - amlogic,meson-gx-ao-pwm + then: + # Historic bindings tied to the driver implementation + # The clocks provided here are meant to be matched with the input + # known (hard-coded) in the driver and used to select pwm clock + # source. Currently, the linux driver ignores this. + properties: + clock-names: + oneOf: + - items: + - enum: [clkin0, clkin1] + - items: + - const: clkin0 + - const: clkin1 + + # Newer IP block take a single input per channel, instead of 4 inputs + # for both channels + - if: + properties: + compatible: + contains: + enum: + - amlogic,meson-s4-pwm + then: + properties: + clocks: + items: + - description: input clock of PWM channel A + - description: input clock of PWM channel B + required: + - clocks + additionalProperties: false examples: @@ -68,3 +111,10 @@ examples: clock-names = "clkin0", "clkin1"; #pwm-cells = <3>; }; + - | + pwm@1000 { + compatible = "amlogic,meson-s4-pwm"; + reg = <0x1000 0x10>; + clocks = <&pwm_src_a>, <&pwm_src_b>; + #pwm-cells = <3>; + };