diff mbox series

[v6,01/20] KVM: x86/pmu: Don't allow exposing unsupported architectural events

Message ID 20231104000239.367005-2-seanjc@google.com
State New
Headers
Series KVM: x86/pmu: selftests: Fixes and new tests |

Commit Message

Sean Christopherson Nov. 4, 2023, 12:02 a.m. UTC 
  Hide architectural events that unsupported according to guest CPUID *or*
hardware, i.e. don't let userspace advertise and potentially program
unsupported architectural events.

Note, KVM already limits the length of the reverse polarity field, only
the mask itself is missing.

Fixes: f5132b01386b ("KVM: Expose a version 2 architectural PMU to a guests")
Cc: stable@vger.kernel.org
Signed-off-by: Sean Christopherson <seanjc@google.com>
---
 arch/x86/kvm/vmx/pmu_intel.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Jim Mattson Nov. 4, 2023, 12:08 p.m. UTC | #1 
On Fri, Nov 3, 2023 at 5:02 PM Sean Christopherson <seanjc@google.com> wrote:
>
> Hide architectural events that unsupported according to guest CPUID *or*
> hardware, i.e. don't let userspace advertise and potentially program
> unsupported architectural events.

The bitmask, pmu->available_event_types, is only used in
intel_hw_event_available(). As discussed
(https://lore.kernel.org/kvm/ZUU12-TUR_1cj47u@google.com/),
intel_hw_event_available() should go away.

> Note, KVM already limits the length of the reverse polarity field, only
> the mask itself is missing.
>
> Fixes: f5132b01386b ("KVM: Expose a version 2 architectural PMU to a guests")
> Cc: stable@vger.kernel.org
> Signed-off-by: Sean Christopherson <seanjc@google.com>
> ---
>  arch/x86/kvm/vmx/pmu_intel.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c
> index 820d3e1f6b4f..1b13a472e3f2 100644
> --- a/arch/x86/kvm/vmx/pmu_intel.c
> +++ b/arch/x86/kvm/vmx/pmu_intel.c
> @@ -533,7 +533,7 @@ static void intel_pmu_refresh(struct kvm_vcpu *vcpu)
>         pmu->counter_bitmask[KVM_PMC_GP] = ((u64)1 << eax.split.bit_width) - 1;
>         eax.split.mask_length = min_t(int, eax.split.mask_length,
>                                       kvm_pmu_cap.events_mask_len);
> -       pmu->available_event_types = ~entry->ebx &
> +       pmu->available_event_types = ~(entry->ebx | kvm_pmu_cap.events_mask) &
>                                         ((1ull << eax.split.mask_length) - 1);
>
>         if (pmu->version == 1) {
> --
> 2.42.0.869.gea05f2083d-goog
>
Sean Christopherson Nov. 6, 2023, 2:43 p.m. UTC | #2 
On Sat, Nov 04, 2023, Jim Mattson wrote:
> On Fri, Nov 3, 2023 at 5:02 PM Sean Christopherson <seanjc@google.com> wrote:
> >
> > Hide architectural events that unsupported according to guest CPUID *or*
> > hardware, i.e. don't let userspace advertise and potentially program
> > unsupported architectural events.
> 
> The bitmask, pmu->available_event_types, is only used in
> intel_hw_event_available(). As discussed
> (https://lore.kernel.org/kvm/ZUU12-TUR_1cj47u@google.com/),
> intel_hw_event_available() should go away.

Ah drat, I completely forgot about this patch when I added the patch to remove
intel_hw_event_available().
diff mbox series

Patch

diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c
index 820d3e1f6b4f..1b13a472e3f2 100644
--- a/arch/x86/kvm/vmx/pmu_intel.c
+++ b/arch/x86/kvm/vmx/pmu_intel.c
@@ -533,7 +533,7 @@  static void intel_pmu_refresh(struct kvm_vcpu *vcpu)
 	pmu->counter_bitmask[KVM_PMC_GP] = ((u64)1 << eax.split.bit_width) - 1;
 	eax.split.mask_length = min_t(int, eax.split.mask_length,
 				      kvm_pmu_cap.events_mask_len);
-	pmu->available_event_types = ~entry->ebx &
+	pmu->available_event_types = ~(entry->ebx | kvm_pmu_cap.events_mask) &
 					((1ull << eax.split.mask_length) - 1);
 
 	if (pmu->version == 1) {