[v2,06/23] arm64: dts: Update cache properties for broadcom
Commit Message
The DeviceTree Specification v0.3 specifies that the cache node
'compatible' and 'cache-level' properties are 'required'. Cf.
s3.8 Multi-level and Shared Cache Nodes
The 'cache-unified' property should be present if one of the
properties for unified cache is present ('cache-size', ...).
Update the Device Trees accordingly.
Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Acked-by: William Zhang <william.zhang@broadcom.com>
---
arch/arm/boot/dts/bcm2711.dtsi | 1 +
arch/arm/boot/dts/bcm2837.dtsi | 1 +
arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi | 1 +
arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi | 1 +
arch/arm64/boot/dts/broadcom/bcmbca/bcm63146.dtsi | 1 +
arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi | 1 +
arch/arm64/boot/dts/broadcom/bcmbca/bcm6813.dtsi | 1 +
arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi | 1 +
arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi | 1 +
arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi | 1 +
arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi | 4 ++++
11 files changed, 14 insertions(+)
Comments
(way too many recipients, gmail's SMTP server would not allow me to
respond unless I moved most people to BCC now done).
On 11/7/22 07:56, Pierre Gondois wrote:
> The DeviceTree Specification v0.3 specifies that the cache node
> 'compatible' and 'cache-level' properties are 'required'. Cf.
> s3.8 Multi-level and Shared Cache Nodes
> The 'cache-unified' property should be present if one of the
> properties for unified cache is present ('cache-size', ...).
>
> Update the Device Trees accordingly.
>
> Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
> Acked-by: William Zhang <william.zhang@broadcom.com>
This looks fine, but incomplete, you seem to have missed:
- adding 'cache-unified' to all of the cache nodes modified in this
patch set that did not have one already
- bcm63148.dtsi, bcm63178.dtsi, bcm6756.dtsi, bcm6846.dtsi,
bcm6855.dtsi, bcm6878.dtsi, bcm47622.dtsi
Thanks
On 11/7/22 18:31, Florian Fainelli wrote:
> (way too many recipients, gmail's SMTP server would not allow me to
> respond unless I moved most people to BCC now done).
>
> On 11/7/22 07:56, Pierre Gondois wrote:
>> The DeviceTree Specification v0.3 specifies that the cache node
>> 'compatible' and 'cache-level' properties are 'required'. Cf.
>> s3.8 Multi-level and Shared Cache Nodes
>> The 'cache-unified' property should be present if one of the
>> properties for unified cache is present ('cache-size', ...).
>>
>> Update the Device Trees accordingly.
>>
>> Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
>> Acked-by: William Zhang <william.zhang@broadcom.com>
>
> This looks fine, but incomplete, you seem to have missed:
>
> - adding 'cache-unified' to all of the cache nodes modified in this
> patch set that did not have one already
>
> - bcm63148.dtsi, bcm63178.dtsi, bcm6756.dtsi, bcm6846.dtsi,
> bcm6855.dtsi, bcm6878.dtsi, bcm47622.dtsi
>
> Thanks
I indeed forgot to update some platforms in the broadcom folder.
The other folders should be complete.
Regards,
Pierre
On 11/7/2022 9:58 AM, Pierre Gondois wrote:
>
>
> On 11/7/22 18:31, Florian Fainelli wrote:
>> (way too many recipients, gmail's SMTP server would not allow me to
>> respond unless I moved most people to BCC now done).
>>
>> On 11/7/22 07:56, Pierre Gondois wrote:
>>> The DeviceTree Specification v0.3 specifies that the cache node
>>> 'compatible' and 'cache-level' properties are 'required'. Cf.
>>> s3.8 Multi-level and Shared Cache Nodes
>>> The 'cache-unified' property should be present if one of the
>>> properties for unified cache is present ('cache-size', ...).
>>>
>>> Update the Device Trees accordingly.
>>>
>>> Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
>>> Acked-by: William Zhang <william.zhang@broadcom.com>
>>
>> This looks fine, but incomplete, you seem to have missed:
>>
>> - adding 'cache-unified' to all of the cache nodes modified in this
>> patch set that did not have one already
>>
>> - bcm63148.dtsi, bcm63178.dtsi, bcm6756.dtsi, bcm6846.dtsi,
>> bcm6855.dtsi, bcm6878.dtsi, bcm47622.dtsi
>>
>> Thanks
>
> I indeed forgot to update some platforms in the broadcom folder.
> The other folders should be complete.
Can I expect a resend in the next few days so we have a chance of
getting that included in 6.2? Thanks
On 11/16/22 19:22, Florian Fainelli wrote:
>
>
> On 11/7/2022 9:58 AM, Pierre Gondois wrote:
>>
>>
>> On 11/7/22 18:31, Florian Fainelli wrote:
>>> (way too many recipients, gmail's SMTP server would not allow me to
>>> respond unless I moved most people to BCC now done).
>>>
>>> On 11/7/22 07:56, Pierre Gondois wrote:
>>>> The DeviceTree Specification v0.3 specifies that the cache node
>>>> 'compatible' and 'cache-level' properties are 'required'. Cf.
>>>> s3.8 Multi-level and Shared Cache Nodes
>>>> The 'cache-unified' property should be present if one of the
>>>> properties for unified cache is present ('cache-size', ...).
>>>>
>>>> Update the Device Trees accordingly.
>>>>
>>>> Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
>>>> Acked-by: William Zhang <william.zhang@broadcom.com>
>>>
>>> This looks fine, but incomplete, you seem to have missed:
>>>
>>> - adding 'cache-unified' to all of the cache nodes modified in this
>>> patch set that did not have one already
>>>
>>> - bcm63148.dtsi, bcm63178.dtsi, bcm6756.dtsi, bcm6846.dtsi,
>>> bcm6855.dtsi, bcm6878.dtsi, bcm47622.dtsi
>>>
>>> Thanks
>>
>> I indeed forgot to update some platforms in the broadcom folder.
>> The other folders should be complete.
>
> Can I expect a resend in the next few days so we have a chance of
> getting that included in 6.2? Thanks
Yes sure. Just to check, the 'cache-unified' property is only required
by the DT spec when there is one of these properties in the cache node:
'cache-[size|line-size|block-size|sets|level]'
So the below doesn't require it. Do you still want to have it added ?
L2_0: l2-cache0 {
compatible = "cache";
cache-level = <2>;
};
@@ -536,6 +536,7 @@ cpu3: cpu@3 {
*/
l2: l2-cache0 {
compatible = "cache";
+ cache-unified;
cache-size = <0x100000>;
cache-line-size = <64>;
cache-sets = <1024>; // 1MiB(size)/64(line-size)=16384ways/16-way set
@@ -115,6 +115,7 @@ cpu3: cpu@3 {
*/
l2: l2-cache0 {
compatible = "cache";
+ cache-unified;
cache-size = <0x80000>;
cache-line-size = <64>;
cache-sets = <512>; // 512KiB(size)/64(line-size)=8192ways/16-way set
@@ -63,6 +63,7 @@ cpu3: cpu@3 {
l2: l2-cache0 {
compatible = "cache";
+ cache-level = <2>;
};
};
@@ -51,6 +51,7 @@ B53_3: cpu@3 {
L2_0: l2-cache0 {
compatible = "cache";
+ cache-level = <2>;
};
};
@@ -35,6 +35,7 @@ B53_1: cpu@1 {
L2_0: l2-cache0 {
compatible = "cache";
+ cache-level = <2>;
};
};
@@ -51,6 +51,7 @@ B53_3: cpu@3 {
L2_0: l2-cache0 {
compatible = "cache";
+ cache-level = <2>;
};
};
@@ -51,6 +51,7 @@ B53_3: cpu@3 {
L2_0: l2-cache0 {
compatible = "cache";
+ cache-level = <2>;
};
};
@@ -35,6 +35,7 @@ B53_1: cpu@1 {
L2_0: l2-cache0 {
compatible = "cache";
+ cache-level = <2>;
};
};
@@ -50,6 +50,7 @@ B53_3: cpu@3 {
};
L2_0: l2-cache0 {
compatible = "cache";
+ cache-level = <2>;
};
};
@@ -79,6 +79,7 @@ A57_3: cpu@3 {
CLUSTER0_L2: l2-cache@0 {
compatible = "cache";
+ cache-level = <2>;
};
};
@@ -108,18 +108,22 @@ cpu@301 {
CLUSTER0_L2: l2-cache@0 {
compatible = "cache";
+ cache-level = <2>;
};
CLUSTER1_L2: l2-cache@100 {
compatible = "cache";
+ cache-level = <2>;
};
CLUSTER2_L2: l2-cache@200 {
compatible = "cache";
+ cache-level = <2>;
};
CLUSTER3_L2: l2-cache@300 {
compatible = "cache";
+ cache-level = <2>;
};
};