Message ID | 20231102193121.1676000-3-hugo@hugovil.com |
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State | New |
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[2620:137:e000::3:7]) by mx.google.com with ESMTPS id s7-20020a170902ea0700b001cc3473657bsi155188plg.215.2023.11.02.12.31.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Nov 2023 12:31:58 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) client-ip=2620:137:e000::3:7; Authentication-Results: mx.google.com; dkim=pass header.i=@hugovil.com header.s=x header.b=z6JXLOUl; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id 07F0182DD0B6; Thu, 2 Nov 2023 12:31:57 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1377246AbjKBTbw (ORCPT <rfc822;heyuhang3455@gmail.com> + 35 others); Thu, 2 Nov 2023 15:31:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37202 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1377141AbjKBTbv (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Thu, 2 Nov 2023 15:31:51 -0400 Received: from mail.hugovil.com (mail.hugovil.com [162.243.120.170]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4D500136; Thu, 2 Nov 2023 12:31:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=hugovil.com ; s=x; h=Subject:Content-Transfer-Encoding:MIME-Version:Message-Id:Date:Cc:To :From:subject:date:message-id:reply-to; bh=blxAISSH0+oHt4BtjKxQqz1cwcnEehoBw2eBFHFwo50=; b=z6JXLOUlj00GrkEd7dfgEg4rCB ll8q3v1s/mcb9OMVS1zImo1p7Az0S1adLHn9IlBl049+PRP7xp5DlErKdExPYaYGTlLcYudJCUdy6 5aaPmWO/zZI5PpEB/WndsOnCmYZgQnRHVZKfPsj/0JIHXLjImvxP6zszs2A2Xl/OKzxM=; Received: from modemcable168.174-80-70.mc.videotron.ca ([70.80.174.168]:46024 helo=pettiford.lan) by mail.hugovil.com with esmtpa (Exim 4.92) (envelope-from <hugo@hugovil.com>) id 1qydPj-00042s-A5; Thu, 02 Nov 2023 15:31:39 -0400 From: Hugo Villeneuve <hugo@hugovil.com> To: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, leoyang.li@nxp.com, robh@kernel.org Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, hugo@hugovil.com, Hugo Villeneuve <hvilleneuve@dimonoff.com>, Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Date: Thu, 2 Nov 2023 15:31:20 -0400 Message-Id: <20231102193121.1676000-3-hugo@hugovil.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231102193121.1676000-1-hugo@hugovil.com> References: <20231102193121.1676000-1-hugo@hugovil.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-SA-Exim-Connect-IP: 70.80.174.168 X-SA-Exim-Mail-From: hugo@hugovil.com X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_PASS,SPF_PASS, T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.6 Subject: [PATCH v3 2/3] dt-bindings: arm: fsl: add RVE gateway board X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on mail.hugovil.com) Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Thu, 02 Nov 2023 12:31:57 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781481884599946482 X-GMAIL-MSGID: 1781481884599946482 |
Series |
board: imx8mn-rve-gateway: add support for RVE gateway board
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Commit Message
Hugo Villeneuve
Nov. 2, 2023, 7:31 p.m. UTC
From: Hugo Villeneuve <hvilleneuve@dimonoff.com> Add DT compatible string for RVE gateway board based on a Variscite VAR-SOM-NANO with a NXP MX8MN nano CPU. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com> --- Documentation/devicetree/bindings/arm/fsl.yaml | 1 + 1 file changed, 1 insertion(+)
Comments
On 02/11/2023 20:31, Hugo Villeneuve wrote: > From: Hugo Villeneuve <hvilleneuve@dimonoff.com> > > Add DT compatible string for RVE gateway board based on a Variscite > VAR-SOM-NANO with a NXP MX8MN nano CPU. > > Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com> > --- > Documentation/devicetree/bindings/arm/fsl.yaml | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml > index 32b195852a75..4cef18e46312 100644 > --- a/Documentation/devicetree/bindings/arm/fsl.yaml > +++ b/Documentation/devicetree/bindings/arm/fsl.yaml > @@ -1018,6 +1018,7 @@ properties: > - fsl,imx8mn-ddr4-evk # i.MX8MN DDR4 EVK Board > - fsl,imx8mn-evk # i.MX8MN LPDDR4 EVK Board > - gw,imx8mn-gw7902 # i.MX8MM Gateworks Board > + - rve,rve-gateway # i.MX8MN RVE Gateway Board Eh, now it does not match your DTS. It does not look like you tested the DTS against bindings. Please run `make dtbs_check W=1` (see Documentation/devicetree/bindings/writing-schema.rst or https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/ for instructions). Best regards, Krzysztof
On Thu, 2 Nov 2023 22:14:41 +0100 Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote: > On 02/11/2023 20:31, Hugo Villeneuve wrote: > > From: Hugo Villeneuve <hvilleneuve@dimonoff.com> > > > > Add DT compatible string for RVE gateway board based on a Variscite > > VAR-SOM-NANO with a NXP MX8MN nano CPU. > > > > Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > > Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com> > > --- > > Documentation/devicetree/bindings/arm/fsl.yaml | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml > > index 32b195852a75..4cef18e46312 100644 > > --- a/Documentation/devicetree/bindings/arm/fsl.yaml > > +++ b/Documentation/devicetree/bindings/arm/fsl.yaml > > @@ -1018,6 +1018,7 @@ properties: > > - fsl,imx8mn-ddr4-evk # i.MX8MN DDR4 EVK Board > > - fsl,imx8mn-evk # i.MX8MN LPDDR4 EVK Board > > - gw,imx8mn-gw7902 # i.MX8MM Gateworks Board > > + - rve,rve-gateway # i.MX8MN RVE Gateway Board > > Eh, now it does not match your DTS. > > It does not look like you tested the DTS against bindings. Please run > `make dtbs_check W=1` (see > Documentation/devicetree/bindings/writing-schema.rst or > https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/ > for instructions). Hi, for the millionth time, make dtbs_check stopped working for me: Traceback (most recent call last): File "/usr/local/bin/dt-doc-validate", line 64, in <module> ret |= check_doc(f) ^^^^^^^^^^^^ File "/usr/local/bin/dt-doc-validate", line 32, in check_doc for error in sorted(dtsch.iter_errors(), key=lambda e: e.linecol): ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ File "/usr/local/lib/python3.11/dist-packages/dtschema/schema.py", line 125, in iter_errors self.annotate_error(scherr, meta_schema, scherr.schema_path) File "/usr/local/lib/python3.11/dist-packages/dtschema/schema.py", line 104, in annotate_error schema = schema[p] ~~~~~~^^^ After a few hours of searching and troubleshooting, I am unable to fix the problem. But even with this error, I can still see the warnings, which I discarded as garbage initally because of that Traceback error. I now see the problem, and I moved "rve,rve-gateway" to the proper section, in "Variscite VAR-SOM-MX8MN based boards". After the move, I still have an error, but now I understand that I must slightly convert the "Variscite VAR-SOM-MX8MN based boards" to support more than one board like this: - description: Variscite VAR-SOM-MX8MN based boards items: - - const: variscite,var-som-mx8mn-symphony + - enum: + - rve,rve-gateway # i.MX8MN RVE Gateway Board + - variscite,var-som-mx8mn-symphony - const: variscite,var-som-mx8mn - const: fsl,imx8mn With these changes, everything looks good now. I Will send a V4 with these changes. Thank you, Hugo.
diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 32b195852a75..4cef18e46312 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -1018,6 +1018,7 @@ properties: - fsl,imx8mn-ddr4-evk # i.MX8MN DDR4 EVK Board - fsl,imx8mn-evk # i.MX8MN LPDDR4 EVK Board - gw,imx8mn-gw7902 # i.MX8MM Gateworks Board + - rve,rve-gateway # i.MX8MN RVE Gateway Board - const: fsl,imx8mn - description: Variscite VAR-SOM-MX8MN based boards