Message ID | 20231101082402.20856-1-naomi.chu@mediatek.com |
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State | New |
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[23.128.96.35]) by mx.google.com with ESMTPS id i62-20020a17090a3dc400b002774aec6805si348467pjc.68.2023.11.01.01.26.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 Nov 2023 01:26:16 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.35 as permitted sender) client-ip=23.128.96.35; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=hK5vA88z; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.35 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by groat.vger.email (Postfix) with ESMTP id C81778087266; Wed, 1 Nov 2023 01:26:11 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at groat.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229590AbjKAIZt (ORCPT <rfc822;rbbytesnap@gmail.com> + 35 others); Wed, 1 Nov 2023 04:25:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37152 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230523AbjKAIZs (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Wed, 1 Nov 2023 04:25:48 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 36052ED; Wed, 1 Nov 2023 01:25:39 -0700 (PDT) X-UUID: 3763b1e2789011ee8051498923ad61e6-20231101 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:Message-ID:Date:Subject:CC:To:From; bh=KCWoOkADGi3pf16iXii6gF1epRUY5KMhPNsP3Vz+1tk=; b=hK5vA88zhgciR6/n5SAyoEAuCOWEF8Cz10S+YZrG79UQx+3A9KeRKkdGfTWCQTs416K3VN08RCsp9Ha7fVJSRaFzNWPEtYZhLvJmP8MGly9Ln6rMCoZ8T7qlsYhNddzxtzxkbx8YkvM9nA/S3oeyA5MG19s3jy6WleTxImGdiVQ=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.33,REQID:82146b6e-c1d9-4db5-8b62-e2f53053dad7,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:364b77b,CLOUDID:f8272572-1bd3-4f48-b671-ada88705968c,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0,OSI:0,OSA:0,AV:0,LES:1,SPR:NO, DKR:0,DKP:0,BRR:0,BRE:0 X-CID-BVR: 0,NGT X-CID-BAS: 0,NGT,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-UUID: 3763b1e2789011ee8051498923ad61e6-20231101 Received: from mtkmbs14n2.mediatek.inc [(172.21.101.76)] by mailgw02.mediatek.com (envelope-from <naomi.chu@mediatek.com>) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 723263021; Wed, 01 Nov 2023 16:25:29 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Wed, 1 Nov 2023 16:25:26 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Wed, 1 Nov 2023 16:25:26 +0800 From: <naomi.chu@mediatek.com> To: <linux-scsi@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-mediatek@lists.infradead.org>, Alim Akhtar <alim.akhtar@samsung.com>, Avri Altman <avri.altman@wdc.com>, Bart Van Assche <bvanassche@acm.org>, "James E.J. Bottomley" <jejb@linux.ibm.com>, "Martin K. Petersen" <martin.petersen@oracle.com>, Matthias Brugger <matthias.bgg@gmail.com>, AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> CC: <wsd_upstream@mediatek.com>, <peter.wang@mediatek.com>, <casper.li@mediatek.com>, <powen.kao@mediatek.com>, <alice.chao@mediatek.com>, <naomi.chu@mediatek.com>, <chun-hung.wu@mediatek.com>, <cc.chou@mediatek.com>, <eddie.huang@mediatek.com> Subject: [PATCH v2 1/1] ufs: core: Expand MCQ queue slot to DeviceQueueDepth + 1 Date: Wed, 1 Nov 2023 16:24:00 +0800 Message-ID: <20231101082402.20856-1-naomi.chu@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 Content-Type: text/plain X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10--1.647600-8.000000 X-TMASE-MatchedRID: PwZ81m9fkLaip6xhGipIWeE86+k9uTZHm7HdiLHHK2fDTXM3VzSaIq5F Is0KOiYRIV4u8YKdeKsO1mVtY5XA0K+/EguYor8cFEUknJ/kEl5jFT88f69nG/oLR4+zsDTt9xS 3mVzWUuCMx6OO8+QGvqyt7lbAoL3b1b5ciGqgyyK4b9vVA7cUDFBSi7IIue1t1wsfMy1ANRCOCM KUG2SbSV6NqXp1TIWNF6B/icpS7PJfNYyP36YXk3mVKZusLp922v9OjYWA2uMMswg45VMfPadst 5iAforfVlxr1FJij9s= X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--1.647600-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: 61078AB8541BEB98FED27B874E254886E6683CAA7E4EC8BE8F5C84142B73FAFC2000:8 X-MTK: N X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE,UNPARSEABLE_RELAY autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on groat.vger.email Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (groat.vger.email [0.0.0.0]); Wed, 01 Nov 2023 01:26:11 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781349405414186810 X-GMAIL-MSGID: 1781349405414186810 |
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[v2,1/1] ufs: core: Expand MCQ queue slot to DeviceQueueDepth + 1
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Commit Message
naomi.chu@mediatek.com
Nov. 1, 2023, 8:24 a.m. UTC
From: Naomi Chu <naomi.chu@mediatek.com> Allow UFSHCI 4.0 controllers to fully utilize MCQ queue slots. Signed-off-by: Naomi Chu <naomi.chu@mediatek.com> --- drivers/ufs/core/ufs-mcq.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
Comments
On 11/1/23 01:24, naomi.chu@mediatek.com wrote: > From: Naomi Chu <naomi.chu@mediatek.com> > > Allow UFSHCI 4.0 controllers to fully utilize MCQ queue slots. > > Signed-off-by: Naomi Chu <naomi.chu@mediatek.com> > --- > drivers/ufs/core/ufs-mcq.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/ufs/core/ufs-mcq.c b/drivers/ufs/core/ufs-mcq.c > index 2ba8ec254dce..5c75ab9d6bb5 100644 > --- a/drivers/ufs/core/ufs-mcq.c > +++ b/drivers/ufs/core/ufs-mcq.c > @@ -436,7 +436,7 @@ int ufshcd_mcq_init(struct ufs_hba *hba) > > for (i = 0; i < hba->nr_hw_queues; i++) { > hwq = &hba->uhq[i]; > - hwq->max_entries = hba->nutrs; > + hwq->max_entries = hba->nutrs + 1; > spin_lock_init(&hwq->sq_lock); > spin_lock_init(&hwq->cq_lock); > mutex_init(&hwq->sq_mutex); Please add a Fixes: tag and expand the patch description. What should be mentioned in the patch description is that the UFSHCI specification requires that there is always at least one empty slot in each completion queue. I think that is why the above change is necessary. Thanks, Bart.
diff --git a/drivers/ufs/core/ufs-mcq.c b/drivers/ufs/core/ufs-mcq.c index 2ba8ec254dce..5c75ab9d6bb5 100644 --- a/drivers/ufs/core/ufs-mcq.c +++ b/drivers/ufs/core/ufs-mcq.c @@ -436,7 +436,7 @@ int ufshcd_mcq_init(struct ufs_hba *hba) for (i = 0; i < hba->nr_hw_queues; i++) { hwq = &hba->uhq[i]; - hwq->max_entries = hba->nutrs; + hwq->max_entries = hba->nutrs + 1; spin_lock_init(&hwq->sq_lock); spin_lock_init(&hwq->cq_lock); mutex_init(&hwq->sq_mutex);